Assignment:- DIGITAL CIRCUITS 1. The sign-magnitude form and 2’s complement form of a signed binary number (10111) 2 are; (a) -23 and -25 c) -7 and -23
(b) -23 and -9 (d) -7 and -9
2. If we convert a binary sequence, (1100101-1011)2 into its octal equivalent as (X)s, the value of ‘X’ will be (a) (145, 13) c) (624, 54)
(b) (145, 54) (d) (624, 13)
3. A binary (11011)2 may be represented by following way: (a) (33)B c) (10110)GRAY
(b) (27)10 (d) (1 B)H
4. The number of digit ‘1’ present in the binary representation of the number (1199)12 is (a) 7
(b) 8
c) 10
(d) 12
5. Choose the correct match among the alternative a, b, c, d after matching an item from Group-1 with the most appropriate item in Group-2 Group -1 P. Alphanumeric codes Q. Gray codes R. Boudet’s codes S. Excess-3 codes
Group-2 1. Internal codes 2. Telegraph codes 3. Self-complement codes 4. Reflected codes
(a) P-1, Q-4, R-3, S-1 c) P-1, Q-4, R-2, S-3
(b) P-4, Q-3, R-1, S-2 (d) P-1, Q-2, R-4, S-3
6. Regarding ASCII codes, which one of the following characteristics is NOT correct? (a) It is an Alphanumeric code c) It has 128 characters including control characters
(b) It is an 8-bit code (d) The minimum distance of ASCII code is ‘1’
7. Consider the following logical function, A+AB+ABC+ABCD+ABCDE+…………=X, then ‘X’ equals to (a) 0 c) A
(b) 1 (d) AB
8. For an 8-bit microprocessor, the maximum possible number of self dual functions equals to (a) (16) c) (16)
(b) (16) (d) (16)
9. If
, then the value of Boolean expression,
̅ (a) 0 c) A+B
is equal to, (b)1 (d) AB
10. For the given wired AND logic as shown in the figure below, output ‘Y’ is? P Q Y R S
(b)
( ) (a)
c)
11.
(d)
Consider a Boolean expression,
()
The minimum number of NAND gates required to implement this ‘f’ will be (a) Zero
(b) 2 (d) 4
c) 3 12. For a Boolean function,
, the POS form is
(a) c)
(b) (d)
13. Which one of the following sets of gates are best suited for parity checking and parity generation (a) AND, OR, NOT gates c) Only NAND gates
(b) Only NOR gates (d) Ex-OR or Ex-NOR gates
14. The output ‘Y’ of the multiplexer circuit shown in the figure given below will be:
MUX
Y Selective
C
A B (a) c)
(b) ABC (d)
15. The number of select lines required in a single input and ‘256’ output DEMUX is (a) 8 c) 32
(c) 16 (d) 64
16. For a 4-bit Adder, how many number of gate levels are required for the carry to propagate from input to output? (a) 4 (c) 7
(d) 5 (d) 8
17. The required number of FFs that will be complemented in a 12-bit binary ripple counter to reach the next count after count 100010111011? (a) 3 (c) 7
(b) 6 (d) 11
18. A 6-bit DAC produces an output voltage of 2.5 volt for an input binary sequence 101101. For an input code of 011101 the value of V out will be (a) 0.81 V (c) 1.52 V
(b) 1.61 V (d) 2.58 V
19. Consider an n-bit slowest Dual slope type ADC having conversion time ‘t c’ equals to 2mS is clocked with 16 kHz pulses, then this ADC converts a binary sequence of (a) 4 bits (c) 6 bits
(b) 5 bits (d) 16 bits
20. A digital system employs a 8-bit word as its input signal. If the maximum output voltage is set for 2V then value of dynamic range (in dB) of the system equals to (a) 24.8 (c) 48.2
(b) 96 (d) 40