Analog Ana log Circuit Circuitss by Kanod Kanodia ia
1
DIODE CIRCUITS_EX
EXAMPLE 1.1
Consider the circuit with two diodes as shown in Figure. Diode D 1 is Ge diode with cut-in voltage V = 0.2 0.2 V while D 2 is Si diode with cut-in voltage V = 0.6 V . The forward dc resistances of diodes D 1 and D 2 are 20 W and 15 W , respectively. Determine the current through diodes when (a) R = 10 kW , and (b) R = 1 kW . g
g
SOLUTION :
. n n i o c c . a a i d o n . w w w _ i
In this problem we follow the methodology of analysis of diode circuits discussed in Section 3.3. Let currents through diode D 1 and D 2 be I 1 and I 2 as shown in the Figure. (a) When R = 10 kW
Step 1: First 1: First we assume that both diodes D 1 and D 2 are in forward biased mode. Step 2: W 2: Wee replace both the th e diodes by their piecewise piecewi se linear equivalent model as shown in the figure.
Step 3: Now 3: Now the resultant circuit is simple resistive circuit with dc sources. We can apply KVL and KCL in the resultant circuit. Writing KVL in first half loop, lo op, we get
- 100 + 10 I1 + I2 + 0.02I 1 + 0.2 = 0
10.02I1 + 10I 2 = 99.8 Writing KVL in second half loop, we get
...(i)
- 0.02I1 - 0.2 + 0.6 + 0.015 I 2 = 0
0.02I1 - 0.015I 2 = 0.4 Solving Eq (i) and (ii), we get,
...(ii)
I 1 = 15.692 mA I 2 = - 5.743 5.743 mA
Step 4: Now 4: Now we verify our initial assumption that diode is ON. (i) Since I 1 is positive (current through diode is from p to n ), diode D 1 is On and our assumption is true. (ii) Since I 2 is negative, our initial assumption that D 2 is ON is incorrect. Hence we conclude that D 2 is OFF. Step 5: Now, 5: Now, we repeat the analysis by assuming that D 2 is OFF. Since D 2 is OFF, I 2 = 0 . Substituting I 2 = 0 in Eq (i), we get
While writing KVL in the first half loop, note that current through R is I1 + I 2 . Also in Eq (i) and (ii) all resistances are in kW and currents are in mA.
_
i
Buy GATE KANODIA Books Online at: www.nodia.co.in
Analog Ana log Circuit Circuitss by Kanod Kanodia ia Page 2
Diode Circuits_Ex
Chapter 1
10.02I 1 + 10 # 0 = 99.8 9.96 mA I 1 = 9.96 Step 6: Again 6: Again we verify our assumption that D 1 is ON and D 2 is OFF. Since I 1 is positive, D 1 is ON. To confirm that diode D 2 is indeed OFF, we find the voltage across it. By writing KVL in the second half loop, we get - 0.02I1 - 0.2 + V D 2 = 0
_ i
- 0.02 9.96 - 0.2 + V D 2 = 0
Since diode D 2 is Si diode and forward voltage across it is less than cut-in voltage (0.6 V in this example), diode D 2 is indeed OFF. Hence, our second assumption is true and current through diodes are 9.96 mA and I 2 = 0 . I 1 = 9.96 (b) When R = 1 kW Again, first first we we assume assume that both diodes D 1 and D 2 are in forward biased mode. Writing KVL in the first half loop, we get
_
i
- 100 + 1 I1 + I2 + 0.02I 1 + 0.2 = 0
1.02I1 + I 2 = 99.8 Writing KVL in the second half loop, we get
...(iii)
. n n i o c c . a a i d o n . w w w
- 0.02I1 - 0.2 + 0.6 + 0.015 I 2 = 0
0.02I1 - 0.015I 2 = 0.4 Solving Eq (iii) and (iv), we get
...(iv)
53.74 mA I 1 = 53.74
and 44.99 mA I 2 = 44.99 Since both currents are positive, our initial assumption that diodes D 1 and D 2 are ON is correct. However we can verify this by finding voltages across the diodes. If we calculate the voltages across diodes D 1 and D 2 , they are V D 1 = 0.02I 1 + 0.2
= 0.02 # 53.74 + 0.2 = 1.2748 V V D 2 = 0.015I 2 + 0.6
= 0.015 # 44.99 + 0.6 = 1.2748 V Since voltage across both the diode V D 1 and V D 2 are positive, both the diodes are forward biased and our assumption is true. EXAMPLE 1.2
The circuit shown in Figure consists of two identical silicon diodes each having having a forward dc resistance of 30 W and cut-in voltage voltage 0.6 V . Find the value of output voltage V o for the following values values of input voltages (a) V1 = V 2 = 5 V (b) V 1 = 0 , V 2 = 5 V (b) V 1 = 5 V , V 2 = 0 (c) V1 = V 2 = 0
_i
Buy GATE KANODIA Books Online at: www.nodia.co.in
Analog Ana log Circuit Circuitss by Kanod Kanodia ia Page 2
Diode Circuits_Ex
Chapter 1
10.02I 1 + 10 # 0 = 99.8 9.96 mA I 1 = 9.96 Step 6: Again 6: Again we verify our assumption that D 1 is ON and D 2 is OFF. Since I 1 is positive, D 1 is ON. To confirm that diode D 2 is indeed OFF, we find the voltage across it. By writing KVL in the second half loop, we get - 0.02I1 - 0.2 + V D 2 = 0
_ i
- 0.02 9.96 - 0.2 + V D 2 = 0
Since diode D 2 is Si diode and forward voltage across it is less than cut-in voltage (0.6 V in this example), diode D 2 is indeed OFF. Hence, our second assumption is true and current through diodes are 9.96 mA and I 2 = 0 . I 1 = 9.96 (b) When R = 1 kW Again, first first we we assume assume that both diodes D 1 and D 2 are in forward biased mode. Writing KVL in the first half loop, we get
_
i
- 100 + 1 I1 + I2 + 0.02I 1 + 0.2 = 0
1.02I1 + I 2 = 99.8 Writing KVL in the second half loop, we get
...(iii)
. n n i o c c . a a i d o n . w w w
- 0.02I1 - 0.2 + 0.6 + 0.015 I 2 = 0
0.02I1 - 0.015I 2 = 0.4 Solving Eq (iii) and (iv), we get
...(iv)
53.74 mA I 1 = 53.74
and 44.99 mA I 2 = 44.99 Since both currents are positive, our initial assumption that diodes D 1 and D 2 are ON is correct. However we can verify this by finding voltages across the diodes. If we calculate the voltages across diodes D 1 and D 2 , they are V D 1 = 0.02I 1 + 0.2
= 0.02 # 53.74 + 0.2 = 1.2748 V V D 2 = 0.015I 2 + 0.6
= 0.015 # 44.99 + 0.6 = 1.2748 V Since voltage across both the diode V D 1 and V D 2 are positive, both the diodes are forward biased and our assumption is true. EXAMPLE 1.2
The circuit shown in Figure consists of two identical silicon diodes each having having a forward dc resistance of 30 W and cut-in voltage voltage 0.6 V . Find the value of output voltage V o for the following values values of input voltages (a) V1 = V 2 = 5 V (b) V 1 = 0 , V 2 = 5 V (b) V 1 = 5 V , V 2 = 0 (c) V1 = V 2 = 0
_i
Buy GATE KANODIA Books Online at: www.nodia.co.in
Analog Ana log Circuit Circuitss by Kanod Kanodia ia Chapter 1
Diode Circuits_Ex
Page 3
SOLUTION :
We can see that anode of diode D 1 is connected to + 5 V through a resistor of 4.7 kW . To make D 1 forward biased, voltage V 1 should always be less than 5 - 0.7 = 4.3 V . Similarly, to make diode D 2 voltage V 2 should be less than 4.3 4.3 V . Now, we analyze the circuit for different inputs. (a) When V1 = V 2 = 5 V , there is not enough voltage across D 1 and D 2 to forward bias them. Hence both D 1 and D 2 are reversed biased and currents though both of them is zero as shown in the Figure. Hence, I 1 = I 2 = 0 Since there is no current through 4.7 kW resistor, there is no voltage drop across resistor R and V o = 5 V . (b) V 1 = 0 , V 2 = 5 V For this case, we know that diode D 2 will be OFF and diode D 1 will be ON. So, diode D 2 can be replaced by an open circuit and D 1 by its piecewise equivalent model. The equivalent circuit can be drawn as shown in Figure.
. n n i o c c . a a i d o n . w w w
Writing KVL in the loop, we get
5 - 4.7I - 0.03I - 0.06 - 0.33I = 0 4.4 V = 0.869 mA So, I = 5.06 K To find V o , we write another KVL expression including V o . 5 - 4.7I - V o = 0 So,
V o = 5 - 4.7I
_ i_
i
= 5 - 4.7 0.86 869 = 0.915 V
(c) V 1 = 5 V , V 2 = 0 V In this case diode D 1 will be OFF and D 2 will be ON. So we can replace D 1 by an open circuit and D 2 by its piecewise linear equivalent equivalent model. Therefore, the resultant circuit becomes exactly same as that of case (b). Hence, output V o = 0.91 0.9155 V (d) V 1 = 0 V , V 2 = 0 V In this case both the diodes D 1 and D 2 will be ON, so we replace them by their piecewise linear equivalent model. The resultant circuit is shown in Figure below.
Buy GATE KANODIA Books Online at: www.nodia.co.in
Analog Circuits by Kanodia Page 4
Diode Circuits_Ex
Chapter 1
We can see that both the parallel branches have same resistance and sources, so current through them will be equal. Due to this symmetry we assume that current through each parallel branch is I and therefore current through 4.7 kW resistance would be 2I . Writing KVL around the upper loop only, we get 5 - 2IR - 0.030I - 0.6 - 0.33I = 0
_ i I _2
5 - 2I 4.7 - 0.03I - 0.6 - 0.33I = 0
. n i o c . a i d o n . w w w i
4.7 + 0.03 + 0.33 = 5 - 0.6 So, I = 4.4 = 0.45 mA 9.76 To find V o for this condition, we write another KVL expression containing V o . This gives, #
5 - 2IR - V o = 0
V o = 5 - 2IR
= 5 - 2 # 0.45 # 4.7 = 0.77 V
EXAMPLE 1.3
For the circuit shown in Figure, determine: (a) the current through 22 W resistance (b) the value of dc voltage to be inserted in series with 22 W resistance so that current through it becomes zero Assume diodes D 1 and D 2 are identical Si diodes with cut-in voltage V = 0.6 V and forward resistance r f = 10 W g
SOLUTION :
We follow the methodology of analysis of diode circuits discussed in Section 3.3. Step 1: First we assume that both diodes D 1 and D 2 are in forward biased mode. Step 2: We replace both the diodes by their piecewise linear equivalent model as shown in the figure. Let currents in loop I and loop II be I 1 and I 2 respectively. Also, I 1 and I 2 are the current through diode D 1 and D 2 respectively.
Buy GATE KANODIA Books Online at: www.nodia.co.in
Analog Circuits by Kanodia Chapter 1
Diode Circuits_Ex
Page 5
Step 3: Now the resultant circuit is simple resistive circuit with dc sources. We can apply KVL and KCL in the resultant circuit. Writing KVL in loop I, we get
_ i I _18 + 10 + 47i - 47I = 3.4
4 - 18I1 - 10I1 - 0.6 - 47 I1 - I2 = 0 1
2
75I1 - 47I 2 = 3.4 Similarly, writing a KVL equation for lo op II, we get,
...(i)
_
i 47I - I _47 + 10 + 22i = 0.6
. n i o c . a i d o n . w w w
0 - 10I2 - 0.6 - 22I2 - 47 I2 - I1 = 1
2
47I1 - 79I 2 = 0.6
...(ii)
Solving Eq (i) and (ii), we get
I 1 = 0.06469 A . 64.7 mA
I 2 = 0.03089 A . 31 mA
Step 4: Now we verify our initial assumption that diode D 1 and D 2 are ON. Since both I 1 and I 2 are positive, diode D 1 and D 2 are ON and our assumption is true. Hence, current through 22 W resistance is I 2 . 31mA . (b) Now, we insert a voltage source V x in series with 22 W resistor such that current I 2 = 0 .
Writing KVL in the loop I, we get
_
i
4 - 18I1 - 10I1 - 0.6 - 47 I1 - I2 = 0 or Substituting I 2 = 0 , we get,
75I1 - 47I 2 = 3.4 I 1 = 3.4 = 45.33 mA 75
Buy GATE KANODIA Books Online at: www.nodia.co.in
Analog Circuits by Kanodia Page 6
Diode Circuits_Ex
Chapter 1
Applying KVL for loop II, we get, - 10 # 0 - 0.6 - 22 # 0 - Vx + 47I 1 = 0
_
i
_
i
V x = 47I 1 - 0.06
Substituting I 1 = 0.04533 A , we get, V x = 1.53 V EXAMPLE 1.4
The circuit shown in Fig// contains two identical Si diodes with cutin voltage V = 0.7 V and zero forward resistance. Determine the diode current I 1 , I 2 and output voltage V o , if the input (a) V i = 0 and (b) V i = 4 V g
SOLUTION :
(a) V i = 0 Step 1 : First we guess the states of diodes. From the applied polarity of source. We assume that both D 1 and D 2 are forward biased. Step 2 : We replace both the diode by their simplified equivalent model. The resultant circuit is as shown in figure. Step 3 : Now the resultant circuit is simple resistive circuit with dc sources. We can apply KVL and KCL in the circuit. By writing KVL in the left half loop.
_
i
. n i o c . a i d i o n . w w w
- 0.7 - 10k I1 + I 2 + 5 = 0
10I1 + 10I 2 = 5 - 0.7
I1 + I 2 = 0.43 mA
...(i)
By writing KVL in the second half loop
_ i
_
5 =0 5 - 5k I2 - 0.7 - 10k I2 + I1 +
10I2 + 10I1 + 5I 2 = 10 - 0.7 10I1 + 15I 2 = 9.3
I1 + 1.5I 2 = 0.93 mA
...(ii)
Solving Eq. (i) and (ii), we get
I 1 = 0.57 mA I 2 = 1 mA
Step 4 : Now, we verify our initial assumption that diode both diodes D 1 and D 2 are ON. Since current through I 1 is negative, our assumption that D 1 is ON is incorrect. However, I 2 is positive so D 2 is ON. Step 5 : Now we repeat the analysis by assuming that D 1 is OFF and D 2 is ON. Since D 1 is OFF I 1 = 0 . D 1 can be replaced by an open circuit as shown in figure. By applying KVL
_ i
_ i _15k iI
5 - 5 k I2 - 0.7 - 10k I2 + 5 = 0 2
= 10 - 0.7
I 2 = 9.3 = 0.62 mA 15k
Output voltage can be obtained by writing KVL including V 0 .
Buy GATE KANODIA Books Online at: www.nodia.co.in
Analog Circuits by Kanodia Chapter 1
Diode Circuits_Ex
Page 7
V0 + 5I 2 - 5 = 0 V 0 = 5 - 5I 2
_ i
= 5 - 5 0.62
= 1.9 V Thus for V i = 0 , we have I 1 = 0 , I 2 = 0.62 mA, V 0 = 1.9 V (b) V i = 4 V Step 1 : Again, we assume that b oth D 1 and D 2 are forward biased. Step 2 : We replace both the diodes by their simplified equivalent circuit as shown in the figure.
. n i o c . a i _ i_ i d o n . w w w
Step 3 : Writing KVL in the first half loop, we get
_ i_
i
4 - 0.7 - 10k I1 + I 2 + 5 = 0
10I1 + 10I 2 = 9 - 0.7
I1 + I 2 = 0.83 mA Writing KVL in the second half loop we get
_ i
...(i)
5 - 5k I2 - 0.7 - 10k I1 + I2 + 5 =0
10I1 + 15I 2 = 10 - 0.7
I1 + 1.5I 2 = 0.93 mA
...(ii)
Solving Eq. (i) and (ii), we get
I 1 = 0.63 mA
I 2 = 0.2 mA Step 5 : Since both I 1 and I 2 are positive, our assumption that D 1 and D 2 are ON is true.
Output voltage can be obtained by writing KVL, V0 + 5I 2 - 5 = 0 V 0 = 5 - 5I 2
_ i
= 5 - 5 0.2 =4V EXAMPLE 1.5
The diodes in the circuit shown in Figure have piecewise linear parameters of V = 0.6 V and r f = 0 . Find the diode current I 1 , I 2 and output voltage V o for the following input combinations: (a) V 1 = 10 V , V 2 = 0 (b) V 1 = 10 V , V 2 = 5 V (c) V1 = V 2 = 10 V g
Buy GATE KANODIA Books Online at: www.nodia.co.in
Analog Circuits by Kanodia Page 8
Diode Circuits_Ex
Chapter 1
SOLUTION :
(a) V 1 = 10 V , V 2 = 0 Step 1 : We can assume that is this case diode D 1 is forward biased and D 2 is reverse biased. Step 2 : Replace D 1 by piecewise linear model and D 2 by an open circuit. The resultant circuit is shown in figure. Current through D 2 is I 2 = 0 .
. n i o c . a i _ i_ i d o n . w w w
Step 3 : Writing KVL in the upper half loop. 10 - 0.5I1 - 0.6 - 9.5I 1 = 0
10I 1 = 10 - 0.6 I 1 = 9.4 = 0.94 mA 10k Since I 1 obtained by the assumption that D 1 is ON and D 2 is OFF, is positive. Our assumption is true. Output voltage
V 0 = 9.5k I 1
= 9.5 # 0.94 = 8.93 V
(b) V 1 = 10 V , V 2 = 5 V Step 1 : Since V 1 and V 2 are positive, in the circuit cathodes of Diode D 1 and D 2 are also positive with respect to their anodes. Hence we assume both D 1 and D 2 are forward biased. Step 2 : By replacing D 1 and D 2 with their piecewise linear model, we obtain the equivalent circuit as shown in the figure.
Buy GATE KANODIA Books Online at: www.nodia.co.in
Analog Circuits by Kanodia Chapter 1
Diode Circuits_Ex
Page 9
Step 3 : Writing KVL in upper half loop
_ i _ i 10 - _0.5k i I - 0.6 - _9.5k i_I + I i = 0 10 - 0.5k I1 - 0.6 - 9.5k I = 0 1
1
2
10I1 + 9.5I 2 = 10 - 0.6 10I1 + 9.5I 2 = 9.4 mA Writing KVL in the lower half loop
_ i
_ i_
...(i)
i
5 - 0.5k I2 - 0.6 - 9.5k I1 + I2 = 0 10I1 + 9.5I 2 = 5 - 0.6 10I1 + 9.5I 2 = 4.4 mA
...(ii)
Step 4 : We can see that Eq. (i) and (ii) can not be true. It implies that any of our assumption is not true. Let us assume that D 1 is forward biased and D 2 is reversed biased. Replacing D 1 with its piecewise linear model and D 2 by its open circuit we obtain the equivalent circuit as shown in figure.
. n i o c . a i d o n . i w _ w i w _ i
By applying KVL in the upper half loop
_
10 - 0.5k I1 - 0.6 - 9.5k I1 = 0
10k I 1 = 10 - 0.6 I 1 = 9.4 = 0.94 mA 10k Since I 1 is positive, our assumption that D 1 is ON is true. Output voltage
_ i
V 0 = 9.5k I 1 = 9.5 # 0.94 = 8.93 V
(c) V1 = V 2 = 10 V Step 1 : Assume that both diodes D 1 and D 2 are forward biased. Step 2 : Replacing D 1 and D 2 by their piece wise linear model, we obtain the resulting circuit as shown in figure.
Buy GATE KANODIA Books Online at: www.nodia.co.in
Analog Circuits by Kanodia Page 10
Diode Circuits_Ex
Chapter 1
Since both the parallel branches are identical, current through them will be equal current through 9.5 kW resistor is therefore I + I = 2I . Writing KVL in the upper half loop
_ i _ i_ i = 0 _19.5k iI = 10 - 0.6
10 - 0.5k I - 0.6 - 9.5k 2I
9.4 = 0.482 mA 19.5k Thus, current through diodes I =
. n i o c . a i d o n . w w w
I 1 = I 2 = 0.482 mA
Output voltage
_ i_ i
V 0 = 9.5k 2I
= 9.5 # 2 # 0.482 -
9.16 V
EXAMPLE 1.6
For the circuit shown in Figure, determine current I 1 and output voltage V o when (a) R1 = 5 kW and R2 = 10 kW (b) R1 = 10 kW and R2 = 5 kW . Assume diodes D 1 and D 2 are identical diodes with cut-in voltage V = 0.6 V and forward resistance r f = 0 . g
SOLUTION :
(a) R1 = 5 kW , R2 = 10 kW Step 1 : First we assume that both D 1 and D 2 are ON. Step 2 : Replacing D 1 and D 2 by their simplified equivalent model, we obtain an equivalent circuit as shown in figure. Step 3 : By applying KVL in the first half loop
_ i
10 - 5k I 1 - 0.6 = 0 10 - 0.6 = 1.88 mA I 1 = 5k Applying KVL in second half loop
_ i
0.6 - 0.6 - 10k I 2 + 10 = 0
Buy GATE KANODIA Books Online at: www.nodia.co.in
Analog Circuits by Kanodia Chapter 1
Diode Circuits_Ex
Page 11
I 2 = 10 = 1 mA 10k Since both I D1 and I 2 are positive D 1 and D 2 are ON and our initial assumption is true current through diode D 1 I D1 = I1 - I 2 = 1.88 - 1 = 0.88 mA (b) R1 = 10 kW , R2 = 5 kW
Step 1 : Again, we assume that both the diodes D 1 and D 2 are ON. Step 2 : Replacing D 1 and D 2 by their simplified equivalent circuit, we obtain the resultant circuit as shown in the figure. Step 3 : Applying KVL in the left half loop, we get
_ i
10 - 10k I 1 - 0.6 = 0 I 1 = 10 - 0.6 = 0.94 mA 10k Applying KVL in the second half loop
_ i
0.6 - 0.6 - 5k I 2 + 10 = 0 I 2 = 2 mA
. n i o c . a i d o _ i _ i n _ i . w w w__ i i
Current through diode D 1
I D1 = I1 - I 2
= 0.94 - 2 =- 1.06 mA Since I D1 is negative, our assumption that D 1 is ON is not true.
Step 4 : Now we perform the analysis again by assuming that D 1 is OFF and D 2 is ON. Since D 1 is OFF I D 1 = 0 . The equivalent circuit is shown in figure. Applying KVL 10 - 10k I2 - 0.6 - 5k I2 + 10 = 0 15k I 2 = 20 - 0.6 I 2 = 19.4 = 1.29 mA 15k
Output voltage
V 0 = 5k I 2 - 10
= 5 # 1.29 - 10 =- 3.55 V
EXAMPLE 1.7
For the circuit shown below determine I D , V 1 , V 2 and V o . Assume cutin voltage for Si diode is 0.7 V. SOLUTION :
The diode is in the on state since the anode has positive potential and the cathode negative potential. The equivalent circuit is shown below. Applying KVL to the circuit of Fig. A, we get
_ i
_ i
20 - 10 ID - 0.7 - 5 I D + 6 = 0 26 - 0.7 = 1.68 mA I D = 10 + 5
_ i _ i_ i
V 1 = I D 10 = 1.68 10 = 16.8 V
Buy GATE KANODIA Books Online at: www.nodia.co.in
Analog Circuits by Kanodia Page 12
Diode Circuits_Ex
Chapter 1
_ i _ i_ i V - _- 6i =
V 2 = I D 5 = 1.68 5 = 8.4 V
From the circuit of Fig. B I D
o
5
_i
_ i_ i
V o = I D 5 - 6 = 1.68 5 - 6 = 2.4 V Alternatively, applying KVL to the path consisting of V o , V 2 and 6 V
battery we have Vo - V 2 + 6 = 0 V o = V 2 - 6 = 8.4 - 6 = 2.4 V
Step 1 : By observing the polarities of applied source, we assume that diode D is ON. Step 2 : Replacing diode with its simplified model, we obtain an equivalent circuit as shown in figure. Step 3 : Applying KVL in the circuit
_ i
_ i _15k iI
6 =0 20 - 10k ID - 0.7 - 5k ID + D
= 26 - 0.7
25.3 = 1.68 mA 15k Step 4 : Since I D is positive, out assumption that diode is ON is true. I D =
. n i o c . a i d o n . w w w
_ i V = _5k i I = 5
V 1 = 10k I D = 10 # 1.68 = 16.8 V 2
D
V 0 = V 2 - 6
#
1.68 = 8.4 V
= 8.4 - 6 = 2.4 V EXAMPLE 1.8
Determine V o and I D for the circuits shown in Figure (a) and (b). Assume cut-in voltage for Si diode is 0.7 V.
SOLUTION :
(a) The diode is assumed to be in the on state. Replacing diode by its simplified model, we obtain the equivalent circuit as shown in Figure. Writing KVL in the circuit, we get
_ i
- 10 + 0.7 + 5 k I D = 0
Buy GATE KANODIA Books Online at: www.nodia.co.in
Analog Circuits by Kanodia Chapter 1
Diode Circuits_Ex
Page 13
I D = 9.3 = 1.86 mA
5k Rewriting KVL equation using V o we have - 10 + 0.7 - V o = 0 V o =- 9.3 V
(b) Again, the diode is in the on stage. Replacing diode by its simplified model, we obtain the equivalent circuit as shown in Figure. Writing KVL in the circuit, we get
_
i
12 - I D 10 k + 5 k - 0.7 = 0 11.3 = 0.753 mA I D = 15 k Rewriting KVL equation using V o , we get
_ i
12 - ID 10 k - V o = 0
_
i
V o = 12 - 0.753 # 10 = 4.47 V
EXAMPLE 1.9
For each of the circuits shown in Figure (a) and (B), determine V o and I D . Assume the diodes are Si diodes with a cut-in voltage of 0.7 V.
SOLUTION :
. n i o c . a i d o n . w w w
(a) First we convert the current source into its equivalent voltage source as shown in Figure.
_ i_ i
V 1 = 20 1 = 20 V
The diode in the circuit is forward bias, therefore we replace it by
Buy GATE KANODIA Books Online at: www.nodia.co.in
Analog Circuits by Kanodia Page 14
Diode Circuits_Ex
Chapter 1
simplified equivalent model. The resulting circuit is shown in Figure. Applying KVL, we get
_ i
_ i
20 - ID 1 k - 0.7 - I D 2 k = 0 19.3 = 6.43 mA I D = 3 Output voltage,
_ i _ i_ i
V o = I D 2 k = 6.43 2 = 12.86 V
(b) In this circuit cathode of diode is connected to + 20 V and its anode is at - 5V , so we can assume that diode is in forward bias mode. Replacing diode by its simplified model, we obtain an equivalent circuit as shown in Figure. Writing KVL in the circuit, we get
_ i
20 - I D 10 k - 0.7 + 5 = 0 24.3 = 2.43 mA I D = 10 Again writing KVL equation using V o , we have
_ i
20 - ID 10 k - V o = 0 V o = 20 - 2.43 10 =- 4.3 V EXAMPLE 1.10
_ i_ i
. n i o c . a i d o n . w w w
For each of the circuits shown in Figure (a) and (b), determine I D , V o 1 and V o 2 . Given that cut-in voltage for Si diode is 0.7 V and for Ge diode is 0.3 V.
SOLUTION :
(a) As we can see, both the diodes are ON in the circuit of Figure(a). We replace both the diode by their simplified equivalent model as shown in Figure. Applying KVL we have
_ i
15 - 0.7 - I D 10 k - 0.3 = 0 I D = 14 = 1.4 mA 10 k Output voltage, V o 2 = 0.3 V Writing KVL equation to the left part of the circuit including V o 1 , we get
Buy GATE KANODIA Books Online at: www.nodia.co.in
Analog Circuits by Kanodia Chapter 1
Diode Circuits_Ex
Page 15
15 - 0.7 - V o 1 = 0 V o 1 = 14.3 V (b) Since cathodes of both the diode is negative with respect to anodes, they are in ON state. Replacing diode by their simplified model, we obtain the equivalent circuit as shown in figure. Applying KVL equation to the circuit
_ i
_ i =0
- 20 + 0.7 + 0.3 + ID 5 k + I D 10 k
I D = 19 = 1.26 mA
15 k Applying KVL equation to the left part of the circuit, we get - 20 + 0.7 + 0.3 - V o 1 = 0 V o 1 =- 19 V
Output voltage,
_ i _ i_ i
V o 2 =- I D 10 k =- 1.26 10 =- 12.6 V
EXAMPLE 1.11
For the circuit shown in Figure, diode D 1 is Si diode with V = 0.7 V and D 2 is Ge diode with V = 0.3 V . Find the current I and voltages V o 1 and V o 2 . g
g
SOLUTION :
. n i o c . a i d o n . w w w
By seeing the polarity of applied source, we can assume that b oth the diode are forward biased. So, we replace them by simplified equivalent model. The resultant circuit is shown in Figure. From the equivalent circuit, we have V o 1 = 0.7 V
and Current in 10 kW , Current in 1 kW , Since,
V o 2 = 0.3 V I 1 =
15 - V o 1 = 15 - 0.7 = 1.43 mA 10 10
I 2 = Vo1 - V o 2 = 0.7 - 0.3 = 0.4 mA
1
I 1 = I + I 2
1
(KVL)
I = 1.43 - 0.4 = 1.03 mA Note that both the currents I 1 and I 2 are positive, therefore our initial assumption that D 1 and D 2 are forward biased is true. EXAMPLE 1.12
The diodes in the circuit in Figure have piecewise linear parameters of V = 0.7 V and r f = 0 . Find the voltage V o , and current I D1 . g
SOLUTION :
We can see that both the diodes are in the conducting state. Replacing them by their equivalent circuit, we obtain the circuit as shown in figure. From the equivalent circuit, we have V o = 0.7 V
Buy GATE KANODIA Books Online at: www.nodia.co.in
Analog Circuits by Kanodia Page 16
Diode Circuits_Ex
Chapter 1
Since both the parallel branches are identical, current through them will be equal I D1 = I D 2 I = ID1 + I D 2
So,
I = 2ID1 = 2I D 2 I = 12 - V o = 12 - 0.7 = 11.3 mA
1k
So,
1k
I D1 = I D 2 = I = 5.65 mA
2
EXAMPLE 1.13
Assume the diode D is an ideal silicon diode in the clipping circuit shown in Figure (a). Determine the output voltage waveform if input is (a) sine wave of peak amplitude 15 V as shown in Figure (b). (b) a square-wave as shown in Figure (c). SOLUTION :
. n i o c . a i d o n . w w w
Here, we follow the step-by-step problem solving methodology of analysis of clipping circuits discussed in Section 3.4.
(a) Sine wave input Step 1: In the first step, we find the input voltage level for which diode D will be ON. We can see that anode of diode is connected to + 5 V . In the positive half cycle, polarity of input is as shown in Figure. Hence v i and V R are aiding each other. The diode D is forward biased in entire positive half cycle of input. Output voltage can be obtained by writing KVL in the circuit vi + 5 - v o = 0
or
v o = v i + 5 V Therefore, output voltage is equal to input voltage with a shift of + 5 V (upwards). In other words, in positive half cycle, V i changes between 0 and + 15 V . Hence V o changes between + 5 V and + 20 V .
Step 2: We now identify the input voltage level for which dio de D will be OFF. In the negative half-cycle, when the instantaneous amplitude
Buy GATE KANODIA Books Online at: www.nodia.co.in
Analog Circuits by Kanodia Chapter 1
Diode Circuits_Ex
Page 17
of v i is less than (more negative) than - 5 V , the diode will be OFF. So, we replace it by an open circuit as shown in Figure. In this case output will be zero. The input waveform and output waveform are as shown in Figure.
. n i o c . a i d o n . w w w
(b) Square-wave input Step 1: We first identify the input voltage level when diode D is ON. Similar to part (a), for v i > 0 , polarities are such that v i and V R are aiding each other and the diode D is forward biased. Therefore diode can be replaced by short circuit as shown in the Figure. Writing KVL for the loop shown, we get, vi + 5 - v o = 0
or, v o = v i + 5 So input voltage waveform will be shifted upward by + 5 V as shown in Figure. Since v i changes between 0 and + 15 V , v o changes between + 5 V and + 20 V . Step 2: We now identify the input voltage level when diode D is OFF. On that when v i =- 10 V , diode will be OFF and acts as an open circuit as shown in the Figure. Output voltage will be zero in this case. Input output voltage waveforms are shown in the Figure.
Buy GATE KANODIA Books Online at: www.nodia.co.in
Analog Circuits by Kanodia Page 18
Diode Circuits_Ex
Chapter 1
EXAMPLE 1.14
Assume that diodes D 1 and D 2 are ideal in the circuit of Figure. Determine the output voltage waveform when the input voltage is vi = 8 sin wt V . SOLUTION :
. n i o c . a i d o n . w w w
Step 1: When v i = 0 , we see that cathode of D 1 is at positive potential than anode. Hence D 1 is OFF. Similarly, anode of D 2 is at negative potential than its cathode. Hence D 2 is also OFF. This condition will continue till the instantaneous value of v i is less than 2 V. Replace both the diodes D 1 and D 2 by open circuit as shown in the Figure. Therefore, input appears same at the output i.e., vo = v i .
Step 2: When instantaneous v i 2 2 V , anode of D 1 is more positive compared to cathode. Therefore, D 1 is turned ON. However, D 2 is still OFF as its anode at - 4 V . Replace diode D 1 by short circuit and D 2 by an open circuit as shown in Figure.
Buy GATE KANODIA Books Online at: www.nodia.co.in
Analog Circuits by Kanodia Chapter 1
Diode Circuits_Ex
Page 19
Writing KVL expression for the left half loop, we get vi - i1 10 k - i 1 10 k - 2 = 0
_ i _ i i _10 + 10i = v - 2 1
i
2
i 1 = v i -
20
...(i)
Output voltage, v o = i 1 (10 k) + 2 Substituting i 1 from Eq (i) into Eq (ii), we get 2 10 + 2 v o = v i 20
...(ii)
. n i o c . a i d o n . w w w c
m_ i
v o = 1 v i + 1
...(iii)
2 Therefore, in this condition, each value of input is multiplied by 0.5 and shifted upward by + 1 V . At the peak value of input, v i = 8 V , output will be v o = 5 V . Step 3: In the negative half cycle when - 4 V < v i < 0 , both D 1 and D 2 are OFF and replaced by open circuits as shown in Figure. Hence, the output will be same as input under this range of input. Step 4: In negative half cycle when v i # - 4 V , anode of diode D 2 becomes less negative compared to cathode and it gets forward biased. However, D 1 remains OFF in this input range. Replacing D 1 by an open circuit and D 2 by short circuit, we obtain an equivalent circuit as shown in Figure. Output in this case will be v o =- 4 V .
The input and output waveforms are shown in fig//.
Buy GATE KANODIA Books Online at: www.nodia.co.in
Analog Circuits by Kanodia Page 20
Diode Circuits_Ex
Chapter 1
EXAMPLE 1.15
The input voltage for the circuit shown in Figure (a) is shown in Figure (b). Determine the waveform of output voltage v o . Assume diodes D 1 and D 2 are Si diodes with V = 0.7 V . g
SOLUTION :
. n i o c . a i d o n . w w w
Step 1: First we determine the input voltage level at which diode D 1 conducts. Since cathode of D 1 is at + 5 V , its anode should be at 0.7 V higher voltage than cathode to become ON, i.e., to make D 1 on; v i $ 5.7 V . Hence, in the positive half cycle of input, when instantaneous voltage at anode of D 1 is more than 5.7 V, diode D 1 will be ON. However, for this input range, diode D 2 will be OFF, since its anode is at - 5 V and input is in positive half cycle.
Replacing D 1 by is simplified model and D 2 by an open circuit, we obtain the equivalent circuit as shown in Figure. Therefore, the output will be v o = 5 + 0.7 = 5.7 V
Step 2: We now find the input voltage level for which diode D 2 conducts. Since anode of D 2 is at - 5 V , its cathode should be at a potential 0.7 V below this (more negative). Thus, when instantaneous input reaches - 5 - 0.7 =- 5.7 V in the negative half cycle, diode D 2 will be ON. However, diode D 1 will not be ON in the negative half cycle of input. Replace D 2 by its simplified model and D 1 by an open circuit as shown in Figure. Therefore, the output will be
Buy GATE KANODIA Books Online at: www.nodia.co.in
Analog Circuits by Kanodia Chapter 1
Diode Circuits_Ex
Page 21
v o =- 5 - 0.7 =- 5.7 V
Step 3: Note that in positive half cycle when the input v i < 5.7 , both the diodes D 1 and D 2 are off and acts as open circuit as shown in Figure. Therefore, for this input range output vo = v i . Step 4: Similarly in the negative half cycle when the input - 5.7 < v i < 0 , both the diodes D 1 and D 2 are off and acts as open circuit as shown in Figure. Therefore, also for this input range output vo = v i . The input output waveforms are shown in Figure.
EXAMPLE 1.16
. n i o c . a i d o n . w w w
The diodes shown in Figure are assumed to be ideal. (a) Plot transfer characteristic of the circuit showing all intercepts and slopes. (b) If an input voltage of vi = 40 sin wt is applied to the circuit, find the values of wt at which diode D 2 starts and stops conducting in a cycle.
SOLUTION :
(a) We can see that in positive half cycle, diode D 1 is forward biased.
Buy GATE KANODIA Books Online at: www.nodia.co.in
Analog Circuits by Kanodia Page 22
Diode Circuits_Ex
Chapter 1
Since it is an ideal diode, it Can be replaced by a short circuit. The resulting equivalent circuit is shown in figure.
Now, the circuit to the left of points A and B can be replaced by its Thevenin equivalent. Thevenin voltage and resistance can be obtained by the circuits of Figure and Figure respectively. Thevenin Voltage, v Th = 10 vi = 20 sin wt 10 + 10 Thevenin Resistance,
_
i
RTh = 10 k + 10 k || 10 k = 15 k
. n i o c . a i d o n . w w w
The resultant equivalent circuit is shown in Figure.
Now the equivalent circuit becomes as the circuit of a simple parallel-biased clipper circuit. If V Th < 10 V (i.e. v i is less than 20 V ), diode D 2 is OFF and acts as open circuit. Therefore output will be vo = vTh = 20 sin wt . When v Th exceeds 10 V (i.e., v i exceeds 20 V), diode D 2 conducts and the output will be clipped off at 10 V. In negative half cycle of input, both D 1 and D 2 are off and act as an open circuit. Hence output voltage v o = 0 . Thus, the transfer characteristic of the circuit is as shown in Figure.
Buy GATE KANODIA Books Online at: www.nodia.co.in
Analog Ana log Circuit Circuitss by Kanod Kanodia ia Chapter 1
Diode Circuits_Ex
Page 23
(b) The output waveform can be obtained by superimposing input waveform on transfer characteristic. As explained, For 0 < v i < 20 V ,
v o o = v i i
For v i > 20 V ,
v o o = 10 V
For v i < 0 , v o o = 0 Figure// shows input waveform, V Th waveform and output waveform v o o . As seen from figure, D 2 starts conducting when v o o = 10 V , i.e., when vTh = 20 sin sin wt Therefore,
wt 1
= 30c
D 2 stops conducting when v o o = 10 V
i.e.,
wt 2
_ i
= 90 + sin -1 0.5 = 120c
EXAMPLE 1.17
The triangular waveform shown in Figure (a) is applied to clipping circuit of Figure (b). D 1 and D 2 are silicon diodes with V = 0.7 V and r f = 0 . Draw the output waveform of the circuit. g
SOLUTION :
. n n i o c c . a a i d o n . w w w
Step 1: By 1: By observing the polarities of reference voltages, we can see that in positive half cycle of input, diode D 1 does not conduct till v i i exceeds 5.3 + 0.7 = 6 V . Diode D 2 does not conduct in entire positive half cycle as its cathode remains positive w.r.t. anode. Therefore, for the input range 0 < v i < 6 V both the diodes are OFF and act as open circuit as shown in Figure. The output in this case, v o o = v i i
Buy GATE KANODIA Books Online at: www.nodia.co.in
Analog Ana log Circuit Circuitss by Kanod Kanodia ia Page 24
Diode Circuits_Ex
Chapter 1
Step 2: When 2: When v i i 2 6 V in positive half cycle of input, D 1 conducts. D 2 is still OFF. Therefore, the equivalent circuit for this range of input voltage ( v i > 6 V ) is as shown in Figure. From the circuit we can see that the output voltage is clipped-off to to +6 V.
Step 3: During 3: During the negative half cycle, when v i i becomes more negative then - 7.3 - 0.7 = - 8 V , D 2 conducts. However, D 1 will be OFF in the entire negative half cycle. The equivalent circuit for this input range is shown in Figure.
.
. n n i o c c . a a i d o n . w w w
Step 3: Note 3: Note that in negative half cycle, when the input - 8 V < v i < 0 , both diode are OFF in this condition also and output is same as input. The input output voltages are shown in Figure below. EXAMPLE 1.18
The input waveform shown in Figure (a) is applied to the clipper circuit of Figure (b). Draw the transfer characteristic of the circuit if (a) the diode D is ideal (b) diode D is a practical diode with parameters V = 0.5 0.5 V and R f = 40 W g
Buy GATE KANODIA Books Online at: www.nodia.co.in
Analog Ana log Circuit Circuitss by Kanod Kanodia ia Chapter 1
Diode Circuits_Ex
Page 25
SOLUTION :
(a) When the diode is ideal Step 1 : First we obtain Thevenin equivalent equivalent of the circuit across the branch containing diode and 5 V source. Thevenin Voltage v Th : Thevenin voltage or open circuit voltage v Th can be obtained from the circuit shown in figure. 50 v = 1 v v Th = 50 + 200 i 5 i Thevenin Resistance RTh : Thevenin resistance is obtained when the input v i i is short circuited as shown in the figure. Writing nodal equation at output v0 - vTh v 0 - 5.5 + =0 40 40 2v 0 = v Th + 5.5 1 v 0 = v Th + 2.75 3 (vTh = 1/5v i ) v 0 = 1 v i + 2.75 10 Diode will be OFF when
_ i
_ i
. n n i o c c . a a i d o n . w w w v Th < 5.5 5.5 V
1 v < 5.5 5 i 27.5 V v i i < 27.5 In that case, diode acts as an open circuit and output v 0 = vTh = 1 v i 5 1 So, when v i i H 27.5 v 0 = v + 2.75 2.75 V , 27.5 V 10 i v 0 = 1 v i , when v i < 27.5 27.5 V 5 (b) When the diode is a practical diode with V = 0.5 V and r f = 40 W Again we consider the circuit including Thevenin equivalent Diode will be ON when or
g
v Th
H
5 + 0.5
or 5.5 V v Th H 5.5 In that case, diode can be replaced by its piecewise linear model as shown in figure.
RTh = 200 W | | 50 W = 40 W
Buy GATE KANODIA Books Online at: www.nodia.co.in
Analog Circuits by Kanodia Page 26
Diode Circuits_Ex
Chapter 1
Step 2 : Now, the equivalent circuit becomes as shown in figure
Note that diode will be ON when or
v Th
H
5V
1 v 5 i
H
5V
v i H 25 V Therefore when v i H 25 V , diode becomes ON and acts as short circuit
as shown in figure. The output will be v 0 = 5 V
. n i o c . a i d o n . w w w
Step 3 : Diode is OFF if v Th < 5 V 1 v < 5 or 5 i v i < 25 V In this condition, diode acts as an open circuit as shown in figure output will be v 0 = vTh = 1 v i 5 So, v 0 = 5 V , when v i H 25 V 1 v 0 = v i , when v i < 25 V 5 The transfer characteristics is shown in figure.
Buy GATE KANODIA Books Online at: www.nodia.co.in
Analog Circuits by Kanodia Chapter 1
Diode Circuits_Ex
Page 27
The transfer characteristics can be drawn as shown in figure.
EXAMPLE 1.19
Consider a diode clipper circuit as shown in Figure. The diodes are assumed to be ideal and a sinusoidal voltage of peak magnitude of 15 V is applied to the circuit. Draw (a) transfer characteristics (b) output voltage waveform v o SOLUTION :
. n i o c . a i d o n . w w w
Step 1 : In the positive half cycle when v i < 3 V , D 1 is OFF and D 2 is ON. Therefore the equivalent circuit is as shown in figure. Writing node equation at output v 0 - 3 v 0 - 10 + =0 10k 20k 2v0 - 6 + v 0 - 10 = 0 So, v 0 = 16 V = V A 3 Step 2 : We can see from the figure that D 1 will remain OFF until vi < V A or v i < 163 V . We can also verify this by knowing the directions of current. This can be calculated as follows : Let D 1 starts conducting and D 2 is also forward biased. So the equivalent circuit is shown as below. In this case
v i = V A I 1 = v i - 3 + v i - 10 10k 20k I 1 = v i 3 - 16
c 20 m c 20 m
If D 1 will be forward biased then I 1 > 0 3 - 16 > 0 So v i 20 20 v i > 16 V 3 16 So, when v i > ( D 1 ON, D 2 ON) V , v 0 = v i 3 and, when v i < 16 V , v 0 = 16 V ( D 1 OFF, D 2 ON) 3 3 Step 3 : From the figure // we can see that D 2 will remain ON until
c m c m
Buy GATE KANODIA Books Online at: www.nodia.co.in
Analog Circuits by Kanodia Page 28
Diode Circuits_Ex
Chapter 1
v i < 10 V . when v i > 10 V D 2 will be reverse biased. We can also verify this by knowing the direction of current through D 2 . 10 - v i < 0 I 2 = 20k v i > 10 V In that case circuit becomes as shown figure.
So, When v i > 10 V , v 0 = 10 V ( D 1 ON, D 2 OFF) Step 4 : Note that in entire negative half cycle D 1 will be OFF and D 2 will be ON, So v 0 = 16 V 3 Transfer characteristics : From the result of step 1-4, we summarize 16 V , when v < 16 V v 0 = i 3 3 16 V < v i < 10 V v 0 = v i , when 3 v 0 = 10 V , when v i > 10 V Transfer characteristics can be drawn as shown in figure.
Output voltage :
. n i o c . a i d o n . w w w
EXAMPLE 1.20
Buy GATE KANODIA Books Online at: www.nodia.co.in
Analog Circuits by Kanodia Chapter 1
Diode Circuits_Ex
Page 29
The clipping circuit shown in Figure contains ideal dio des D 1 and D 2 . If the input voltage varying from 0 to 120 V in time 0 to T as shown in Figure (b), determine the transfer characteristics for the circuit.
SOLUTION :
Step 1 : From the figure we can see that as input increase from 0 to 120 V, first diode D 2 will start conducting because its cathode is connected at a less voltage (15 V) as compared to cathode of D 2 75 V . Step 2 : We find the input level for which D 2 starts conducting. Let D 1 is OFF is this input range. The equivalent circuit is shown in figure. Current through D 2 I 2 = vi - 15 = v i - 15 100 + 200 300 For D 2 to ON, I 2 should be positive
_ i
. n i o c . a i d o n . w w w
I 2 > 0
or
v i - 15 > 0
300
v i > 15 V
In this case, output will be
v 0 = vi - 100I 2 = v i - 100
So, when v i > 15 V
- 15 cv 300 m i
2 v + 5 ( D 1 OFF, D 2 ON) 3 i Step 2 : Note that for v i < 15 V , both D 1 and D 2 are OFF and the equivalent circuit is shown in figure. v 0 =
So, ( D 1 OFF, D 2 OFF) v 0 = 15 V , when v i < 15 V Step 3 : Now we find the input level at which D 1 also starts conducting. If both D 1 and D 2 are conducting, equivalent circuit becomes as shown in figure, Writing node equation 75 - vi = 0 I1 + I 2 + 100 I 1 +
75 - 15 + 75 - v i = 0 200 100
Buy GATE KANODIA Books Online at: www.nodia.co.in
Analog Circuits by Kanodia Page 30
Diode Circuits_Ex
Chapter 1
I 1 + 60 + 75 - v i = 0
200
I 1 +
100
60 + 150 - 2v i = 0 200
210 - 2v i = 0 200 2v 210 I 1 = 1 200 D 1 conducts, if I 1 is positive, so I 1 +
I 1 > 0
2v i - 210 > 0 200 v i > 105 V
or
So, when v i = 105 V , v 0 = 75 V From the results of step 1-4, we have for v i < 15 V ,
v 0 = 15 V
( D 1 ON, D 2 ON) ( D 1 OFF, D 2 OFF)
for 15 V < v i < 105 V , v 0 = 2 v i + 5 ( D 1 OFF, D 2 ON) 3 for v i > 105 V , ( D 1 ON, D 2 ON) v 0 = 75 V The transfer characteristics can be drawn as shown in figure.
EXAMPLE 1.21
. n i o c . a i d o n . w w w
Draw the output v o of the circuit shown in Figure (a) for a sinusoidal input shown in Figure (b). Assume the diodes are ideal.
Buy GATE KANODIA Books Online at: www.nodia.co.in
Analog Circuits by Kanodia Chapter 1
Diode Circuits_Ex
Page 31
SOLUTION :
Step 1: First we determine the input voltage level at which diode D 1 conducts. Since cathode of D 1 is at + 5 V , its anode should be at a voltage higher than cathode to become ON, i.e., to make D 1 on; v i $ 5 V . Hence, in the positive half cycle of input, when instantaneous voltage at anode of D 1 is more than 5 V, diode D 1 will be ON. However, for this input range, diode D 2 will be OFF, since its anode is at - 3 V and input is in positive half cycle. Replacing D 1 by short circuit and D 2 by an open circuit, we obtain the equivalent circuit as shown in Figure. Therefore, the output will be v o = 5 V ,
for v i $ 5 V Step 2: We now find the input voltage level for which diode D 2 conducts. Since anode of D 2 is at - 3 V , its cathode should be at a potential below (more negative) than - 3 V . Thus, when instantaneous input reaches - 3 V in the negative half cycle, diode D 2 will be ON. However, diode D 1 will not be ON in the negative half cycle of input. Replace D 2 by its simplified model and D 1 by an open circuit as shown in Figure. Therefore, the output will be
. n i o c . a i d o n . w w w v o =- 3 V ,
for v i # - 3 V Step 3: Note that in positive half cycle when the input v i < 5 V , both the diodes D 1 and D 2 are off and acts as open circuit as shown in Figure. Therefore, for this input range output vo = v i . Step 4: Similarly in the negative half cycle when the input - 3 V < v i < 0 , both the diodes D 1 and D 2 are off and acts as open circuit as shown in Figure. Therefore, also for this input range output vo = v i . The input output waveforms are shown in Figure.
EXAMPLE 1.22
Draw the output voltage waveform for the circuit shown in Figure (b) if the sinusoidal signal shown in Figure (a) is applied. Given that cut-in voltage of diode is 0.7 V.
Buy GATE KANODIA Books Online at: www.nodia.co.in
Analog Circuits by Kanodia Page 32
Diode Circuits_Ex
Chapter 1
SOLUTION :
First we find the input voltage level at which diode D starts conducting. Since cathode of D 1 is at + 5 V , its anode should be at 0.7 V higher voltage than cathode to become ON, i.e., to make D 1 on; v i $ 5.7 V . Hence, in the positive half cycle of input, when instantaneous voltage at anode of D 1 is more than 5.7 V, diode D 1 will be ON. The equivalent circuit for this input range is as shown in Figure. Therefore, v o = 5 + 0.7 = 5.7 V . However, for v i < 5.7 V in positive half-cycle and for entire negative half cycle diode does not conduct and acts as an open circuit. Therefore vo = v i . The output waveform is as shown in figure.
. n i o c . a i d o n . w w w
Buy GATE KANODIA Books Online at: www.nodia.co.in
Analog Circuits by Kanodia Chapter 1
Diode Circuits_Ex
Page 33
EXAMPLE 1.23
Consider the circuit shown in Figure//. Given that cut-in voltage of diode is V = 0 and zener voltage is V Z = 3 V . For the input range of - 10 # v i # + 10 V , plot (a) v o versus v i (b) current i 1 versus v i g
SOLUTION :
(a) (i) For - 10 # v i # 0 , both diodes are conducting, so the equivalent circuit is as shown in Figure. The output in this input range is v o = 0 .
. n i o c . a i d o n . w w w
(ii) For 0 # v i # 3 , Zener diode is in reverse bias but since the applied voltage is less than zener breakdown voltage V Z , it will not breakdown and acts as an open circuit as shown in Figure. However, diode D will be OFF in this condition. Current,
i 1 = 0 ,
v o = 0
(iii) For v i 2 3 , zener diode goes into breakdown and acts as a voltage source of 3 V with polarity as shown in Figure. Diode D remains OFF in this condition as its cathode becomes positive w.r.t. its anode.
Buy GATE KANODIA Books Online at: www.nodia.co.in
Analog Circuits by Kanodia Page 34
Diode Circuits_Ex
Chapter 1
Applying KVL in the loop, we get
_ i
_ i
vi - i1 10 k - 3 - i 1 10 k = 0 v i - 3 mA
or
i 1 =
Output voltage,
v o = 10i 1 = v i - 3 10
20
c
20
m_ i
1 v - 1.5 2 i At v i = 10 V , v o = 3.5 V , i 1 = 0.35 mA Using above results we can draw the transfer characteristics of the circuit as shown in Figure below. (b) For v i 1 0 , both diodes forward biased. The equivalent circuit is as shown in Figure. From the circuit, 0 i 1 = v i 10 =
. n i o c . a i d o n . w w w
At v i =- 10 V ,
i 1 =- 1 mA
For 0 # v i # 3 ,
i 1 = 0
For v i 2 3 ,
i 1 = v i -
At v i = 10 V ,
i 1 = 0.35 mA
Therefore, the current
20
3
EXAMPLE 1.24
The diode in the circuit of Figure has piecewise linear parameters V = 0.7 V and r f = 10 W . Plot v o versus v i for - 30 V # v i # 30 V . g
SOLUTION :
(a) First we find the input voltage level at which diode D starts
Buy GATE KANODIA Books Online at: www.nodia.co.in
Analog Circuits by Kanodia Chapter 1
Diode Circuits_Ex
Page 35
conducting. Since cathode of D 1 is at + 10 V , its anode should be at 0.7 V higher voltage than cathode to become ON, i.e., to make D 1 on; v i $ 10.7 V . The equivalent circuit for this input range is as shown in Figure. Writing node equation at the output vo - vi + v o - 10.7 = 0 100 10 vo - vi + 10v o - 107 = 0 11v o = v i + 107 So, v o = 1 v i + 9.72 11 1 v o = (30) + 9.72 . 12.5 V For v i = 30 V , 11 For v i < 10.7 V diode is in reverse bias and acts as an open circuit. Therefore, vo = v i . Note that also for all negative values of v i , diode is OFF and vo = v i . The plot between input and output (transfer characteristics) is drawn in Figure.
EXAMPLE 1.25
. n i o c . a i d o n . w w w
The square wave shown in Figure (a) is applied to the circuits of Figure (b) and (c). Plot v o for each circuit if, (a) cut-in voltage of diode is V = 0 (b) cut-in voltage of diode is V = 0.6 V . g
g
Buy GATE KANODIA Books Online at: www.nodia.co.in
Analog Circuits by Kanodia Page 36
Diode Circuits_Ex
Chapter 1
SOLUTION :
(a) First consider the circuit of Figure (b). When input voltage v i =+ 20 V , cathode of diode will be at 20 + 2 = 22 V . Since, cathode is positive w.r.t anode, diode will be OFF and acts as an open circuit as shown in figure. Therefore v 0 = 0 Now, when input become negative i.e. v i =- 5 V , cathode of diode will have a voltage equal to - 5 + 2 =- 3 V . Since cathode is negative w.r.t anode and diode will be ON. An ideal diode V = 0 can be replaced by short circuit as shown in figure.
_
g
i
vi + 2 - v 0 = 0 - 5 + 2 - v 0 = 0 v 0 =- 3 V
. n i o c . a i d o n . w w w
So, output can be drawn as shown in figure. If V = 0.6 V , then for v i = 20 V output will be same since diode is OFF and equivalent circuit of figure does not change. g
So v 0 = 0 For v i =- 5 V , diode is forward biased and can be replace by a battery of V = 0.6 V as shown in figure. g
vi + 2 + 0.6 - v 0 = 0 - 5 + 2 + 0.6 - v 0 = 0
v 0 =- 2.4 V
Now, output is drawn as shown in figure.
(b) Now consider the circuit of figure (c). Diode D will be ON for v i > 5 V , if diode is ideal. So for v i = 20 V , diode is ON and replaced by a short circuit as shown in figure. v 0 = v i = 20 V
when v i =- 10 V , anode of diode becomes negative w.r.t cathode, so it will be OFF. The equivalent circuit is shown in figure v 0 = 5 V .
Buy GATE KANODIA Books Online at: www.nodia.co.in
Analog Circuits by Kanodia Chapter 1
Diode Circuits_Ex
Page 37
The output is shown in figure. If V = 0.6 V . Then In forward bias we replace diode by a 0.6 V battery as shown in figure. g
vi - 0.6 - v 0 = 0 v 0 = v i - 0.6 = 20 - 0.6 = 19.4 V
. n i o c . a i d o n . w w w
In reverse bias, when v i =- 5 V diode is OFF and the circuit remains same as that of figure. So v 0 = 5 V The output is shown in figure.
EXAMPLE 1.26
Sketch the output voltage waveform over the input voltage waveform for the circuit shown, given that the input varies linearly from 0 to 150 V. Assume ideal diodes. SOLUTION :
Step 1 : By seeing the polarity of applied reference voltage, we can guess that initially when v i . Starts increasing from 0 to 150 V, D 2 will be ON first as its cathode is connected to + 100 V source. Let D 1 is OFF initially.
Buy GATE KANODIA Books Online at: www.nodia.co.in
Analog Circuits by Kanodia Page 38
Diode Circuits_Ex
Chapter 1
So, we replace D 1 by an open circuit and D 2 by a short circuit as shown in figure. Writing node equation at output v0 - 25 v 0 - 100 + =0 100 200 2v0 - 50 + v 0 - 100 = 0 3v 0 - 150 = 0 v 0 = 50 V = v A Step 2 : We can see from the figure that D 1 will remain OFF until vi < V A or v i < 50 V . We can also verify this by knowing the directions
of current. Let D 1 starts conducting and D 2 is also forward biased. So, the equivalent circuit is shown as below. In this case
v i = v A I 1 =
vi - 25
100
I 1 = v i
+
v i - 100
200
3 - 150 c 100 m c 300 m
D 1 will be forward biased, then I 1 > 0
So
v i
or
>0 c1003 m - c 150 300 m
. n i o c . a i d o n . w w w
v i > 50 V
So, when
v i < 50 V , v 0 = 50 V
( D 1 OFF, D 2 ON)
v i > 50 V , v0 = v i
( D 1 ON, v 2 ON) Step 3 : We can see from the figure that D 2 will remain ON until v i < 100 V . When v i > 100 V , D 2 will be reverse biased. We can also verify this by knowing the direction of current through D 2 . v I 2 = 100 - i 200k If D 2 is OFF, then I 2 should be negative 100 - v i < 0 200 v i > 100 V In that case circuit becomes as shown in figure. So, when ( D 1 ON, D 2 OFF) v i > 100 V , v 0 = 100 V The operation of the circuit is summarized in the table below. Input
Output
Diode status
v i # 50 V
v o = 50 V
D 1 off, D 2 on
50 V 1 v i # 100 V
vo = v i
D 1 on, D 2 on
v i 2 100 V
v o = 100 V
D 1 on, D 2 off
Transfer characteristics can be drawn as shown in figure.
Buy GATE KANODIA Books Online at: www.nodia.co.in
Analog Circuits by Kanodia Chapter 1
Diode Circuits_Ex
Page 39
The operation of the circuit is summarised in the table given below.
EXAMPLE 1.27
In the circuit shown in Figure assume diodes cut-in voltage is 1 V. (a) Plot the transfer characteristic for the circuit (b) Sketch v o if vi = 40 sin wt
. n i o c . a i d o n . w w w
SOLUTION :
(a) From the circuit, we can see that in positive half cycle diode D 1 will always be OFF as its cathode is connected to input. However, diode D 2 will start conducting when instantaneous voltage at anode of D 2 is greater than cut-in voltage i.e., v i $ 1 V . The equivalent circuit is therefore as shown in Figure.
Applying KVL to the circuit of Figure
_ i
_ i
vi - i 1 k - 1 - i 1 k = 0 - 1, i = v i
2
for v i $ 1 V
_ i
Output voltage,
v o = 1 + i 1 k
Substituting i , we get
1 v o = 1 + v i -
2 1 1 or, ...(i) v o = v i + , for v i $ 1 V 2 2 In the negative half cycle, diode D 2 will never conduct since its anode is negative w.r.t. cathode. However in negative half cycle, diode D 1
Buy GATE KANODIA Books Online at: www.nodia.co.in
Analog Circuits by Kanodia Page 40
Diode Circuits_Ex
Chapter 1
starts conducting when instantaneous voltage at cathode of D 1 is less than - 1 V i.e. cathode is more negative compared to its anode or v i # - 1 V . Applying KVL to the circuit of Figure
_ i
_ i
vi - i 1 k + 1 - i 1 k = 0 i =
v i + 1
2
_i
Output voltage,
v o =- 1 + i 1
Substituting i , we get
v o =- 1 +
v i + 1
2 1 1 So, v o = v i - , for v i # - 1 V 2 2 For - 1 V 1 v i 1 1 V , both D 1 and D 2 are off. Therefore,
...(ii)
...(iii) v o = v i From the above results, the transfer characteristic can be drawn as shown in Figure. (b) Using Eq (i), (ii) and (iii), we can draw the output characteristics as shown in Figure.
EXAMPLE 1.28
. n i o c . a i d o n . w w w
Figure (a) shows the circuit of a negative clamper and Figure (b) show the input waveform applied to the circuit. Assume cut-in voltage of diode to be V = 0.6 V . Determine the steady state output voltage v o . g
Buy GATE KANODIA Books Online at: www.nodia.co.in
Analog Circuits by Kanodia Chapter 1
Diode Circuits_Ex
Page 41
SOLUTION :
Step 1: We can see that diode conducts in the positive half cycle of input. Thus, it acts as a short circuit as shown in Figure. Step 2: Therefore, during positive half cycle the capacitor charges upto peak voltage of input less diode cut-in voltage i.e., it charges upto Vm - V .
_
i
g
Step 3: In the positive half cycle, when the input starts decreasing from the value Vm - V , the diode becomes reverse-biased as shown in fig//. This is because capacitor stops charging, as it does not accept voltage below the value, Vm - V . Step 4: In fact, the capacitor now tends to discharge through resistor R . Since time constant ( RC = 22 m sec ) is much larger than the time period of the input waveform (T = 1msec ), the discharge of the capacitor is negligible. Therefore, the voltage across the capacitor remains constant at Vm - V . Under this condition, the capacitor charged to Vm - V is equivalent to a DC source of Vm - V volts with polarity as shown in fig//. Step 5: The output at any instant of time is then equal to algebraic sum of input voltage and voltage across the capacitor. Applying Kirchhoff’s voltage law around the input loop in fig//, we get
_
i
g
_
_
i
_
i
g
i
g
_
g
_
i
g
. n i o c . a i d o n . w w w i
v i - Vm - V g - v 0 = 0
_ i = v - _12 - 0.6i
v 0 = v i - Vm - V g v 0
i
v 0 = v i - 11.4
...(i) This expression shows that in the positive half cycle of input, output wave shape is same as that of input. However, there is a dc shift of 11.4 V below 0 (downwards). Note that for negative half cycle of input, diode D does not conduct in the steady-state (recall that for clamping circuit, diode conducts in first half cycle of input ac and capacitor in the circuit is charged. After the capacitor is charged, ideally, the diode does not conduct in subsequent cycles of input). Form Eq (i), it is clear that p ositive peak of output will appear at 12 - 11.4 = 0.6 V and negative peak will be at - 12 - 11.4 =- 23.4 V . The steady state output waveform is therefore as shown in Figure. Note that since output is drawn for steady state, the time axis 0 is not shown. EXAMPLE 1.29
For the DC restorer circuit shown in Figure (a), plot the output voltage for the input shown in Figure (b). Assume diode D is ideal.
Buy GATE KANODIA Books Online at: www.nodia.co.in
Analog Circuits by Kanodia Page 42
Diode Circuits_Ex
Chapter 1
SOLUTION :
Step 1: First we consider the part of ac signal for which diode is forward biased (ON). Step 2: From the circuit, we can see that diode conducts only when its cathode has a potential less than + 5 V . In the interval 0 to t 1 , v i = 10 V , so diode does not conduct in this interval. Now, consider the interval from t 1 to t 2 , when v i =- 20 V . This makes cathode of diode more negative compared to its anode. So, diode conducts in this interval and acts as a short circuit as shown in Figure. Therefore, the capacitor gets charged to a maximum voltage voltage V C with polarity as shown in Figure. Writing KVL in the circuit vi + V C - 5 = 0 - 20 + V C - 5 = 0
. n i o c . a i d o n . w w w v i =- 20 V
V C = 20 + 5 = 25 V
Step 3: As we know that in clamping circuits, after the capacitor is charged, ideally, the diode does not conduct in subsequent cycles of input). In the subsequent cycles diode acts as open circuit and capacitor acts as a 25 V source with polarity as shown in Figure. Step 4: Now in steady state, output of clamper can be obtained by writing KVL in the circuit of Figure. vi + 25 - v o = 0 v o = v i + 25
Therefore, input voltage is shifted upward by + 25 V . Figure shows the output waveform v o . It is clear form the figure that positive peak 10 V of input is appear at 10 + 25 = 35 V in the output and negative peak - 20 V appears at - 20 + 25 =+ 5 V .
_ i _
i
EXAMPLE 1.30
Draw the output v o for the clamping circuit shown in Figure (a) for the given sinusoidal input signal shown in Figure (b).
Buy GATE KANODIA Books Online at: www.nodia.co.in
Analog Circuits by Kanodia Chapter 1
Diode Circuits_Ex
Page 43
SOLUTION :
Step 1: First we consider the part of ac signal for which diode is forward biased (ON). Step 2: During the positive half cycle of input, cathode of diode is positive w.r.t. its anode, so it does not conduct. During the negative half cycle of input, the diode conducts and acts like a short circuit as shown in Figure. Now, the capacitor is charged to peak voltage of input V m = 10 V with polarities as shown in Figure. Writing KVL in the circuit
. n i o c . a i d o n . w w w vi + V C = 0
- 10 + V C = 0
vi =- V m =- 10 V
V C = 10 V
Step 3: During the positive half cycle of the input signal, the diode does not conduct, and acts like an open circuit as shown in Figure. In fact, after the capacitor is charged once, ideally, the diode does not conduct in subsequent cycles of input. In the subsequent cycles diode acts as open circuit and capacitor acts as a 10 V source with polarity as shown in Figure. Step 4: In steady state, output of clamper can be obtained by writing KVL in the circuit when diode if OFF and capacitor has been charged upto a fixed value. Therefore, vi + 10 - v o = 0 v o = v i + 10 Hence, the input is shifted upwards by + 10 V . That is, positive peak of input will appear at 10 + 10 = 20 V in the output and negative peak of input will appear at - 10 + 10 = 0 as shown in Figure. EXAMPLE 1.31
Draw the output v o for the clamping circuit shown in Figure (a) for the given sinusoidal input signal shown in Figure (b).
Buy GATE KANODIA Books Online at: www.nodia.co.in
Analog Circuits by Kanodia Page 44
Diode Circuits_Ex
Chapter 1
SOLUTION :
Step 1: First we consider the part of ac signal for which diode is forward biased (ON). Step 2: During the positive half cycle of input, anode of diode is positive w.r.t. cathode , therefore diode conducts in this cycle and acts as a short circuit. The equivalent circuit is shown in Figure. Now, the capacitor is charged to V m = 12 V with polarities as shown in Figure. Writing KVL in the circuit
. n i o c . a i d o n . w w w
vi - V C = 0
12 - V C = 0
vi = V m = 12 V
V C = 12 V
Step 3: During the negative half of the input signal, the diode does not conduct and acts like an open circuit as shown in Figure. In steady state, output of clamper can be obtained by writing KVL in the circuit when diode if OFF and capacitor has been charged upto a fixed value. Therefore, vi - 12 - v o = 0
v o = v i - 12
Hence, the input is shifted by 10 V downwards. That is positive peak of input + 12 V will appear at 12 - 12 = 0 in the output and negative peak - 12 V will appear at - 12 - 12 =- 24 V as shown in Figure.
_
_
i
i
EXAMPLE 1.32
Sketch v o versus time for the circuit with the input shown in Figure. Assume diode is ideal and the time constant RC is large.
Buy GATE KANODIA Books Online at: www.nodia.co.in
Analog Circuits by Kanodia Chapter 1
Diode Circuits_Ex
Page 45
SOLUTION :
Step 1: First we consider the part of ac signal for which diode is forward biased (ON).
. n i o c . a i d o n . w w w
Step 2: During the positive half cycle of input when v i =+ 20 V , cathode of diode is positive w.r.t. its anode, so it does not conduct. During the negative half cycle of input when v i =- 20 V , the diode conducts and acts like a short circuit as shown in Figure. Now, the capacitor is charged to a maximum value V C with polarities as shown in Figure. Writing KVL in the circuit vi + V C + 5 = 0 - 20 + V C + 5 = 0
v i =- 20 V
V C = 20 - 5 = 15 V
Step 3: During the positive half cycle of the input signal, the diode does not conduct, and acts like an open circuit as shown in Figure. In fact, after the capacitor is charged once, ideally, the diode does not conduct in subsequent cycles of input. In the subsequent cycles diode acts as open circuit and capacitor acts as a 15 V source with polarity as shown in Figure. Step 4: In steady state, output of clamper can be obtained by writing KVL in the circuit when diode is OFF (open circuit) and capacitor acts as a voltage source as shown in Figure. vi + 15 - v o = 0
v o = v i + 15 Hence, the input is shifted upwards by + 15 V . Since input changes from + 20 V to - 20 V , output will change from 20 + 15 =+ 35 V to - 20 + 15 =- 5 V . The output waveform is shown in Figure. EXAMPLE 1.33
Design a diode clamper to generate the output v o from the input v i shown in Figure if cut-in voltage of diode
Buy GATE KANODIA Books Online at: www.nodia.co.in
Analog Circuits by Kanodia Page 46
Diode Circuits_Ex
Chapter 1
(a) V = 0 and (b) V = 0.7 V g
g
SOLUTION :
From the output waveform we can see that input is shifted by 10 - 27 = 7.3 V downward. This can be possible with a biased negative clamper. Figure shows a biased negative clamper with bias voltage V R . v 0 = v i - 7.3 V Since input is shifted by 7.3 V. This is the maximum voltage by which capacitor must be charged when diode conducts. Assume that the diode conducts in p ositive half cycle when v i =+ 10 V . The equivalent circuit when diode conducts is shown in figure. Writing KVL vi - VC - V R = 0
10 - 7.3 - V R = 0
. n i o c . a i d o n . w w w
V R = 2.7 V Since out in voltage V g = 0 , we replaced the forward biased diode by
short circuit. (b) Now, when V = 0.7 V , the forward biased diode is replaced by a source of 0.7 V as shown in figure. Applying KVL g
vi - VC - 0.7 - V R = 0
10 - 7.3 - 0.7 - V R = 0
V R = 10 - 8 = 2 V
EXAMPLE 1.34
Design a suitable circuit represented by the box shown below which has input and output waveforms as indicated.
Buy GATE KANODIA Books Online at: www.nodia.co.in
Analog Circuits by Kanodia Chapter 1
Diode Circuits_Ex
Page 47
SOLUTION :
From the output waveform, we can see that input is shifted upward by 30 - 20 = 10 V . This can be possible with a biased positive clamper. The circuit of a biased positive clamper is shown in figure with a bias voltage V R . Since input is shifted by 10 V, this is the maximum voltage by which capacitor must be charged when diode is ON. Assume that in negative half cycle of input when v i =- 20 V , capacitor charges upto 10 V with polarity as shown in figure. writing KVL
. n i o c . a i d o n . w w w
vi + 10 - V R = 0 - 20 + 10 - V R = 0
V R =- 10 V
Note :- As a general method of designing calmper circuit, we can remember that in positive clamper diode conducts in negative half cycle of input with polarity as shown in figure, whereas in negative clamper diode conducts in positive half cycle of input with polarity as shown in figure//. EXAMPLE 1.35
For the circuit shown below find and plot the waveform of v o for the input indicated. Assume cut-in voltage for diode is 0.7 V.
Buy GATE KANODIA Books Online at: www.nodia.co.in
Analog Circuits by Kanodia Page 48
Diode Circuits_Ex
Chapter 1
SOLUTION :
Step 1: First we consider the part of ac signal for which diode is forward biased (ON). Step 2: From the circuit, we can see that diode conducts, in the negative half cycle and replaced by its equivalent model as shown in Figure. So, when v i =- 24 V , the capacitor gets charged to a maximum voltage voltage V C with polarity as shown in Figure. Writing KVL in the circuit vi + V C + 0.7 - 6 = 0 - 24 + V C + 0.7 - 6 = 0
v i =- 20 V
V C = 30 - 0.7 = 29.3 V
Step 3: As we know that in clamping circuits, after the capacitor is charged, ideally, the diode does not conduct in subsequent cycles of input). In the subsequent cycles diode acts as open circuit and capacitor acts as a 29.3 V source with polarity as shown in Figure. Step 4: Now in steady state, output of clamper can be obtained by writing KVL in the circuit of Figure. vi + 29.3 - v o = 0 v o = v i + 29.3 Therefore, input voltage is shifted upward by + 29.3 V . Figure shows the output waveform v o . It is clear form the figure that positive peak 12 V of input is appear at 12 + 29.3 = 41.3 V in the output and negative peak - 24 V appears at - 24 + 29.3 =+ 5.3 V .
_ i
_
EXAMPLE 1.36
i
. n i o c . a i d o n . w w w Mahadeva/123/1.58
For the circuit shown find and plot the output waveform for the input indicated. Also sketch the output waveform assuming ideal diode.
SOLUTION :
Step 1: First we consider the part of ac signal for which diode is forward biased (ON). Step 2: From the circuit, we can see that diode conducts, in the
Buy GATE KANODIA Books Online at: www.nodia.co.in
Analog Circuits by Kanodia Chapter 1
Diode Circuits_Ex
Page 49
positive half cycle when v i exceeds 20 V. The diode acts as short circuit when it conducts as shown in Figure. Therefore, during p ositive cycle when input reaches to its peak value V m , capacitor get charged to a maximum voltage V C with polarity as shown in Figure. Writing KVL in the circuit vi - V C - 20 = 0
100 - V C - 20 = 0
vi = V m =+ 100 V
V C = 100 - 20 = 80 V
Step 3: As we know that in clamping circuits, after the capacitor is charged, ideally, the diode does not conduct in subsequent cycles of input). In the subsequent cycles diode acts as open circuit and capacitor acts as a 80 V source with polarity as shown in Figure. Step 4: Now in steady state, output of clamper can be obtained by writing KVL in the circuit of Figure. vi - 80 - v o = 0 v o = v i - 80
Therefore, input voltage is shifted downward by 80 V . Figure shows the output waveform v o . It is clear form the figure that positive peak 100 V of input is appear at 100 - 80 = 20 V in the output and negative peak - 100 V appears at - 100 - 80 = - 180 V .
_
i
_
EXAMPLE 1.37
. n i o c . a i d o n . w w w i
A centre-tapped full wave rectifier has load resistance RL = 50 W . Each diode has a forward dynamic resistance R f = 2 W . The rms voltage across each half of secondary winding is 20 V and the dc winding resistance of each half of secondary winding is 5 W . Calculate (a) dc power delivered to load (b) % load regulation (c) Efficiency of rectification (d) TUF of secondary SOLUTION :
Given that: RMS voltage across half secondary,
V 2 = 20 V
Resistance of each half of secondary,
RS = 5 W
Diode forward resistance,
R f = 2 W
Load resistance,
RL = 50 W
Maximum voltage across each half of secondary, V m =
Peak input current,
I m = =
Output dc current,
2 V 2 =
2 # 20 = 28.28 V
V m RS + Rf + RL
28.28 = 0.496 A 5 + 2 + 50
I dc = 2I m = 2 # 0.496 = 0.315 A p
p
Buy GATE KANODIA Books Online at: www.nodia.co.in
Analog Circuits by Kanodia Page 50
Diode Circuits_Ex
Chapter 1
(a) DC power delivered to load
_
i
2 P dc = I dc RL = 0.315
2
#
50 = 4.96 W
No load output,
V V NL = 2 m = 18 V
Full load output,
V FL = Idc RL = 0.315 # 50 = 15.75 V
(b)
p
% Load regulation = VNL - V FL V FL
=
(c) Efficiency,
h
=
#
100 %
18.0 - 15.75 100 % = 14.28 % # 15.75 8
RL
_R + R + R i 50 = 8 _5 + 2 + 50i = 0.711 2
p
S
f
L
2
p
(d)
TUF = =
=
dc power delivered to load ac power rating of secondary
P dc = V2 # I rms
4.96 V 2 #
I m
2
4.96 = 0.707 or 70.7 % 20 # 0.496 2
. n i o c . a i d o n . w w w
EXAMPLE 1.38
A full-wave rectifier circuit is powered by ac mains. Power transformer has a centre-tapped secondary. The voltage across each half secondary is 220 sin 314t . Forward resistance of each of the diode is 10 W . If the equivalent load resistance is 1 kW , find (a) the peak value of current (b) the dc or average value of current (c) the rms value of current (d) the ripple factor and (e) the rectification efficiency SOLUTION :
Given that:
Peak voltage across half secondary,
V m = 220 V
Diode forward resistance,
R f = 10 W
Load resistance,
RL = 1 kW
(a) Peak value of current 220 V m I m = = = 0.2178 A 10 + 1000 R f + RL
Note that secondary winding resistance is assumed to be zero in this problem.
(b) The dc or average value of current is I = 2I m = 2 # 217.8 = 138.66 mA dc
p
p
(c) The rms value of current is I rms = I m = 154 mA
2
Buy GATE KANODIA Books Online at: www.nodia.co.in
Analog Circuits by Kanodia Chapter 1
Diode Circuits_Ex
Page 51
(d) The ripple factor is given as 2
c m c138154.66 m - 1 = 0.482 I rms -1 I dc
r =
2
=
(e) The rectification efficiency is given as 8 RL h % =
_i
_R + R i 1000 = 8 _10 + 1000i 2
p
f
L
2
p
h
_%i = 0.8025
#
100 % = 80.25 %
EXAMPLE 1.39
An ac supply of 220 V is applied to a half-wave rectifier circuit through transformer of turns ratio 20 : 1. Assume the diode is ideal. Calculate (a) dc output voltage and (b) Peak inverse voltage SOLUTION :
. n i o c . a i d o n . w w w
The secondary voltage can be obtained using transformer equation. RMS voltage across secondary winding is therefore, 1 = 11 V V 2 = V 1 # N 2 = 230 # 20 N 1 Peak secondary voltage, V m =
2 V 2 =
2 # 11 = 15.5 V
(a) dc output voltage
V dc = V m = 15.5 = 4.95 V p
p
(b) In half-wave rectifier, PIV of a diode is given by PIV = V m = 15.5 V EXAMPLE 1.40
A half wave rectifier is used to supply 35 V dc to a resistive load of 500 W . The diode has a forward resistance of 20 W Find the maximum value of the ac voltage required at the input. SOLUTION :
Output dc voltage,
V dc = 35 V
Diode forward resistance,
R f = 20 W
Load resistance, RL = 500 W Average(dc) value of load current, V dc =
Vm RL + RL)
p (R f
Where V m is the maximum value of ac input voltage.
Buy GATE KANODIA Books Online at: www.nodia.co.in
Analog Circuits by Kanodia Page 52
Diode Circuits_Ex
V m = =
Chapter 1
Vdc # p (Rf + RL) RL
35 # p (20 + 500) = 114.35 V 500
EXAMPLE 1.41
In a centre-tap full-wave rectifier, the load resistance is 2000 W . Each diode has a forward-bias resistance of 10 W . The peak value of voltage across each of the secondary winding is 220 V. Find, (a) dc value of output current (b) rms value of output current (c) ripple factor SOLUTION :
Maximum input voltage,
V m = 210 V
Diode forward resistance,
R f = 10 W
Load resistance,
RL = 2 kW
First we calculate the peak value of input current, 220 I m = V m = = 109.4 mA 2000 + 10 RL + Rf
. n i o c . a i d o n m . w m w _ i w
(a) DC value of output current I = 2I m = 2 # 109. 4 = 69.6 mA dc
p
p
(b) RMS value of output current I rms = I m = 109.4 = 77.35 mA 2 2 (c) Ripple factor, r = r =
2
c I I - 1 c 7769..356 - 1 =
EXAMPLE 1.42
rms dc
1.11 2 - 1 = 0.482
A sinusoidal voltage of peak magnitude of 50 V and frequency 50 Hz is applied to a half wave rectifier circuit shown in Figure. Let R f denotes the forward resistance of diode. Given that R f = 20 W and load resistance RL = 800 W . Find: (a) I m , I dc , I rms (b) ac-power input and dc-power output (c) dc-output voltage (d) efficiency of rectification (e) ripple factor SOLUTION :
We have, Maximum input voltage,
V m = 50 V
Buy GATE KANODIA Books Online at: www.nodia.co.in
Analog Circuits by Kanodia Chapter 1
Diode Circuits_Ex
Diode forward resistance,
R f = 20 W
Load resistance,
RL = 800 W
(a) Peak input current,
I m =
Average current,
61 = 16.4 mA I dc = I m =
Page 53
50 V m = = 61mA 20 + 800 rd + RL p
p
I rms = I m = 30.5 mA
RMS current,
2
_
i i _20 + 800i
2 P ac = I rms Rf + RL
(b) AC power input,
_
= 30.5 # 10 -3
2
= 0.763 watt 2 P dc = I dc RL
DC power output,
_
i
= 19. 4 # 10 -3
2
#
800
= 0.301 watt
(c) DC output voltage,
V dc = Idc RL = 19.4 # 10 -3 # 800 = 15.52 volts
(d) Efficiency,
_%i = 4 _R R+ R i
. n i o c . a i d o n . w w w h
L
2
p
=
(e) Ripple factor,
EXAMPLE 1.43
r =
4
2
p
f
#
100
L
800 20 + 800
_ i 100 = 39.53% c I I m - 1 = 1.21 rms
#
2
dc
A crystal diode having internal resistance R f = 10 W is used for half-wave rectification as shown in Figure. If the applied voltage is 20sin 314t and load resistance is RL = 1000 W , find: (a) peak, average and rms values of load current (b) dc voltage and dc power output (c) ac input power (d) rectification efficiency, h (e) ripple factor (f) percent regulation
_ i
SOLUTION :
Given that, Maximum input voltage,
V m = 20 V
Diode forward resistance,
R f = 10 W
Load resistance,
RL = 1000 W
(a) Peak current,
I m = =
Average or dc current,
V m R f + RL
20 = 19.8 mA 10 + 1000
I dc = I m /p = 6.303 mA
Buy GATE KANODIA Books Online at: www.nodia.co.in
Analog Circuits by Kanodia Page 54
Diode Circuits_Ex
RMS current,
I rms = I m /2 = 9.9 mA
(b) DC voltage
V dc = Idc RL = 6.303 V
DC power,
2 P dc = I dc RL = 39.72 mW
(c) AC input power,
2 P ac = I rms Rf + RL
_
_ i
2
Chapter 1
i
= 1010 # 9.9 = 98.99 mW
(d) Rectifier efficiency,
h
_%i = P P
dc
100
#
ac
=
39.72 100 = 40.12% 98.99 # 2
c I I m - 1 = 1.21 rms
(e) Ripple factor
r =
(f) % regulation
VR =
No load voltage
V NL = V dc | R 3 Vm RL = p R f + RL
dc
VNL - V FL V L L
_
#
100
"
i
= V m = R L
Full load voltage,
V FL = V dc = 6.3 V
So,% regulation
VR =
VNL - V FL V FL
#
"
3
p
20 = 6.366 p
100
. n i o c . a i d o n . w w w 6.366 - 6. 3 100 # 6.3 = 1.05% =
EXAMPLE 1.44
Consider a full-wave rectifier circuit with two identical diodes having forward resistance of 10 W . The load resistance is 1 kW . If a 24 V peak sinusoidal signal is applied, find (a) peak, dc and rms load currents (b) dc output voltage and dc p ower (c) ac input power (d) Rectifier Efficiency in percent SOLUTION :
Given that Maximum input voltage,
V m = 24 V
Diode forward resistance,
R f = 10 W
Load resistance,
RL = 1 kW
(a) Peak load current,
I m =
DC load current,
I dc = 2I m = 2 # 23.76 = 15.12 mA
24 V m = = 23.76 mA 10 + 1000 R f + RL p
p
RMS load current,
I rms = I m / 2 = 16.80 mA
(b) DC output voltage,
V dc = Idc RL = 15.12 # 10 -3 # 1000 = 15.12 V
Buy GATE KANODIA Books Online at: www.nodia.co.in
Analog Circuits by Kanodia Chapter 1
Diode Circuits_Ex
Page 55
2 P dc = I dc RL
DC power,
_
i 10 = 228.26 mW = I _R + R i = _16.8 i _1010i = 285.06 mW 2
= 15.12 # 10 -3
(c)AC power input,
P ac
2
rms
f
#
3
L
2
(d) Rectifier Efficiency,
h
_%i = P P
dc
100 = 228.26 # 100 = 80.07% 285.06
#
ac
EXAMPLE 1.45
A sinusoidal voltage of 30 V peak magnitude is applied to a fullwave bridge rectifier circuit. The forward resistance of each diode is R f = 5 W and the load resistance is 2400 W . Calculate (a) peak, dc and rms values of load current (b) dc and rms output voltages (c) dc output power (d) ac input power (e) Rectifier efficiency (f) percentage regulation SOLUTION :
Given that,
. n i o c . a i d o n . w w w _ i
Maximum input voltage,
V m = 30 V
Diode forward resistance,
R f = 5 W
Load resistance,
RL = 2400 W
(a) Peak load current,
I m =
30 V m = = 12.44 mA 2400 + 10 RL + 2Rf
DC load current,
I dc =
2I m = 7.924 mA
RMS load current,
p
I rms = I m = 8.797 mA
2
(b) DC output voltage,
V dc = Idc RL = 19.01 V
RMS outpout voltage,
V rms = Irms RL = 21.11 V
(c) DC output power,
2 P dc = I dc RL = 7.924 # 10 -3
2
#
2400
= 150.69 mW
(d) AC input power,
_
i i _2400 + 10i
2 P in = I rms RL + 2Rf
_
= 8.797 # 10
-3 2
= 186.503 mW
(e) Efficiency,
%h = Efficiency = P dc # 100 P in
= 80.79%
(f) Percentage regulation, VR = VNL - V L V L
No-load voltage,
V NL = V dc | R
L
=
"
#
100
3
2Im RL p
= p
R L
"
3
2Vm RL 2R f + RL
_
i
R L
"
3
Buy GATE KANODIA Books Online at: www.nodia.co.in
Analog Circuits by Kanodia Page 56
Diode Circuits_Ex
=
Full-load voltage Percentage regulation
Chapter 1
2V m = 2 # 30 = 19.09 p p
V L = V dc = 19.01 V VR = 19.09 - 19.01 # 100
19.01
= 0.466% EXAMPLE 1.46
A full-wave centre-tapped rectifier has rms input of 20-0- 20 V at the secondary winding of the centre-tapped transformer. The frequency of input is 50 Hz and load resistance is RL = 10 W . (a) Find V dc , I dc and ripple factor (b) Repeat part (a) if 10mF capacitor is shunted across the load (c) Repeat part (a) if 100 mH inductor is present in series with load SOLUTION :
Given that, Maximum input voltage,
V m = 20 2 V
Load resistance,
RL = 10 W
(a)
. n i o c . a i d o n c m . w c w m w
Average (dc) load voltage, V dc = 2V m p
= 2 # 20 2 = 18.012 V p
Average load current, Ripple factor
I dc =
V dc 1.8012 A = RL V rms 2 - 1 V dc
r =
20 2 - 1 = 0.4825 18.012
=
(b) For capacitor filter Average load voltage,
V dc
.
Vm =
V dc = 20 #
So, average load current, Ripple factor
2 V rms
2 = 28.28 V
I dc = V dc = 2.828 A RL r =
1 4 3 fCRL
1 4 # 3 # 50 # 10000 # 10 -6 # 10 = 0.0288 =
(c) For series inductor filter Average (dc) load voltage, V dc = 2V m = 2 # 28. 28 = 18.012 V p 3.14 Average (dc) load current, I dc = V dc = 1.8012 A RL
Buy GATE KANODIA Books Online at: www.nodia.co.in
Analog Circuits by Kanodia Chapter 1
Diode Circuits_Ex
Ripple factor,
r =
Page 57
RL
6 2 p fL
10 6 2 # p # 50 # 100 # 10 -3 = 0.075 =
EXAMPLE 1.47
In a regulated power supply, the voltage waveform across the load is observed as shown in Figure. Determine the ripple factor and percentage ripple content.
SOLUTION :
. n i o c . a i d o n . w w w
From figure, we have DC load voltage,
V dc = 12 V
Ripple voltage (peak-to-peak), RMS ripple voltage, So, ripple factor,
V r = 0.25 V
0.25 = 0.088 V 2 2 V r (rms) = 0.088 = 0.00737 r = 12 V dc
V r (rms) =
Percentage ripple = 0.74 %
EXAMPLE 1.48
Consider a regulated power supply containing a full-wave rectifier and a capacitor filter. The filter feeds a load resistance of 1 kW . If the DC voltage across the load is 12 V and the peak-to-peak value of ripple were not to exceed 0.2 V, find the minimum capacitance value of the filter capacitor. Assume a p ower line frequency of 50Hz. SOLUTION :
Peak-to-peak ripple voltage, V r = 0.2 The ripple waveform can be assumed to be triangular in shape. Therefore, rms value of ripple voltage 0.2 = 0.058 V V r (rms) = V r = 2 3 2 3 Ripple factor in the case of capacitor filter is given by
Buy GATE KANODIA Books Online at: www.nodia.co.in
Analog Circuits by Kanodia Page 58
Diode Circuits_Ex
r = =
V r (rms) V dc
Chapter 1
V dc = 12 V
0.058 = 0.0048 12
1 = 0.0048 4 3 fCRL Substituting the value of RL and f , we get Therefore,
r =
C =
_
1 = 601 mF 4 3 # 50 # 0.0048 # 1 # 10 3
i
EXAMPLE 1.49
The output of a full-wave rectifier operating at a line frequency of 50Hz is applied to an LC filter. The filter is required to provide a a ripple of 1 percent. In the design of filter, it is specified that L/C ratio should not exceed 0.005 with L in henries and C in microfarads. Find the required values of L and C for the given filter. SOLUTION :
Ripple factor of LC filter is given by 1 r = 6 2 w2 LC For f = 50Hz , w = 2p f = 314 , therefore 1 r = 6 2 314 2 LC 1.2 , or, r =
. n i o _ i c . a i d o n . w w w where C is in mF
LC
Given that
r =
1.2 = 0.01,
LC
LC = 120
L Also, = 0.005 C Using above two relation, we can find the values of L and C C =
24000 = 155 mF
L = 0.005 # 155 = 0.775 H EXAMPLE 1.50
A 120 V (rms) sinusoidal input is applied to a full-wave bridge rectifier having a load resistor of 1 kW . Assume cut-in voltage of diode V = 0.7 V , and forward resistance R f = 0 . Find (a) the dc load voltage (b) required PIV rating of each diode. (c) the maximum current through each diode during conduction (d) required power rating of each diode g
CONFUSION CLEARING CORNER
SOLUTION :
Peak input voltage,
V im =
2 V rms =
2 # 120 = 169.7 V
Note that in bridge rectifier there are two diodes conducting at a time (in one cycle of input). Therefore, peak voltage across the load will be peak voltage of the input less two cutin voltage (2 # 0.7 = 1.4 V )..
Buy GATE KANODIA Books Online at: www.nodia.co.in
Analog Circuits by Kanodia Chapter 1
Diode Circuits_Ex
Page 59
Peak input voltage across load V m = Vim - 2V g = 169.7 - 2 # 0.7 = 168.3 V
168.3
I m = V m = = 168.3 mA RL 1k
Peak input current, (a) DC load voltage,
V V dc = 2 m = 2 # 168.3 = 107.2 V
3.14 (b) For calculating PIV consider the circuit of Figure. Since dio de has a cut-in voltage, in the circuit forward biased diode D 3 is replaced by a 0.7 V source so writing KVL in the lower half loop p
PIV - Vm - 0.7 = 0
So,
PIV = V m + 0.7 = 168.3 + 0.7 = 169 V
(c) Maximum current through diode I m = 168.3 mA
(d) Diode power rating is given by product of voltage across the diode is forward bias and maximum current through diode. In forward bias voltage across diode is equal to cut-in voltage, so Diode power rating,
P max = Vg I m
. n i o c . a i d o n . w w w = 0. 7 # 168.3 = 117.81
EXAMPLE 1.51
Consider the circuit shown in Figure with given input waveform. Assume diodes D 1 and D 2 are ideal. (a) Explain the operation of the circuit (b) Find the dc output voltage and current (c) Determine the average and peak diode currents (d) Calculate the required PIV rating of each diode
SOLUTION :
(a) Circuit Operation From the circuit we can observe that during the positive half cycle of v i , diode D 1 conducts and D 2 is reverse biased. The equivalent circuit
Buy GATE KANODIA Books Online at: www.nodia.co.in
Analog Circuits by Kanodia Page 60
Diode Circuits_Ex
Chapter 1
is shown in Figure. The circuit can be simplified as shown in Figure.
From the circuit of Figure, we have i o =
v i
10 k + 10 k
200 sin wt 20 So, i o = 10 sin wt mA , The output voltage is =
_ i
v o = i o 10 k
_
. n i o i_ i c . a i d o n . w w w 0 # wt # p
= 10 sin wt mA 10 k
0 # wt # p = 100 sin wt V , During negative half cycle of v i , D 2 conductors and D 1 is off. The equivalent circuit is therefore as shown in Figure and simplified circuit is also shown in Figure.
Note that the circuit during negative half cycle is same as that of positive half cycle. Therefore, i o and v o are same as obtained above. The waveforms of i o and v o are shown below. i o =
v i
10 k + 10 k
Buy GATE KANODIA Books Online at: www.nodia.co.in
Analog Circuits by Kanodia Chapter 1
Diode Circuits_Ex
=
Page 61
200 sin wt 20
So,
i o = 10 sin wt mA ,
and
v o = 100 sin wt V ,
p # wt # p # wt #
2p
2p
Thus, thus the circuit operation is similar to a full-wave rectifier. (b) v o is a full rectified voltage with peak value of 100 V i.e. V m = 100 V DC output voltage, V = 2V m dc
p
. n i o c . a i d o n . w w w = 2 # 100 = 63.6 V
3.14
DC output current,
I dc = V dc RL
63.6 = 6.36 mA 10 (c) Form the circuit of Figure, we can see that current through each diode when it is forward biased is given by =
i d = io + i 1
vi t = 200 sin w V = 20 sin wt mA 10 10 k i = 10 sin wt + 20 sin wt
i 1 =
So,
0 # wt # p = 30 sin wt mA , During the negative half cycle of v i , D 2 is on and D 1 is off. The diode current is a half-rectified sinusoid with a peak value of 30 mA. Peak diode current is I d _maxi = 30mA I dc_diode i =
I m p
= 30 = 9.55 mA p
(d) During the positive half-cycle of input signal, the diodes D 1 is conducting and D 2 is non-conducting. So, D 1 can be replaced by short circuit, and, D 2 and by open circuit as shown in fig//. Thus, the entire voltage V m across the secondary winding appears across the load resistor RL . Again, as we know PIV is defined as the voltage in reverse direction (anode negative, cathode positive) across a non-conducting diode, we mark polarity of PIV as shown in fig//. By writing KVL in upper half loop, we get PIV for diode D 2 PIV - Vm = 0 PIV = V m = 100 V
Buy GATE KANODIA Books Online at: www.nodia.co.in
Analog Circuits by Kanodia Page 62
Diode Circuits_Ex
Chapter 1
PIV for diode D 1 is also same which can be found out by applying KVL in upper half loop during the negative half-cycle in the circuit of figure. EXAMPLE 1.52
For the ideal diode circuit shown below (a) Explain the operation of circuit (b) Calculate average output voltage and current (c) Calculate average and peak diode current (d) PIV across each diode Given that RL = 10 kW
SOLUTION :
. n i o c . a i d o n . w w w
(a) Circuit Operation We can see from the circuit that during the positive half cycle of v i , diode D 1 is reversed biased whereas D 2 conducts. Replacing D 1 by an open circuit and D 2 by a short circuit, we obtain the equivalent circuit as shown in Figure. The circuit can be drawn in simplified further as shown in Figure.
Buy GATE KANODIA Books Online at: www.nodia.co.in
Analog Circuits by Kanodia Chapter 1
Diode Circuits_Ex
Page 63
. n i o c . a i c m d o c n m . w w w
Using voltage division rule in the circuit of Figure, we have 5 Output voltage, v o = v i 5 + 10 = 200sin wt
So,
5 10 + 5
v o = 66.67 sin wt V , i o =
0 # wt # p
v o R
66.67 sin wt V 10 6.667 sin wt mA , 0 # wt # p i o = During the negative half cycle of v i , D 1 if ON and D 2 is OFF. The equivalent circuit and simplified equivalent circuits are shown in Figure. The circuit is same as that in positive half cycle. =
. v o and i o are still given by Eqs (i) and (ii) respectively. The waveforms of v o and i o are shown below.
Buy GATE KANODIA Books Online at: www.nodia.co.in
Analog Circuits by Kanodia Page 64
Diode Circuits_Ex
Chapter 1
Therefore, the output voltage v o is a full-wave rectified voltage. The circuit thus operates as full-wave rectifier. (b) From the waveforms shown above, we note that Peak output voltage,
V m = 66.67 V
Peak output current,
I m = 6.667 mA
DC output voltage,
2V m V dc = p
=
DC output current,
I dc =
2 # 66. 67 = 42.4 V 3.14 V dc = 42.4 = 4.24 mA 10 RL
. n i o c . a i d o n . w w w
(c) In the positive half cycle, we can see from the circuit of Figure// that when diode D 2 is forward biased current through it is same as
Buy GATE KANODIA Books Online at: www.nodia.co.in
Analog Circuits by Kanodia Chapter 1
Diode Circuits_Ex
Page 65
output current i o . Since in negative half cycle D 2 is reverse biased, the current through diode will be half rectified sinusoid with a peak value of 6.667 mA. I dm = I m = 6.667 mA
Average diode current is I dc_diode i = I dm = 6.667 = 2.12 mA
2 (d) Let we find the PIV across diode D 1 . In positive half-cycle of input, D 1 is OFF and D 2 is ON as shown in Figure. Again, as we know PIV is defined as the voltage in reverse direction (anode negative, cathode positive) across a non-conducting diode, we mark polarity of PIV as shown in fig//. By writing KVL in loop containing v i and PIV , we get PIV for diode D 1 p
PIV - vi = 0
Since maximum value of input is 200 V, we get PIV = v i (max) = 200 V EXAMPLE 1.53
. n i o c . a i d o n . w w w
A full-wave bridge rectifier is required to provide a no load dc voltage of 9 V. What should be the rms value of voltage appeared on the secondary of the transformer ? If the secondary winding resistance is 3 W and dynamic resistance of each diode is 1 W , determine the dc output across a load resistance of 100 W . Also determine the regulation. SOLUTION :
Given that No load dc voltage,
V dc = 9 V
Secondary winding resistance,
RS = 3 W
Diode forward resistance,
R f 1 W
As we know, for full-wave bridge rectifier no load dc output voltage is 2 V = V m = 9 V dc
p
Peak voltage across secondary, V m = 9p = 14.14 V 2 V RMS voltage across secondary, V S _rmsi = m = 14.14 = 10 V 1.414 2 Full-load peak current,
I m = =
DC load current,
14.14 = 0.135 A 105
2 I dc = I m p
=
Full-load voltage,
V m Rs + 2Rf + RL
2 # 0. 135 = 86.45 mA p
V FL = Idc RL
Buy GATE KANODIA Books Online at: www.nodia.co.in
Analog Circuits by Kanodia Page 66
Diode Circuits_Ex
Chapter 1
= 86.56 # 10 -3 # 100 = 8.66 V V V VR = NL - FL V FL
Voltage regulation,
#
100
= 9 - 8.6 = 4.06%
8.6
EXAMPLE 1.54
For the rectifier circuit shown in Figure, calculate (a) Average load voltage V dc (b) Average load current I dc (c) RMS value of load current I rms (c) RMS value of ripple voltage V r_rms i
SOLUTION :
. n i o c . a i d o n . w w w
Since transformer ratio is 1, RMS value of secondary voltage V S (rms) = 230 V
(a) Average load voltage,
p
2
=
(b) Average load current, (c) RMS load current
#
p
p
230 = 103.5 V ,
I dc = V dc = 103.5 mA , RL I rms = I m
2
=
(d) Ripple factor
2 V S _rmsi
V dc = V m =
r =
V m
2RL
=
2 # 230 = 162.6 mA 2#1
V r _rmsi = 1.21, V dc
So, RMS value of ripple voltage, V r _rmsi = 1.21 # V dc = 125.3 V EXAMPLE 1.55
A 230 V-0-230 V (rms) input voltage is connected to a full-wave rectifier circuit shown in Figure. Calculate the dc voltage across and dc current through the load.
Buy GATE KANODIA Books Online at: www.nodia.co.in
Analog Circuits by Kanodia Chapter 1
Diode Circuits_Ex
Page 67
SOLUTION :
Peak input voltage across each half of secondary V m = 230 2
DC load voltage,
2 2 230 2 = 207 V V dc = V m = #
DC load current,
= 207 mA I dc = V dc = RL 1k
EXAMPLE 1.56
p
p
207
. n i o c . a i d o n . w w w
The half-wave rectifier circuit shown in Figure is required to provide a dc voltage of 10 V across the load. Obtain the ratio of number of turns np : n s of primary and secondary windings of the transformer.
SOLUTION :
From half-wave rectifier circuit, the dc load voltage is given by V dc = V m p
Given, V dc = 10 V
where, V m is the peak value of sinusoid applied across the secondary winding of the transformer. V m = pV DC = p # 10 = 31.42 V
RMS values of voltage appeared across the secondary V s = V m = 31.42 = 22.22 V 1.414 2 RMS voltage across primary winding of the transformer V p = 220 V
From transformer equation, we have
Buy GATE KANODIA Books Online at: www.nodia.co.in
Analog Circuits by Kanodia Page 68
Diode Circuits_Ex
Chapter 1
V p n p = n s V s n p V p 220 = 9.9 :1 , 10 :1 = = n s 22.22 V s EXAMPLE 1.57
Figure shows the output waveform of a half-wave rectifier with capacitor filter. The value of the capacitor is 1000 mF and the value of load resistance is 100 W with frequency of input voltage equal to 50Hz. Determine the ripple factor and dc voltage.
SOLUTION :
From the figure, we have Peak value of load voltage,
. n i o c . a i d o n . w w w V m = 6.4 V
Peak-to-peak ripple voltage,
V r = 0.6 V
V DC load voltage, V dc = V m - r = 6.4 - 0.3 = 6.1 V 2 If we assume ripple as triangular waveform, RMS value of ripple voltage V r _rmsi = V r = 0.6 = 0.173 V , 2 3 2 3
So, ripple factor,
r =
V r _rmsi = 0.173 = 0.0284 6.1 V dc
Ripple factor from theoretical expression is 1 r = 4 3 fCRL 1 = = 0.02887 4 3 # 50 # 1000 # 10 -6 # 100 EXAMPLE 1.58
Calculate the ripple factor in the case of a full-wave rectifier with p -filter having the component values C1 = C 2 = 500 mF and load resistance RL = 100 W . SOLUTION :
For
p -filter
ripple factor is given by r =
2
2
8w C1 C2 LRL
Buy GATE KANODIA Books Online at: www.nodia.co.in
Analog Circuits by Kanodia Chapter 1
Diode Circuits_Ex
=
2
8 # 4p (50)
2
Page 69
2
#
500 # 500 # 10 -12 # 100
EXAMPLE 1.59
In a full-wave bridge rectifier circuit input applied to the primary winding of the transformer is 160 sin 314t V . Assume cut-in voltage of each diode is V = 0.7 V . Determine the required turns ratio of the transformer to produce a peak output voltage of 25 V. g
SOLUTION :
Peak voltage at primary, V p = 160 V If the diodes are assumed to be ideal then as we know, the peak output voltage will be same as peak voltage appeared at secondary winding. But, in this case diodes cut-in voltage is 0.7 V. Since two diodes conducts simultaneously in a bridge rectifier, the peak voltage across load will be equal to peak voltage across secondary minus the drop of cut-in voltage of two diodes. Therefore, peak value of output voltage
. n i o c . a i d o n . w w w
V m = Vs - 2V g = 25 V ,
V s
"
peak voltage at secondary
So, V s = 25 + 2 # 0.7 = 26.4 V Let turn ratio of primary winding and secondary winding is np : n s . From transformer equation, we can write n p V p = n s V s
n p = 160 = 6.06 n s 26.4
EXAMPLE 1.60
A full-wave centre-tapped rectifier is required to deliver 0.1A and 15 V (average) to a load. The ripple voltage is to be no larger than 0.4 V peak-to-peak. The input signal at primary winding of transformer is 120 V (rms) at 60Hz. Assume diode cut-in voltages of 0.7 V. Determine the required turns ratio and the filter capacitance value. SOLUTION :
Given that Average load current,
I dc = 0.1A
Average load voltage,
V dc = 15 V
Peak-to-peak ripple voltage,
V r = 0.4 V
Peak voltage at primary,
V p = 120 2 V
Diode cut-in voltage,
V g = 0.7 V
Load resistance,
RL =
If the diodes are assumed to be ideal then as we know, the peak output voltage will be same as peak voltage appeared at secondary winding. But, in this case diode cut-in voltage is 0.7 V . Since only one diode conducts at a time, the peak voltage across load will be equal to peak voltage across secondary minus the drop of cut-in voltage of one diode. Vm = Vs - V g
V dc 15 = 150 W = 0.1 I dc
Buy GATE KANODIA Books Online at: www.nodia.co.in
Analog Circuits by Kanodia Page 70
Diode Circuits_Ex
Chapter 1
Therefore, peak value of output voltage V m = Vs - V g ,
So,
V s
"
peak voltage at secondary
V s = V m + 0.7
...(i)
V V dc = 2 m = 15
Since,
p
V m = 15 # p = 23.55 V
2 From Eq (i), peak voltage across secondary winding is therefore V s = 23.55 + 0.7 = 24.25 V n p V p = = 120 2 7 = 7.2 n s 23.55 V s
Turn ratio,
r =
V r _RMSi 1 = V dc 4 3 fCRL
...(ii)
Assuming a triangular ripple waveform as given earlier, the rms value of ripple is given by V r _RMSi =
From Eq (ii), V r
2 3 V dc
=
V r = C = EXAMPLE 1.61
V r
2 3 1 4 3 fCRL
. n i o _ i_ i_ i c . a i d o n . w w w
V dc 2 fCRL V dc
2 fRL V r
=
15 = 2083 mF 2 60 150 0.4
Consider a zener diode voltage regulator circuit with a zener voltage of 10 V, as shown in Figure. The input voltage varies from 13 V to 16 V. The load current varies between 10mA and 85mA, minimum zener current is 15 mA. Find the maximum value of Rs . SOLUTION :
Zener voltage,
V Z = 10 V
Minimum input voltage,
V i _mini = 13 V
Maximum input voltage,
V i _maxi = 16 V
Minium load current,
I L_mini = 10mA
Maximum load current,
I L_maxi = 85mA
I Z _mini = 15mA Minimum zener current, (i) Maximum value of Rs is given by I s = IZ + I L I Z = Is - I L
Zener current will be minimum when current I s is minimum and load current I L is maximum, so we can write I Z (min) = Is (min) - I L (max)
...(i)
Current through resistance Rs is given as
Buy GATE KANODIA Books Online at: www.nodia.co.in
Analog Circuits by Kanodia Chapter 1
Diode Circuits_Ex
Page 71
I s = Vi - V Z Rs
or,
I s (min) =
Vi(min) - V Z Rs (max)
Substituting this into Eq (i), we have I Z (min) =
or,
Vi(min) - V Z - I L (max) Rs (max)
Vi (min) - V Z = IZ (min) + I L(max) Rs (max) Rs _maxi = =
Vi_mini - V Z IZ_mini + I L_maxi
13 - 10 = 30 W 15 + 85 # 10 -3
_
i
EXAMPLE 1.62
In the circuit shown in Figure, find the maximum and minimum value of zener diode current. SOLUTION :
. n i o c . a i d o n . w w w
Minimum current through the 5 kW resistor 80 - 50 = 6 mA I s (min) = 5k Maximum current through the 5 kW resistor 120 - 50 = 14 mA I s (max) = 5k The load current, 50 = 5 mA I L = 10 In the circuit, applying KCL I s = IZ + I L I Z = Is - I L
Zener current will be minimum when current I s is minimum, so we can write I Z (min) = Is (min) - I L = 6 - 5 = 1 mA Zener current will be maximum when current I s is maximum, so we can write I Z (max) = Is (max) - I L = 14 - 5 = 9 mA
EXAMPLE 1.63
(a) In the circuit shown in Figure, assume I L varies from 0 to 4 mA and I Z has safe values from 1 to 5 mA. Determine the values of V i that can regulate the voltage correctly. (b) If I Z is fixed at 50/15 mA (i.e. RL = 15 kW fixed), then find the
Buy GATE KANODIA Books Online at: www.nodia.co.in
Analog Circuits by Kanodia Page 72
Diode Circuits_Ex
Chapter 1
safe voltage range of V i . SOLUTION :
(a) Given that, Zener voltage,
V Z = 50 V
Minimum load current,
I L_mini = 0
Maximum load current,
I L_maxi = 4 mA
Minimum zener current,
I Z _mini = 1 mA
I Z _maxi = 5 mA Maximum zener current, As explained in Section//, Maximum zener current is given by Eq (2.17.2) as I Z (max) = Is (max) - I L(min)
or,
I s (max) = IZ (max) + I L(min) Vi _maxi - V Z = IZ (max) + I L(min) Rs V i (max) - 50
5
= 5+0
_
i
. n i o c . a i d o n . w w w
V i (max) = 5 # 5 + 50 = 75 V Zener current will be minimum when current I s is minimum and load current I L is maximum, so we can write I Z (min) = Is (min) - I L(max)
or,
I s (min) = IZ (min) + I L(max) Vi (min) - V Z = IZ (min) + I L(max) Rs V i (min) - 50 = 1+4 = 5
or,
5
V i (min) = 75 V
Thus, for V L = 50 V regulated and I L = 0 to 4 mA, V = 75 V . No variation is permissible. 50 = 10 mA (fixed) (b) Now, I L = 15 3 Since,
I s (max) = IZ (max) + I L Vi _maxi - V Z = IZ (max) + I L Rs V i _maxi - 50
10 = 25 3 3 25 or = 91.66 V V i _maxi = 50 + 5 # 3 Minimum current through Rs , 5
or, or,
= 5+
I s (min) = IZ (min) + I L Vi (min) - V Z = IZ (min) + I L Rs V i (min) - 50 = 1 + 10 = 13
5
or
3
3
V i (min) = 50 + 5 # 13 = 71.66 V
3
Buy GATE KANODIA Books Online at: www.nodia.co.in
Analog Circuits by Kanodia Chapter 1
7V
Diode Circuits_Ex
A 7
,V i (min) = 91.66 V, 7 1.66 V
i _maxi
Page 73
A
So V i varies from 71.66 V to 91.66 V if the load current is fixed at 50/15 mA and I Z varies from 1 to 5 mA. EXAMPLE 1.64
The circuit shown in Figure is used to provide regulation for 50 mA # I Z # 1 A . Determine the range of load currents for which the regulation is achieved if the unregulated voltage V s varies between 7.5 V and 10 V. Assume zener voltage V Z = 5 V . SOLUTION :
Given that, Zener voltage,
V Z = 5 V
Minimum input voltage,
V i _mini = 7.5 V
Maximum input voltage,
V i _maxi = 10 V
Minimum zener current,
I Z _mini = 50 mA
. n i o c F . < a i ; E d o n . w w w< F
Maximum zener current,
I Z _maxi = 1 A
From Eq (2.17.1), we know that minimum zener current I Z (min) = Is (min) - I L (max) I L (max) = Is (min) - I Z (min) I L (max) =
Vi(min) - V Z - I Z (min) Rs
I L (max) = 7.5 - 5 - 50 mA
4.75
= 526.3 - 50 = 476.3 mA
Maximum zener current
I Z (max) = Is (max) - I L(min)
I L (min) = Is (max) - I Z (max) I L (min) =
Vi(max) - V Z - I Z (max) Rs
10 - 5 - 1 A I L (min) =
; 4.75 E
= 1.05 - 1.0 = 0.05 A = 50 mA
Thus, the range of load currents for regulation is : 50 mA
#
I L # 476.3 mA
EXAMPLE 1.65
The regulator shown in Figure is required to provide a load voltage of 6 V for all load currents I L # 0.5A . Input V s is being varied between 8 V and 10 V, and the zener diode provides regulation for I Z > 0 . (a) What is the required valued of series resistance Rs ? (b) Determine the power dissipated rating of the zener diode
Buy GATE KANODIA Books Online at: www.nodia.co.in
Analog Circuits by Kanodia Page 74
Diode Circuits_Ex
Chapter 1
SOLUTION :
Given that, V i _mini = 8 V ,
V i _maxi = 10 V ,
I L _mini = 0 A ,
I L_maxi = 0.5A ,
V Z = 6 V ,
I Z _mini = 0 A
As obtained in section//, Rs = I Z (max) =
Vi_mini - V Z IZ_mini + I L_maxi Vi(max) - V Z - I L (min) Rs (min)
10 - 6 - 0 = 1 A 4 (b) Power rating of Zener is given by =
P Z _maxi = VZ I Z (max) = 6#1 = 6W EXAMPLE 1.66
The circuit shown in Figure regulates at a voltage of 6 V. The minimum and maximum zener diode currents are 10mA and 40mA respectively. The load current I L varies from 0 to I L _maxi . (a) Determine the value of R (b) What is the value of I L _maxi ? (c) Find the power rating of the zener diode. SOLUTION :
Given that,
. n i o c . a i d o n . w w w
V s = 22 V ,
V Z = 6 V ,
I Z _ mini = 10mA ,
I Z _maxi = 40 mA
I L _mini = 0 A
(a) We know that, Rs =
Vi - V Z IZ (max) + I L(min)
Rs =
22 - 6 = 400 W 40 mA + 0
(b) I Z (min) = Is (min) - I L(max) is fixed and given by I s I s = 22 - 6 = 40mA 400 I L (max) = Is - I Z (min) = 40 - 10 = 30 mA
(c) Power rating of zener diode P Z = IZ (max) # V Z
_ i_ i
= 40 6
P Z = 240 mW
Buy GATE KANODIA Books Online at: www.nodia.co.in