5
4
3
2
1
Project:MB40IAX Schematics Rev : B1 Intel Sandy Bridge CPU + Intel Cougar Point Chipset + ATi Whistler XT D
C
B
A
Pa Page ge
Content
01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44
Cover Page System Block Diagram Power Diagram Power Seqence GPIO & Power Consumption Sandy Bridge_DMI,FDI,PEG Bridge_DMI,FDI,PEG Sandy Bridge_DDR3 Sandy Bridge_Power Sandy Bridge_GND Sandy Bridge_Reserved Bridge_Reserved DDR3 SO-DIMM Channel A,B Cougar Point_RTC,HDA,SATA Point_RTC,HDA,SATA Cougar Point_PCIE,CLK,SMBus Point_PCIE,CLK,SMBus Cougar Point_LVDS,CRT,Manage Point_LVDS,CRT,Manage Cougar Point_PCI,USB Cougar Point_GPIO,MISC Point_GPIO,MISC Cougar Point_Power1 Cougar Point_Power2 Cougar Point_GND LVDS/Webcam CRT/HDMI Mini Card/LED/LID/MMB/TP/HDD/ODD Card/LED/LID/MMB/TP/HDD/ODD/IO /IO Conn Clock Gen (ICS9LRS3197) USB 3.0 (ASM1042) Audio Codec (ALC269) Card Reader (RTS5159-GR) EC (IT8518)/BIOS/KBC (IT8518)/BIOS/KBC Power Switch/Hole/FAN Switch/Hole/FAN DC In & Charger (OZ8618) +VCC_Core (ISL95831HRTZ) (ISL95831HRTZ) +VGFX_Core (ISL95831HRTZ) +1.0/0.75/1.8/1.8V_DGPU/3VA +5VA/+1.05V_VCCP(OZ815) +1.5VS (OZ8111)/+0.85V (OZ8111)/+0.85V +VGA_Core (OZ8117) VGA PCIE/LVDS VGA I/O VGA MEM_Interface VGA Power 1 VGA Power 2 VGA GND/Straps V GA GA D DR DR3 _M _M EM EM _A _A VGA DDR3_MEM_B Change Notes
D
40mm
Revision History
Phase A0
06/30/2010 Initial REV.A
A1
08/13/2010 Release REV.A1
A2
AOI
ICT
ATS
CHR
I/D
F/T PCBA
2mm
T/Q
4mm 2mm
09/13/2010 Release REV.A2
5mm
PCB
PCB
B0
10/20/2010 Release REV.B
B1
11/08/2010
Release REV.B1
C
??/??/2010
Release REV.C
10
??/??/2010
Release REV.10
37GMB4100-B1
MB40IA MB Ver:B1 P/N:37GMB4100-B1 PCB M/B MB40IA1 R:B1 201.9*178.0*1.2 6L
C
MB40IA Rev. P/N List: Phase Revision
PCB P/N
PCBA P/N
PCBA P/N
Initial REV.A0
37 37GM GMB4 B410 1000-A0 A0
82 82GM GMB4 B410 1000-A0 A0
Release REV.A1
37GMB4100-A1
82GMB4B00-A1
82GMB4110-A1
Release REV.A2
37GMB4100-A2
82GMB4C00-A2
82GMB4D00-A2
Release REV REV.B0
37GMB4 MB4100-B0
82GXX GXXXXXX-B0
82GMB4D00-B0
Release RE REV.B1
37GMB4100-B1
82GXXXXXX-B1
82GXXXXXX-B1
Release REV.C
37GXXXXXX-C0
82GXXXXXX-C0
82GXXXXXX-C0
Release REV REV.10
37GXXX XXXXXX-10
82GXX GXXXXXX-10
82GXXXXXX-10
None
B
Whistl Whistler er ?G Whistl WhistlerPro erPro ?G ?G MB40IA MB40IA2(Haier 2(Haier) ) MB40IA MB40IA3(Hasee 3(Hasee) )
A
ECS COMPUTER CORP. Title Size Date: 5
4
3
2
Cover Page Document Number MB40IA B1-Phase Custom Tuesday, November 09, 2010
Rev B1
MB40IA Sh eet 1
1
of
44
5
4
3
2
1
Huron River System Block Diagram D
D
Dual Channel
LVDS 20 CRT
Unbuffered DDR3 Near SO-DIMM
DDR3 1066/1333
21
LVDS Switch
HDMI21
21
Sandy Bridge
ATi GPU Whistler
DIMM-A
PEG X16 / eDP
Processor
Unbuffered DDR3 Near SO-DIMM
DIMM-B
36, 37, 38, 39, 40, 41
11
204 Pin SO-DIMM
Crystal
DDR3 Memory for Park 42, 43
27M HZ
6, 7, 8, 9, 10
FDI
DMI
RTC Crystal
LVDS
C
11
204 Pin SO-DIMM
C
32.768KHz
RGB
Azaliza
Int.SPK
SATA II
Empty USB_6
Web Camera 20 USB_5
Empty USB_4
Empty USB_2
USB Port USB_1
Enhance USB 24 USB_0
DB
SATA HDD
Cougar Point-M
SATA ODD
PCH
USB 2.0
25
Ext.MIC 26
Audio Codec ALC269 25 Ext.HP out DB
HDMI Empty USB_7
int.MIC
DB
Line-In DB
22
22
FLASH BIOS (SPI ROM) 12 16Mb
SPI Bus
PCIE_5 Empty USB_10
USB Port USB_9
DB
Finger Print 20 USB_8
B
RJ45
DB
Enhance USB 24 USB_11
Empty USB_12
USB_3
X4 PCIE Interface
PCIE_1
WLAN Mini Card BT 22
24
PCIE_2
GiGa LAN RTL8111E-VB RTL8105E DB
SPI Bus
12, 13, 14, 15, 16, 17, 18, 19
LPC Bus
Crystal
RTS5159-GR Card Reader 26 USB_13
USB 3.0
24
FLASH BIOS (SPI ROM)
B
24
LPC Debug Card Mine Card 22
32.768KHz
Touch Pad
PS/2
22
Internal K/B
Embedded Controller
Hall Sensor 22
SPI Bus
FLASH BIOS (SPI ROM) 16Mb
27
KB/Matrix
EC IT8518
27
A
ASM1042
X1 PCIE Interface
GPIO
GPIO
Charger
27
S M B u s 2
S M B u s 1
S M B u s 0
Fan
29
A
28
ECS COMPUTER CORP. Title
CPU Thermal
VGA PCH SMBus Thermal
MMB Clk Gen Battery
Size
System Block Diagram Document Number MB40IA B1-Phase
MB40IA
Rev B1
5
4
3
2
1
Huron River System Block Diagram D
D
Dual Channel
LVDS 20 CRT
Unbuffered DDR3 Near SO-DIMM
DDR3 1066/1333
21
LVDS Switch
HDMI21
21
Sandy Bridge
ATi GPU Whistler
DIMM-A
PEG X16 / eDP
Processor
Unbuffered DDR3 Near SO-DIMM
DIMM-B
36, 37, 38, 39, 40, 41
11
204 Pin SO-DIMM
Crystal
DDR3 Memory for Park 42, 43
27M HZ
6, 7, 8, 9, 10
FDI
DMI
RTC Crystal
LVDS
C
11
204 Pin SO-DIMM
C
32.768KHz
RGB
Azaliza
Int.SPK
SATA II
Empty USB_6
Web Camera 20 USB_5
Empty USB_4
Empty USB_2
USB Port USB_1
Enhance USB 24 USB_0
DB
SATA HDD
Cougar Point-M
SATA ODD
PCH
USB 2.0
25
Ext.MIC 26
Audio Codec ALC269 25 Ext.HP out DB
HDMI Empty USB_7
int.MIC
DB
Line-In DB
22
22
FLASH BIOS (SPI ROM) 12 16Mb
SPI Bus
PCIE_5 Empty USB_10
USB Port USB_9
DB
Finger Print 20 USB_8
B
RJ45
DB
Enhance USB 24 USB_11
Empty USB_12
USB_3
X4 PCIE Interface
PCIE_1
WLAN Mini Card BT 22
24
PCIE_2
GiGa LAN RTL8111E-VB RTL8105E DB
SPI Bus
12, 13, 14, 15, 16, 17, 18, 19
LPC Bus
Crystal
RTS5159-GR Card Reader 26 USB_13
USB 3.0
24
FLASH BIOS (SPI ROM)
B
24
LPC Debug Card Mine Card 22
32.768KHz
Touch Pad
PS/2
22
Internal K/B
Embedded Controller
Hall Sensor 22
SPI Bus
FLASH BIOS (SPI ROM) 16Mb
27
KB/Matrix
EC IT8518
27
A
ASM1042
X1 PCIE Interface
GPIO
GPIO
Charger
27
S M B u s 2
S M B u s 1
S M B u s 0
Fan
29
A
28
ECS COMPUTER CORP. Title
CPU Thermal
VGA PCH SMBus Thermal
MMB Clk Gen Battery
Size
System Block Diagram Document Number MB40IA B1-Phase
MB40IA
Rev B1
5
4
3
2
1
System Power On Sequence
D
D
C
C
B
B
A
A
ECS COMPUTER CORP. Title Size
Dat e: 5
4
3
2
Power Sequence Document Number MB40IA B1-Phase Custom Tuesday, November 09, 2010 1
Rev B1
MB40IA Sheet
4
of
44
5
4
3
2
1
D
D
U6E
CFG2 CFG4 CFG5 CFG6 CFG7
AK28 AK29 AL26 AL27 AK26 AL29 AL30 AM31 AM32 AM30 AM28 AM26 AN28 AN31 AN26 AM27 AK31 AN29
L7 AG7 AE7 AK2 W8
RSVD28 RSVD29 RSVD30 RSVD31 RSVD32
CFG[0] CFG[1] CFG[2] CFG[3] CFG[4] CFG[5] CFG[6] CFG[7] CFG[8] CFG[9] CFG[10] CFG[11] CFG[12] CFG[13] CFG[14] CFG[15] CFG[16] CFG[17]
CFG2
PEG Static Lane Reversal - CFG2 is for the 16x
1
R87 @1K-1-04
RSVD33 AT26 AM33 RSVD34 AJ27 RSVD35
1:(Default) Normal Operation; Lane # definition matches socket pin map definition CFG2
2
0:Lane Reversed
T8 J16 H16 G16
RSVD37 RSVD38 RSVD39 RSVD40
CFG4
AJ31 AH31 AJ33 AH33
C
AJ26
B4 D1
R101 2
1 @0-04
11/05 Modify
RSVD6 RSVD7
H_VCCP_SEL
J20 B18 A19
RSVD24 RSVD25 VCCIO_SEL
J15
RSVD27
2
27,33,34 Low_Voltage_EC
RSVD5
R98 10K-04
1
B
VAXG_VAL_SENSE VSSAXG_VAL_SENSE VCC_VAL_SENSE VSS_VAL_SENSE
F25 RSVD8 F24 RSVD9 F23 RSVD10 D24 RSVD11 G25 RSVD12 G24 RSVD13 E23 RSVD14 D23 RSVD15 C30 RSVD16 A31 RSVD17 B30 RSVD18 B29 RSVD19 D30 RSVD20 B31 RSVD21 A30 RSVD22 C29 RSVD23
+3.3VS
RSVD41 RSVD42 RSVD43 RSVD44 RSVD45
AR35 AT34 AT33 AP35 AR34
1
Display Port Presence Strap
R86 @1K-1-04
C
1:(Default) Disabled; No Physical Display Port attached to Embedded Display Port
2
CFG4
0:Enabled; An external Display Port device is connected to the Embedded Display Port
D E V R E S E R
RSVD46 RSVD47 RSVD48 RSVD49 RSVD50
B34 A33 A34 B35 C35
CFG6 AJ32 RSVD51 RSVD52 AK32
CFG5 1
VCC_DIE_SENSE AH27
AN35 RSVD54 AM35 RSVD55
RSVD56 RSVD57 RSVD58
KEY
PCIE Port Bifurcation Straps
1
R76 @1K-1-04 2
R70 @1K-1-04
CFG[6:5]
2
B
AT2 AT1 AR1
B1
CFG7
PEG DEFER TRAINING
1
R69 @1K-1-04 CPU-2013620-2
11: (Default) x16 - Device 1 functions 1 and 2 disabled 10: x8, x8 - Device 1 function 1 enabled ; function 2 disabled 01: Reserved - (Device 1 function 1 disabled ; function 2 enabled) 00: x8,x4,x4 - Device 1 functions 1 and 2 enabled
2
1: (Default) PEG Train immediately following xxRESETB de assertion CFG7
0: PEG Wait for BIOS for training
A
A
ECS COMPUTER CORP. Title
Sandy Bridge_Reserved
5
4
3
2
1
D
D
When Use DGPU,C77 Change to R? Type(Value:0-04) 1 mA JP6 2 1 CLOSE
POWER
U10G
+1.05V JP515 2
1300 mA
1 CLOSE C656 4 .7 U 6 . 3 0 6 R -K
+1.05V
C660 1 U 6 . 3 0 4 R -K
JP514
2
C659 1 U 6 . 3 0 4 R -K
C658 1 U 6 . 3 0 4 R -K
100 mA
1
AA23 AC23 AD21 AD23 AF21 AF23 AG21 AG23 AG24 AG26 AG27 AG29 AJ23 AJ26 AJ27 AJ29 AJ31
VCCCORE[1] VCCCORE[2] VCCCORE[3] VCCCORE[4] VCCCORE[5] VCCCORE[6] VCCCORE[7] VCCCORE[8] VCCCORE[9] VCCCORE[10] VCCCORE[11] VCCCORE[12] VCCCORE[13] VCCCORE[14] VCCCORE[15] VCCCORE[16] VCCCORE[17]
VCCADAC
E R O C
T R C
L12
C
2 @0-04
1
BJ22 C64 @ 1 0 U 6 . 3 0 8 R
+1.05VS_VCC_EXP
+1.05V JP511 2
1200 mA
1 CLOSE C630 4 .7 U 6 . 3 0 6 R -K
+3.3V JP4
2
C653 1 U 6 . 3 0 4 R -K
C633 1 U 6 . 3 0 4 R -K
C635 1 U 6 . 3 0 4 R -K
30 mA
1 CLOSE
C68 . 1 U -1 0 0 4 X -K
B
+1.05VS_1.5S_1.8S
+1.05V R635 2 JP513 2
+1.05V
40 mA
1 @0-04
C634 1 U 6 . 3 0 4 R -K
AN16 AN17 AN21
100 mA +1.05VS_VCC_DMI
21 mA
.1U-10-04X-K
+3.3V
1 mA
JP512 2 1
VSSALVDS
S D V L
VCCTX_LVDS[1] VCCTX_LVDS[2]
VCCTX_LVDS[4]
1 CLOSE
When Use UMA ,R644 Unstuff
AK36
+1.8V
2
AK37 AM37
60 A m
AM38 AP36
JP509 C638
C640
C636
10N-25-X04-K
10N-25-X04-K
4.7U-6.3-06R-K
2
1 CLOSE
AP37
VCCIO[28] VCCAPLLEXP
S O M C V H
VCCIO[15] VCCIO[16] VCCIO[17]
AN26
VCCIO[18]
AN27
VCCIO[19]
AP21
VCCIO[20]
AP23
VCCIO[21]
V33
VCC3_3[6]
When Use DGPU,C638 Change to R? Type(Value:0-04) 60 mA
+3.3V C
C684
V34
VCC3_3[7]
.1U-10-04X-K
40 mA VCCVRM[3] AT16
VCCDMI[1] AT20
I M D
AP24
VCCIO[22]
AP26
VCCIO[23]
AT24
VCCIO[24]
AN33
VCCIO[25]
AN34
VCCIO[26]
VCCDFTERM[1] AG16
VCC3_3[3]
VCCDFTERM[2] AG17
O I C C V
+1.05VS_1.5S_1.8S
+1.05VS_VCC_DMI
21 mA
+1.05V JP510 2
1 CLOSE
JP524 2
1 CLOSE
JP506 2
1 CLOSE
C631
VCCCLKDMI AB36
1U-6.3-04R-K
+1.05V
20 mA C677 1U-6.3-04R-K
BH29
AP16 BG6
1 CLOSE
C78
10N-25-X04-K
R644 @0-04
VCCALVDS
VCCTX_LVDS[3] AN19
U47
VSSADAC
C C V
CLOSE
+1.05V
C77
U48
+3.3V
AP17 AU20
I P S
T F D
VccAFDIPLL
+1.8V
+V_NVRAM_VCCQ
B
VCCDFTERM[4]
C654
AJ17
.1U-10-04X-K
+3.3VS
I D F
VCCDMI[2]
AJ16
/
VCCVRM[2]
VCCIO[27]
VCCDFTERM[3]
190 mA
VCCSPI
V1
20 mA
R155 2
1 @0-04
R154 2
1 0-04
+3.3V
C74
???02A650001-12
.1U-10-04X-K
+1.05VS_1.5S_1.8S R628 2
1 @0-04
+1.8V
R629 2
1 0-04
+1.5V
R630 2
1 @0-04
+1.05V
A
A
ECS COMPUTER CORP. Title
Cougar Point_Power1 Size Date: 5
4
3
2
Document Number MB40IA B1-Phase Custom Tuesday, November 09, 2010 1
Rev B1
MB40IA Sheet
17
of
44
5
4
3
2
1
LVDS + Webcam Connector +3.3V
Q4
D
S
2000 mA
FET-ME2306D
LVDSVCC_UMA
C503
G
4.7U-6.3-06R-K CN2
2
2 R508 100-1-04
D
VIN_SW
R504 100K-1-04 2 1
1
14 NB_LVDSA_P0 14 NB_LVDSA_N1
1
2 R1 56K-04
D
C501
Q503 FET-ME2N7002E-HF 1
.1U-25-04R-K
G
Q2 FET-ME2N7002E-HF
G
S
D
11/04 Modify
S
S Q1 FET-ME2N7002E-HF R3 G 1
NB_LVDSA_P2 NB_LVDSA_CLKN
14 NB_LVDSA_P2 14 NB_LVDSA_CLKN
D
BL_ON_UMA R535 1
2 0-04
CCD_USBCCD_USB+ INV_BL_ON_UMA COLOR_ENGINE_EN VIN_LCD_IN
2 0-04
27 COLOR_ENGINE_EN
VIN_LCD_IN
2
1000 mA
NB_LVCC_EN 14
C3
R2 100K-04
1 3 5 7 9 11 13 15 17 19 21 23 25 27 29
LVDSVCC_UMA WEBCAM_5V_UMA NB_LEDID_DAT NB_LVDSA_P0 NB_LVDSA_N1
LVDSVCC_UMA
R11 100-06
+5VA_LDO
NC1 NC2
.1U-25-04R-K
C 100
LVDSVCC_UMA +3.3V_LVDS_UMA NB_LEDID_CLK NB_LVDSA_N0
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30
NC1 NC3 NC2 NC4
L501 C 50 5
0-06 . 1U -1 0- 04 X- K
+3.3V D
NB_LVDSA_N0 14
NB_LVDSA_P1 NB_LVDSA_N2
NB_LVDSA_P1 14 NB_LVDSA_N2 14
NB_LVDSA_CLKP WEBCAM_5V_UMA
NB_LVDSA_CLKP 14
WEBCAMEN_UMA BRIGHTADJ_UMA
C1
.1U-10-04X-K
L2
0-06
R536 2 R540 1 R542 1 C511
VIN_LCD_IN
+5V
1 0-04 2 0-04 2 @0-04 @.1U-10-04X-K
WEBCAM_EN 27 EC_BL_PWM 27 PCH_BL_PWM 14
31 32
CON-WTB-JH3-2232-303N con_wb-30v100_jh3-0232-303n_fcn
22 0P- 50- 04N -J
1
For LCD Timing Solution
C
L4
L502 15 15
4 1
USB_PN5 USB_PP5
R1I R1O R2I R2O
CCD_USBCCD_USB+
3 2
VIN_LCD_IN
@CK-3216F2SF-900T04
C101
C
B D- QT 16 08 RL0 30 HC -H F
Q45 S @FET-PA503EMG
D
G
@2200P-50-04X-K
VIN
R290 @100K-1-04 2 1
1 R291 @100K-1-04
+3.3V 14 NB_LEDID_CLK 14 NB_LEDID_DAT
NB_LEDID_CLK
R20
1
2 2.2K-04
NB_LEDID_DAT
R526 2
1 2.2K-04
2 D
S
10/28 Modify
Q46 @FET-ME2N7002D-MATSUKI-HF EC_BL_EN G
2 R292 @220K-04
10/28 Modify
B
B
1
+3.3V C516
.1U-10-04X-K
5 27 14
1
EC_BL_EN NB_BL_EN
R546 1
2 0-04 R547 100K-04
4
BL_ON_UMA
2 U502 3 74AHC1G08-HF
R548 100K-04
11/08 Modify
A
A
10/28 Modify
ECS COMPUTER CORP. 10/28 Modify
Title
LVDS/Webcam Size Date:
5
4
3
2
Document Number MB40IA B1-Phase Custom Tuesday, November 09, 2010
Rev B1
MB40IA Sheet 1
20
of
44
5
4
3
2
1
Clock Gen +3.3V L9
VDD_3.3 @0-06 C51 @ 1 0 U 6 . 3 0 8 R -K
CLKGEN_XTAL_OUT D
CLKGEN_XTAL_IN
Y2
C50 @ .1 U -1 0 0 4 X -K
D
Place close to each VDD pin as possibble. Place within 0.5" of CLKGEN
@14.31818M-20-20-KT-D
R 61 1
C53 @ .1 U -1 0 0 4 X -K
@ 10 M- 04
VDDSRC_IO L10
C598
C597
@33P-50-04N-J
@33P-50-04N-J
@0-06 C52 @ 1 0 U 6 . 3 0 8 R -K
C608 @ .1 U -1 0 0 4 X -K
C56 @ .1 U -1 0 0 4 X -K
C
C
VDD_3.3 VDD_3.3
VDDSRC_IO
VDDSRC_IO U504
1 5 17 24 29
R111 @10K-04
VDD_DOT96 VDD_27MHz VDD_SRC VDD_CPU VDD_REF
VDD_SRC_IO VDD_CPU_IO
15 18
CPU-0T CPU-0C
23 22
CPU-1T CPU-1C
20 19
DOT96T DOT96C
3 4
R618 R620
@0-04 @0-04
SRC-2T SRC-2C
13 14
R623 R622
@0-04 @0-04
SATA-T/SRC-1T SATA-C/SRC-1C
10 11
R624 R625
@0-04 @0-04
GND_DOT96 GND_27MHz GND_SATA GND_SRC GND_CPU GND_REF
2 8 9 12 21 26
BCLK_SEL CLKGEN_XTAL_OUT 27 CLKGEN_XTAL_IN 28 R108 @10K-04
16 VR_PWRGD_CLKEN
R621
+3.3V
R109
13 CLK_BUF_REF14
VR_PWRGD_CLKEN 25 @10K-04 CPU_STOP# 16
@33-04
BCLK_SEL
30
XTAL_OUT XTAL_IN **CK_PWRGD/PD# *CPU_STOP#
**REF/BCLK_SEL
Unstuff For FIC Mode B
BCLK
SEL input
BCLK
6 7
NOTE
27MHz 27M_SS
_ 0
ICS9LRS3197
133MHz
1
100MHz
Default
R615 R612
27 SMBCLK_CLK 27 SMBDAT_CLK
@0-04 @0-04
CLKGEN_CLK CLKGEN_DATA
32 31
SCL SDATA
TGND
Unstuff For FIC Mode R617 R619
@0-04 @0-04 TP501 TP502
CLK_BUF_BCLK_P 13 CLK_BUF_BCLK_N 13
Unstuff For FIC Mode CLK_BUF_DOT96_P 13 CLK_BUF_DOT96_N 13 CLK_BUF_EXP_P 13 CLK_BUF_EXP_N 13 CLK_BUF_CKSSCD_P CLK_BUF_CKSSCD_N
13 13
Unstuff For FIC Mode
B
33
@ICS9LRS3197AKLFT
A
A
ECS COMPUTER CORP. Title
Clock Gen (ICS9LRS3197) Size Date: 5
4
3
2
Document Number MB40IA B1-Phase Custom Tuesday, November 09, 2010
Rev B1
MB40IA Sheet 1
23
of
44
5
4
3
2
1
Card Reader
11/05 11/02 10/28 10/26
CardReader ID Select
Haier
IA2
Nustuff; @ Small BD
Hasee
IA3
Stuff; @ MB
Modify Modify Modify Modify
D3V3 R889
D
0-04
SEL24_48M
SEL24_48M 13
2
+3.3V
D3V3
D
R775 100K-04
400 mA L526
0-06
C793
4.7U-25-08R-K
R863
@0-04
C794
.1U-10-04X-K
C858
@47P-50-04N-J
C861
.1U-10-04X-K
1
I L T X
R870
@0-04
O L T X Y5
BUF_PLT_RST# 6,12,15,22,27
C756 @X-12-20-30-KT-S 1U-6.3-04R-K R 890
11/02 Modify
Close to Chip Pin11/33
@ 270 K- 04
C897
C898
@5.6P-50-04N-D
@5.6P-50-04N-D
+3.3V C 856
1U- 6. 3- 04R -K
C 857
. 1U -1 0- 04X- K
I O L L T T X X
Close to Chip Pin8
. 1U -1 0- 04 X- K
C 85 9
1 U- 6. 3- 04 R- K
VREG
R866
0-04
1
R867
6.2K-1-04
RREF
2 3
USB_PN13_IO_R
4
USB_PP13_IO_R
5 6 7
+3.3V
8
+3.3V_CARD
9
C895
B
.1U-10-04X-K VREG
10
D3V3
11 12
I L O D T L N X T G X
0 Ohm
12MHz Crystal Input
Floating / 10K
R864 1
L # E # E # # E T L E L E E S S C C A R W _ R _ _ _ _ _ E D D D D D D X X X / X X O 2 / T 3 M T A A D D _ _ D D S S
NC
SD_CLK/XD_D1/MS_CLK
DM
D3V3
DP
GND
RTS5159
GND NC
SD_DAT6/XD_D7/MS_D3 NC
3V3_IN
MS_INS#
CARD_3V3
SD_DAT7/XD_D2/MS_D2
VREG
SD_DAT0/XD_D6/MS_D0
D3V3
SD_DAT1/XD_D3/MS_D1
GND
XD_D5/MS_BS
R T C _ L A T X
RTS5159-HF
R807
0 O S I O D C K I S D P E E E E G E E E E
# D C _ D x
P W _ D S
# D C _ D S
4 D _ S M
4 D _ D x / 1 T A D _ D S
2 0-04 L532
RREF
Y D R _ D X
AV_PLL
11/08 Modify
D3V3
3 T A D _ D S
7 D _ S M / # P W _ D X / 4 T A D SD_CMD _ D S SD_DAT5/XD_D0/MS_D6
R807 Clk Gen 48MHz Input
2 T A D _ D S
8 7 6 5 4 3 2 1 0 9 8 7 4 4 4 4 4 4 4 4 4 3 3 3
U510 C
C 86 0
L E S _ E D # T O S M R
15 15
1 4
USB_PN13 USB_PP13
USB_PN13_IO_R USB_PP13_IO_R
2 3
R2I R2O R1I R1O
C
@CK-ATCM2012-900T R865 1
2 0-04
CN14 36
SD_CMD
35
SD_CD# SD_DAT2 SD_DAT3 SD_CMD
R224
34
SD_CLK/MS_CLK
33
D3V3
+3.3V_CARD SD_CLK/MS_CLK R875 2
MS_D3
SD_DAT0/MS_D0 SD_DAT1 SD_WP
32 31 30 29
MS_INS#
28
MS_D2
27
SD_DAT0/MS_D0
26
MS_D1
25
MS_BS
0-04
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23
1 0-04
+3.3V_CARD SD_CLK/MS_CLK R876 2 MS_D3 MS_INS# R888 MS_D2 SD_DAT0/MS_D0 MS_D1 MS_BS
1 0-04 0-04
C874 C110 . .1 1 U U -1 -1 0 0 0 0 4 4 X X -K -K
SD_CD# SD_D2 SD_D3 SD_CMD SD_GND SD_VCC SD_CLK SD_GND SD_D0 SD_D1 SD_WP MS_GND MS_VCC MS_CLK MS_D3 MS_INS# MS_D2 MS_D0 MS_D1 MS_BS MS_GND 22 23
NC1 NC2
B
NC1 NC2
???31AK01910-00 CON_3IN1-R_MDR019-C0-1042_PRO
5 D _ S M
3 4 5 6 7 8 9 0 1 2 3 4 1 1 1 1 1 1 1 2 2 2 2 2
0-04
11/02 Modify 11/05 Modify
S D _ W P
S D _ C D #
S D _ D A T 1
A
A
ECS COMPUTER CORP. Title
Card Reader (RTS5159-GR) Size Date:
Document Number MB40IA B1-Phase Custom Tuesday, November 09, 2010
Rev B1
MB40IA Sheet
26
of
44