Contents Manual for K-Notes ................................................................................. 2 Diodes ..................................................................................................... 3 Transistor Biasing .................................................................................. 11 Transistor Amplifier .............................................................................. 19 Feedback Amplifiers .............................................................................. 25 Operational Amplifiers (OP-AMP) ......................................................... 29
© 2015 Kreatryx. All Rights Reserved.
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Manual for K-Notes Why K-Notes? Towards the end of preparation, a student has lost the time to revise all the chapters from his / her class notes / standard text books. This is the reason why K-Notes is specifically intended for Quick Revision and should not be considered as comprehensive study material. What are K-Notes? A 40 page or less notebook for each subject which contains all concepts covered in GATE Curriculum in a concise manner to aid a student in final stages of his/her preparation. It is highly useful for both the students as well as working professionals who are preparing for GATE as it comes handy while traveling long distances. When do I start using K-Notes? It is highly recommended to use K-Notes in the last 2 months before GATE Exam (November end onwards). How do I use K-Notes? Once you finish the entire K-Notes for a particular subject, you should practice the respective Subject Test / Mixed Question Bag containing questions from all the Chapters to make best use of it.
© 2015 Kreatryx. All Rights Reserved. 2
Diodes Representation: A: Anode
K : Cathode
The voltage at which the charged particles start crossing the junction is called as cut – in voltage or Threshold voltage. It is represented as VAK V .
When VAK V , depletion region exists and no charge carriers cross the junction, therefore
I 0 D When VAK V , number of charged particles crossing the junction increases & the current
through the diode increase, non – linearly or exponentially. Diode in the condition is said to be forward biased. VAK VT ID IS e 1 I = reverse saturation current S KT V = Thermal voltage = T q K = Boltzmann constant T = Temp. in k q = charge of one e V = 26mv at room temperature T
= intrinsic factor
When V 0 , diode is said to be in reverse biased condition & no majority carriers cross the AK depletion region, hence I 0 D
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Characteristics of Diode
Equivalent circuit of diode
Forward Bias
Reverse Bias
Diode Resistance 1) State or DC Resistance V R AK DC I D
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2) Dynamic or AC Resistance dV V T R D AC dI I D D Diode Applications Clippers It is a transmission circuit which transmits a part of i/p voltage either above the reference voltage or below the reference voltage or b/w the two reference voltages.
Series Clippers i) Positive Clippers V V sin t i m V V m R
: When V V => V V O i R R When V V => V V O i R i
ii) Negative Clipper V V sin t : i m
When V V => V V o R i R
V V m R
When V V => V V i o R i
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Shunt Clipper i) Positive Clipper When V V , D is ON i R V V o R When V V , D is OFF i R V V o i
ii) Negative Clipper When V V , D is ON i R V V o R When V V , D is OFF i R V V o i
Two level Clipper When V V , D is OFF & D is ON i 2 1 2 V V 0 2 When V V & V V , D is OFF & D is OFF i 2 i 1 2 1 V V o i When V V , D is OFF D is ON i 1 2 l V V o 1
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CLAMPERS These circuits are used to shift the signal either up words or down words.
Negative Clampers
When V 0 R +ve peak is shifted to 0 -ve peak is shifted to 2V m When V 0 R +ve peak is shifted to V R -ve peak is shifted to -2 V V m R
Positive Clampers
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When V 0 R -ve peak is shifted to 0 +ve peak is shifted to 2V m When V 0 R -Ve peak is shifted to V R +ve peak is shifted to 2V V m R Rectifier It converts AC signal into pulsating DC. 1) Half wave rectifier During positive half wave cycle R L V V sin t 0 m R R L f R = diode resistance f
During negative half cycle V 0 0
V V m 0 avg
4 RL 100% 2 R f RL V V m 0 RMS 2 V Form Factor = RMS 2 V avg
Ripple factor = PIV V m
FF2 1
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Bridge full wave rectifier When +ve half wave cycle
R L V V t o R 2R L f When –ve half wave cycle
R L V V t o R 2R L f
Vo avg
2V m
8 1 R 2 f 1 2 R L V V m o RMS 2 FF 2 2
100%
PIV V m
Zener Diode
A heavily doped a si diode which has sharp breakdown characteristics is called Zener Diode.
When Zener Diode is forward biased, it acts as a normal PN junction diode.
For an ideal zener diode, voltage across diode remains constant in breakdown region.
If I
z(min)
is not given, then consider I
z(min)
0
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Voltage Regulator Regulators maintains constant output voltage irrespective of input voltage variation.
Zener must operate in breakdown region so V V i z I I I z L
V I z L R L I I I max z max L I I I min z min L I
z max
I
z min
I
max
I L
I I min L
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Transistor Biasing Bipolar Junction Transistor
Current conduction due to both e- & holes
It is a current controlled current source. NPN Transistor
PNP Transistor
Region of Operation Junctions
Region of operations
Applications
i)
J RB E J RB C
cut – off
Switch
ii)
J FB E J RB C
active
amplifier
iii)
J FB E J FB C
saturation
Switch
iv)
J RB E J FB C
reverse active
Attenuation
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Current gain (α) (common base) I I I C nc o : injected majority carrier current in collector I nc I nc I E I I I 1 I B o ; I B I C E 1 1 1 o
Current gain β (common emitter) I I 1 I c B o
; 1 1
These relations are valid for active region of operations. Characteristics of BJT
Common Base characteristics
input V , I BE E output V , I CB C
Input characteristics V vs I when V cons tant CB BE E
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Output characteristics
Common emitter characteristics
inputs V , I BE B
outputs V , I CE C
Input characteristics
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Output characteristics
Transistor Biasing 1) Fixed Bias method V I R V 0 cc B B BE
V V BE I cc B R B Assuming active region of operation I I c B V V I R CE CC C C
Verification
V V Active Re gion If V CE CC CE sat
If not ; then saturation region
For saturation region , V V CE CE sat I C
V V CC CE sat R
C
I In saturation region , I C B min 14
2) Feedback Resistor Bias Method By KVL
V I I R I R V I R 0 cc c B c B B BE E E
V I I R I R V I I R 0 cc c B c B B BE C B B
Assuming active region I I c B
I B
V V cc BE
R 1 R R B C E
; I I c B
V V I I R R CE CC C B C E
3) Voltage divider bias or self-bias By thevenin’s theorem across R
2
R
2 V V TH CC R R 1 2 R R R 2 1 TH R R 1 2 Apply KVL
V V I R I I R TH BE B TH B C E
Assuming active region I I C B V V TH BE I B R 1 R TH E V V I R I R CE CC C C E E
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FET Biasing JFET
When V is negative, depletion layer is created between two P – region and that pinches the GS channel between drain & source. The voltage at which drain current is reduce to zero is called as pinch off voltage. Transfer – characteristics of JFET is inverted parabola
V GS I I 1 D DSS V GS OFF
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When V 0, I I GS D DSS V , I 0 When V GS GS OFF D
Pinch of voltage, V V p GS OFF
For a N – channel JFET, pinch off voltage is always positive V 0 & V 0 p GS
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JFET Parameters 1) Drain Resistance
V r DS d I DS It is very high, of the order of M . 2) Trans conductance
I dI D D g m V dV GS GS V GS I I 1 D DSS V GS OFF
2I dI DSS D g m dV V GS GS OFF
2
V 1 GS V GS OFF
3) Amplification factor
V DS g r md V GS
MOSFET (Metal Oxide Semi-conductor FET)
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Enhancement Type MOSFET
No physical channel between source & drain
To induce a channel Gate – source voltage is applied. Depletion MOSFET
Physical channel present between source & drain. Types of MOSFET
Operating characteristics 1. For n – channel MOSFET
cut off region
I 0 for V V D GS T
V2 W I C V V V DS D n ox L GS T DS 2
V V and V V V GS T DS GS T
W VGS VT I C D n ox L 2
(linear region)
2
V V and V V V GS T DS GS T
(saturation region)
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2. For p – channel MOSFET (cut – off region)
I 0 for V V D GS T
V2 W I C V V V DS D n ox L GS T DS 2
V V and V V V GS T DS GS T 2 W VGS VT I C D n ox L 2 V V and V V V GS T DS GS T
(linear region)
(saturation region)
Transistor Amplifier Small signal analysis for BJT
h – parameter model of BJT
V hI h V 1 i1 r 2 I h I h V 2 o 2 f1
I current gain, A 2 I I 1 h R f L A I 1h R o L
Input Impedance,
V Z 1 h h A R i i r I L I I 19
Voltage gain, A
Output impedance,
V
AR I L Z i Z
o
1 hh h f r o h R i s
Common Emitter (CE) Amplifier
Small signal model
h e V Voltage gain A o f R R v c L V he i i
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High frequency Analysis of BST
= base spreading resistance. r bb' = input resistance. r b'e = feedback resistance. r b'c r = output resistance. ce
= diffraction capacitance. C b' e = Transition capacitance. C b'c g = Transconductance. m
Hybrid π - parameters
Ic Q
1) g m V T
KT , ; V T q
= dc bias point collector current. I CQ h 2) r fe b'e g m
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High Frequency Model
= open circuited. r b'c
Low Frequency Model
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Voltage gain as frequency
Low Frequency Range
External capacitor C and C are short circuited. E C
Internal capacitor C are open circuited. and C b'c b'e
Circuit becomes like.
= acts as high pass filter.
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High frequency range
External capacitors C ,C and C are short circuited. b c E
is open circuited. C b'c
Equivalent circuit behaves as a low pass filter with cut-off frequency fL. Mid – band range
All internal and external capacitance are neglected, so gain is independent of frequency. FET Small Signal parameters
I Trans conductance, g D m V GS In non – saturation region
I W g D C .V m V n ox L DS GS In saturation region
W g C V V ms n ox L GS T
Small Signal equivalent circuit
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For low frequency
For high frequency
Feedback Amplifiers Ideal Amplifier Z in Z 0 o Positive feedback : V V V i s f Negative Feedback : V V V i s f V A For negative feedback, o V 1 A s V A For positive feedback, o V 1 A s
Positive feedback is used for unstable system like oscillators.
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Effects of Negative Feedback i) Sensitivity
A A
Without feedback = With feedback =
A A
f
f
A
1 A f A 1 A A f
ii) Input Impedance Without feedback = Z
i
With feedback = Z if Z
if
Z 1 A i
iii) Output impedance Without feedback = Z With feedback = Z Z
of
Z
o
o
of
1 A
Negative feedback also leads to increase in band width . Topologies of Negative feedback Output Voltage Voltage Current Current
Input Series Shunt Series Shunt
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1) Voltage Series Topologies V V o f
It is called as series shunt feedback or voltage - voltage feedback. In this case, input impedance increases & output impedance decreases. 2) Voltage shunt topologies I V o f
= Trans conductance
It is called as shunt-shunt or voltage current feedback. 3) Current series Topologies V I o f
= resistance
It is called as shunt – shunt or voltage current feedback. 4) Current shunt Topologies I I o f
It is also called as shunt – series or current – current feedback.
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Circuit Topologies 1) Voltage series
2) Voltage shunt
3) Current – series
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4) Current – shunt
Operational Amplifiers (OP-AMP) + Non – inverting terminal - inverting terminal Parameters of OP–AMP 1) Input offset voltage Voltage applied between input terminals of OP – AMP to null or zero the output. 2) Input offset current Difference between current into inverting and non – inverting terminals of OP – AMP. 3) Input Bias Current Average of current entering the input terminals of OP – AMP. 4) Common mode Rejection Ratio (CMRR)
Defined as ratio of differential voltage gain A to common mode gain A . d cm
CMRR
A A
d
cm
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5) Slew Rate Maximum rate of change of output voltage per unit time under large signal conditions. SR
dV o dt max
V s
Concept of Virtual ground In an OP – AMP with negative feedback, the potential at non – inserting terminals is same as the potential at inverting terminal. Applications of OP –AMP 1) Inverting Amplifier
R V f V o R in 1
2) Inverting Summer
V V V V R a b c o f R R R b c a
3) Non – inverting Amplifier
R V 1 f V o R in 1
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4) Non – inverting summer If R R R R a b c
V R2 V R2 V R2 V a b c 1 R R R R2 R R2 2
V 1
Va Vb Vc 3
R V V V b c V 1 f a o R 3 1
5) Differential Amplifier By Super position R V 1 f ob R 1
R 3 V R R b 3 2
R f V V oa R a 1 V V V o oa ob
6) Integrator
1 t V V dc o RC o in
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7) Differentiator
dV V RC in o dt
8) Voltage to current converter
V I in L R
9) Current to voltage Converter
V R I out p IN
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10) Butter – worth Low Pass Filter
R V 1 f o R 1
V o V in 1
V in 1 j2fRC
A
f f j f H
R 1 A 1 f R ; f H 2RC f 1
11) Butter – worth High Pass Filter
R V o 1 f V R in 1
j2fRc 1 j2fRC
j f f L A f f 1 j f L
R A 1 f f R 1
1 f L 2RC
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12) Active Half – wave rectifier In this circuit, diode voltage drop between V input & output is not V but rather D , D A
where A = open loop gain of OP – AMP. V V in o
13) Active Full – wave Rectifier
This circuit provides full wave rectification with a gain of R R 1
R V V m R m 1
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14) Active Clipper V V , Diode conducts and V V IN R o
And when V V Diode is OFF IN R V V o IN
15) Active Clamper
V V V o IN p V = peak value of V p IN
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16) Comparators
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17) Schmitt Trigger Inverting Schmitt Trigger
When output is V , then V V sat sat ref
When output is V , then V V sat sat ref R 2 When R R 1 2
Upper triggering point utp V sat Lower triggering point Ltp V sat
Hystersis voltage = UTP LTP 2V sat
R1 UTP V V sat R1 R 2 R R1 LTP V V sat R1 R 2 R
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Non – Inverting Schmitt Trigger
R R Upper trigger Point UTP 2 V , Lower triggering point LTP 2 V sat R R sat 1 1
Hysteric voltage = UTP LTP 2V sat
18) Relaxation Oscillator
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R , 2 R 1
R 2 R R 2 1
1 T 2RCln 1 f
1 T
1 1 2RCln 1
555 Timer Pin Diagram
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Bistable multi vibrator acts as a FF.
Monostable Multi vibrator produces pulse output.
Bistable Multi vibrator acts as free running oscillator.
A stable Multi vibrator
T 0.69 R R c c 1 2 T 0.69R c d 2
T T T 0.69 R 2R C c d 1 2 f
1 1 T 0.69 R 2R C 1 2
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