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Diagrama T-con TCL
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Diagrama T-con TCL
esquema de una t-con de LCD TVFull description...
Author:
Jarvin Saenz Pavón
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VCC_3.3V
VIN_12V
9
AVDD_16.6V
7
6
5
4
AVDD16V6 T
TVIN12V
3
2
HVIN_12V
VONE_28V
L102 22UH
VCC3V3 T
H
22UH
C121 1U
HVIN12V T
C104 10U
Q102 2N7002P
L104 10UH
R146 0R SR34 D101
R147 20K
HAVDD_8.2V
R150 100K
C128 10U
C125 47U
C131 0.022U
C130 10U
C157 47U
25V
DGND
R191 100K
CSP
DGND
DGND
DGND 25V C129 10U
C103 10U
C102 1U
C101 1U
C36 10U
C100 0.1U
C38 10U
DGND
C120 1U
AVDD_16.6V
LX
DGND
C123 10U
HVIN_12V VIN_12V
R148 15K
SR34 D100 C124 10U
0R
1
VONE28V T
HAVDD_8.2V HAVDD8V2 T
L103
R110
0R R145
R195 R68
H
8
R144 33K
+12V_TCON
10
C126 10U C127 10U
11
R196 R68
12
Von Current Limit
DGND GD
DGND
Output For Panel's Right Channel
VIN_12V
Output For Panel's Left Channel
PMV65XP D
Q109
G
DGND
P1L
DGND
C122 10U
NTC
LX
GD
DGND
48 47 46 45 44 43 42 41 40 39 38 37 AGND AVDD LX1 PGND5 VIN4 GD LX4 PGND4 HAVDD NTC PGND3 GATEP GATEN LXN/CSN OUT_VOFF VOFF DRN VSS SCL SDA STV CPV1 CPV2 CPV3
C112 10U
R141 0R
R129 0R
R140 0R
R119 0R
R134 0R CKVB3
CKV3
R124 CKV3 0R CKVB2
CKVB1
R114 CKV2 0R CKVB1 R109 R108 0R CKV1 0R STVP
R139 0R
CKVB2
CKVB3
CKV Current Limit Resisters
13 14 15 16 17 18 19 20 21 22 23 24
STVP
CSN
R199 NC/ 0R
VGMA10 VGMA11 VGMA12 VGMA13 VGMA14 VGMA15 VGMA16 VGMA17 VGMA18
C111 1U
DGND
L101 10UH
STV VCST
C113 10U
DGND
R210 0R
VSS1_-7.5V
C117 1U
FBB1
SCL_I SDA_I STV CPV1 CPV2 CPV3
VCC_3.3V
POL TP
F
STVP CKVB3 CKVB2 CKVB1 CKV3 CKV2 CKV1
DGND
E DGND
VOFFE-11V T
DGND
VCG2 VCG3 SVC
CSN 0R R151
SR34 D102
AVDD_16.6V
AVDD_16.6V
P2R
REF GAMMA
R172 820R
VSS1_-7.5V HAVDD_8.2V
C132 10U
VCC_3.3V
RT6905
R152 2K7
VGMA10 VGMA11 VGMA12 VGMA13 VGMA14 VGMA15 VGMA16 VGMA17 VGMA18 FB_L VCS1 VCS2
36 35 34 33 32 31 30 29 28 27 26 25
LXP/CSP VON CKVB3 CKVCS3 CKV3 CKVB2 CKVCS2 CKV2 CKVB1 CKVCS1 CKV1 STVP
U1
CKV2
VOFFE_-11V
POL TP
LV6B_P LV6B_N
L105 33UH
LV6A_P LV6A_N
LV5B_P LV5B_N
VIN_12V
1U C119 CSP
VSS-7V5 T
LV5A_P LV5A_N
C116 0.1U
COMP1 FB5 FB2 VL PGND1 LX2 BOOT2 VIN2 BOOT5 LX5 PGND2 VIN3
VOFFE_-11V
LV4A_P LV4A_N
1 2 3 4 5 6 7 8 9 10 11 12
FBB1
C109 2U2
LV4B_P LV4B_N
C114 10U
LV3A_P LV3A_N LVCLKA_P LVCLKA_N
DGND
5K1 R143
VONE_28V
R100 120K
VIN_12V
LVCLKB_P LVCLKB_N
R104 8K2
LV2A_P LV2A_N
R101 10K
LV3B_P LV3B_N
C115 10U
LV1A_P LV1A_N
C108 0.33U
LV2B_P LV2B_N
R106 12K
VGMA1 VGMA2 VGMA3 VGMA4 VGMA5 VGMA6 VGMA7 VGMA8 VGMA9
5K1 R142
CKV1
LV1B_P LV1B_N
C158 NC/ 470P
VCST STV
DGND
Falcon F2
R105 2K7
CKV1 CKV2 CKV3 CKVB1 CKVB2 CKVB3 STVP
VCS4 VCS3 FB_R VGMA1 VGMA2 VGMA3 VGMA4 VGMA5 VGMA6 VGMA7 VGMA8 VGMA9
CKVB3 TSTVP CKV2 TCKV3 TCKVB1 TCKVB2 T TCKV1 T
SVC VCG1 VCG2
NTC
DGND
E
VSS1_-7.5V
G
DGND
VCC_3.3V
DGND
F
HAVDD_8.2V
DGND
S
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80
AVDD_16.6V
DGND
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80
G
DGND U_H
DGND
DGND
D
+12V_TCON
FB_L C148 0.1U
INA-
C156 NC/ 1U
INB-
L_L L_H WPN
SDA2 SCL2 C162 0.22U
11
10
9
8
7
6
R171 5K1 R169 5K6
C143 0.1U DGND WPN
VGMA1
VGMA2
TCL
VGMA4 VGMA5 VGMA6
ADDRESS1 ADDRESS2 ADDRESS3 TELEPHONE
VGMA7 DGND VGMA8
A
DRAWN
VGMA9
OUTC
5
4
R168 240R
DGND DGND
C135 10U
C160 0.1U
C142 0.1U
AVDD_16.6V
48 47 46 45 44 43 42 41 40 39 38 37 INPA INNA OUTA INB INNB OUTB INPC INNC OUTC CVDD REFL_L REFL_H AGND DVDD A0 SDA2 SCL2 EN SDA1 SCL1 VCC RST WPN R_SET
R193 NC/ 4K7
DGND
U_L U_H VGMA1 VGMA2 VGMA3 VGMA4 VGMA5 VGMA6 VGMA7 VGMA8 VGMA9
CHECKED ON: DD-MM-YY BY: ......
ON: BY:
12
R170 910R
C144 0.1U
T L_L T L_H
T U_H 0.1U
C161
C139 10U
INBOUTB
OUTC
INAOUTA
C133 10U
OUTB
36 35 34 33 32 31 30 29 28 27 26 25
VGMA9 T
DGND
DGND L_L
VGMA3
R194 NC/4K7
VCC_3.3V
DGND
OUTA
T U_L
C138 10U AVDD_16.6V R153 24K VGMA18 T VGMA16 T
R156 27K DGND
INB-
R188 5K1
TOUTC TOUTB
FB_R
VGMA12
R202 0R
A
C153 1U
REFU_L REFU_H AVDD OUT_REFU_H OUT1 OUT2 OUT3 IML7939A OUT4 OUT5 OUT6 OUT7 OUT_REFU_L
U100
C137 0.1U
DGND
VGMA13
VGMA11
C
DGND
VGMA7 T VGMA4 T VGMA6 VGMA8 T VGMA5T VGMA3 T T
TCON12V T
P100
R187 2K7
VGMA14
DGND L_H
VGMA2 T
DGND
T SVC
SVC
C155 82P
VGMA15
DVR_OUT SET GND OUT_REFL_L OUT14 OUT13 OUT12 OUT11 OUT10 OUT9 OUT8 OUT_REFL_H
VGMA10
NC R167
TVCG3
VCG3
SVC
OUTC
VGMA16
1 2 3 4 5 6 7 8 9 10 11 12
VGMA18 VGMA17 VGMA16 VGMA15 VGMA14 VGMA13 VGMA12 VGMA11 VGMA10
I2C2_EN SDA_I SCL_I
VCG1
DGND
DGND
R157 15K
VGMA18 VGMA17
U_L
Falcon G1
WP_I
C
R183 0R R189 0R
DGND
L_L
L_H
DGND
VGMA1 T WPN T
BT3906 Q107
TVCG1
B
DGNDT
R184 0R
VCS4
TVCS4
E
VCS1
TVCS1
IO10 T
IO9 T
R185 0R
VCST OPAMP DGND
DGND R198 4R7 VCST
5
13 14 15 16 17 18 19 20 21 22 23 24
R186 0R
6
DGND
U_H
DGND
DGND
C136 0.1U
E
OUTB
LV1A_N LV1A_P
7
HVIN_12V
C159 0.1U
LV2A_N LV2A_P
Q106 BT3904
NC2 GND MAX9650
8
C134 0.1U
C B
C154 10U
LV3A_N LV3A_P
OUTA
VGMA11 T
LVCLKA_N LVCLKA_P
VDD
INA+
VGMA13 T
HVIN_12V
T INA-
LV4A_N LV4A_P
R163 560R C141 0.1U
R164 620R
C152 NC/ 1U
FB_R
NC3
INA-
VGMA17 T
4
NC1
VGMA15 T VGMA14 VGMA12 T T
3
HVIN_12V
LV5A_N LV5A_P
2
TOUTA
FB_RT FB_L T
LV6A_N LV6A_P
FB_L
INA-
R182 5K1
TVCST
LV1B_N LV1B_P
C149 1U
R154 20K
U101 1
R181 2K7
LV2B_N LV2B_P
12K R158
R155 8K2
C151 82P DGND
LV3B_N LV3B_P
VGMA10 T
LVCLKB_N LVCLKB_P
R165 7K5
C
LV4B_N LV4B_P
HVIN_12V DGND
VCG2
R162 0R
R161 0R
R160 0R
B
VCS3
R179 0R
U_L
R159 0R
BT3906 Q105
C140 0.1U
R178 0R E
LV5B_N LV5B_P
VCS2
C164 1U
OUTA
AVDD_16.6V
R166 7K5
R177 0R
C163 10U
Q104 BT3904
E
TVCG2 TVCS3
LV6B_N LV6B_P
C B
TESTT
THIS DRAWING CANNOT BE COMMUNICATED TO UNAUTHORIZED PERSONS COPIED UNLES S PERMITTED IN WRITING
CPV2
C150 10U
STV CPV3 IO8
HVIN_12V
TVCS2
T WP TCPV2 T SDA STV T T IO8 T SCL
B
TCPV3 T TP CPV1 T
C
R176 100R
POL TP CPV1
VCOM PUSH PULL
T POL
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64
WP_I SCL_I SDA_I
R175 100R
T INB-
R174 100R
HVIN_12V
Input From Mother Board
AVDD_16.6V
C145 0.1U
D
3
2
PAGE: OF : 1 FORMAT DIN A1
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