Microprocessor 8085 - Notes

11/9/2010

Microprocessor 8085 - notes

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Microprocessor 8085 - notes TheINTEL8085isa8-bitmicroprocessor. Itoperateson8-bitdataanduses16-bitaddresstoaccessthememory. Withthehelpof16-bitaddress,8085canaccess216 = 65536= 64Kmemorylocations. •

Itisa40-pinDIPchipdesignedusingNMOS.

•

Itoperateswithapowersupplyof+5voltsandGND.

•

8085generatestheclocksignalinternallybydividingtheexternalsuppliedclocksignalby two.

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INTEL8085ARCHITECTURE The architecture of .8085is shown in figure given below. The internal architecture of 8085includes the ALU, timing and control unit, instruction register and decoder, register array, interrupt control andserialI/Ocontrol.

OPERATIONSPERFORMEDBY8085 TheALUperformsthearithmeticandlogicaloperations. The operations performed byALU of8085are addition,subtraction,increment,decrement, logical AND, OR, EXCL U8IVE -OR, compare, complement and left / right shift . The accumulatorandtemporaryregisterareusedtoholdthedataduringanarithmetic/ logical operation. Afteranoperationtheresultisstoredintheaccum ulatorandtheflagsaresetorreset accordingtotheresultoftheoperation. FLAGREGISTER: Thereare fiveflagsin 8085, whichare signflag(8),zeroflag (Z),auxiliarycarryflag(AC), parityflag(P) and carryflag(CY) . Thebitpositionsreservedfortheseflagsintheflagregister areshowninfigurebelow.

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Microprocessor 8085 - notes ter an o perat on, t e most s gn cant t o t e re su t s , t e ns gn ag s se t. ezero flagisset,iftheALUoperationresultsinzeroanditisresetiftheresultisnon -zero. Inan arithm eticoperation,whenacarryisgeneratedbythelowernibble,theauxiliarycarryflagisset. Afteranarithmeticorlogicaloperation,iftheresulthasanevennumberof1'stheparityflagisset, otherwiseitisreset. Ifanarithmeti coperat ionresultsinacarry,thecarryflagissetotherwiseitisreset. Amongthe fiveflags,theACflagisusedinternallyforBCDarithmeti candotherfourflagscanbeusedbythe programmertochecktheconditionsoftheresultofanoperation.

TIMING&CONTROLUNIT: The timing and control unit synchronizes all the microprocessor operations with the clock and generatesthecontrolsignalsnecessaryforcommunicationbetweenthemicroprocessorand peripherals.

INSTRUCTIONREGISTER&DECODER: Whenaninstructionisfetchedfrommemoryitisplacedininstructionregister . Thenitisdecoded andencodedintovariousmachinecycles.

REGISTERARRAY: •

ApartfromAccumulator (A-register),therearesixgeneral-purposeprogrammableregisters B,C,D,E,HandL.

•

Theycanbeusedas8-bitregistersorpairedtostorel6 -bitdata . TheallowedpairsareB -C, D-EandH-L.

•

ThetemporaryregistersWandZareintendedforinternaluseoftheprocessoranditcannot beusedbytheprogrammer.

•

•

STACKPOINTER(SP): ThestackpointerSP,holdstheaddressofthestacktop . ThestackisasequenceofRAM memorylocationsdefinedbytheprogrammer . Thestackisusedtosavethecontentof registersduringtheexecutionofaprogram. PROGRAMCOUNTER(PC): Theprogramcounter(PC) keepstrackofprogramexecution. Toexecuteaprogramthe starting address of the program is loaded in program counter . The PC sends out an address to fetchabyteofinstructionfrommemoryandincrementitscontentautomatically. Hence, whenabyteofinstructionisfetched,thePCholdstheaddressofthenextbyteofthe instructionornextinstruction.

INSTRUCTIONEXECUTIONANDDATAFLOWin8085

Theprograminstructionsarestoredinmemory,whichisanexternaldevice. Toexecuteaprogram in8085,thestartingaddressoftheprogramshouldbeloadedinprogramcounter . The8085output the content of program counter in address bus and asserts read control signal low. Also, the program counterisincremented. Theaddressandthereadcontrolsigna lenablethememorytooutputthecontentofmemory locationonthedatabus. Nowthecontentofdatabusistheopcodeofaninstruction . Theread controlsignalismadehighbytimingandcontrolunitafteraspecifiedtime. Attherisingedgeof read control signals, the opcode is latched into microprocessor internal bus and placed in instruction register. The instruction-decoding unit, decodes the instructions and providesinformation to timing and controlunittotakefurtheractions.

INSTRUCTIONFORMATOF8085 The8085have74basicinstructionsand246totalinstructions . Theinstructionsetof8085is defined by the manufacturer Intel Corporation. Each instruction of 8085has 1byte opcode . With 8 bitbinarycode,wecangenerate256differentbinarycodes . Inthis,246codeshavebeenusedfor opcodes.

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Thesizeof8085instructionscanbe1byte,2bytesor3bytes. •

The1-byteinstructionhasanopcodealone.

•

The2bytesinstructionhasanopcodefollowedbyaneight -bitaddressordata.

•

The3bytesinstruc tionhasanopcodefollowedby16bitaddressordata . Whilestoringthe3 bytes instruction in memory, the sequence of storage is, opcode first followed by low byte of addressordataandthenhighbyteofaddressordata.

ADDRESSINGMODES Everyinstructionofaprogramhastooperateonadata . Themethodofspecifyingthedatatobe operated by the instruction is calledAddr ess ing .The 8085has the following 5different types of addressing. 1. ImmediateAddressing 2. DirectAddressing 3. RegisterAddressing 4. RegisterIndirectAddressing 5. ImpliedAddressing ImmediateAddressing Inimmediateaddressingmode,thedataisspecifiedintheinstructionitself . Thedatawillbeapart oftheprograminstruction . Allinstructionsthathave‘I’intheirmnemonicsareofImmediate addressingtype.

Eg . MVIB,3E H - Movethedata3EHgivenintheinstructiontoBregister.

DirectAddressing Indirectaddressingmode,theaddressofthedataisspecifiedintheinstruction. Thedatawillbein memory. Inthisaddressingmode,theprograminstructionsanddatacanbestoredindifferent memoryblocks . Thistypeofaddressingcanbeidentifiedby16-bitaddresspresentinthe instruction.

Eg . LDA1050H - Loadthedataavailableinmemorylocation1050Hinaccumulator.

RegisterAddressing Inregisteraddressingmode,theinstructionspecifiesthenameoftheregisterinwhichthedatais available. Thistypeofaddressingcanbeidentifiedbyregisternames (suchas‘A’,‘B’,…) inthe instruction.

Eg . MOVA,B -Movethecontentof BregistertoAregister.

RegisterIndirectAddressing Inregisterindirectaddressingmode,theinstructionspecifiesthenameoftheregisterinwhichthe addressofthedataisavailable. Herethedatawillbeinmemoryandtheaddresswillbeinthe registerpair. Thistypeofaddressingcanbeidentifiedbyletter‘M’presentintheinstruction.

Eg . MOVA,M - ThememorydataaddressedbyHLpairismovedtoAregister.

ImpliedAddressing In implied addressing mode, the instruction itself specifies the type of operation and location of data tobeoperated. Thistypeofinstructiondoesnothaveanyaddress,registername,immediatedata specifiedalongwithit.

Eg . CMA- Complementthecontentofaccumulator.

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