Design and Simulation Validation of a 245W Grid Connected PV Micro-Inverter System with Maximum Power Tracking A Project Report By
Chinmay Vaidya
1211377034
Soham Karyakarte
1211359536
Under the guidance of Dr. Raja Ayyanar
SCHOOL OF ELECTRICAL, COMPUTER AND ENEGY ENGINEEIRNG IRA A. FULTON SCHOOLS OF ENGINEERING ARIZONA STATE UNIVERSITY
Acknowledgement It gives us a great pleasure to express our deep sense of gratitude to our guide Dr. Raja Ayyanar for his valuable guidance, suggestions and co-operation in this project. We are thankful for his coherent encouragement and for providing the needed resources.
Chinmay Vaidya
1211377034
Soham Karyakarte
1211359536
Acknowledgement It gives us a great pleasure to express our deep sense of gratitude to our guide Dr. Raja Ayyanar for his valuable guidance, suggestions and co-operation in this project. We are thankful for his coherent encouragement and for providing the needed resources.
Chinmay Vaidya
1211377034
Soham Karyakarte
1211359536
Declaration I declare that this written submission represents my ideas in my own words and where others' ideas or words have been included, I have adequately cited and referenced the original sources. I also declare that I have adhered to all principles of academic honesty and integrity and have not misrepresented or fabricated or falsified any idea/data/fact/source in my submission. I understand that any violation of the above will be cause for disciplinary action by the Institute and can also evoke penal action from the sources which have thus not been properly cited or from whom proper permission permission has not been taken when when needed.
Chinmay Vaidya 1211377034
Date: 10/18/2016 Place: Tempe, AZ
Soham Karyakarte 1211359536
Contents 1.
Introduction ........................ ..................................... .......................... .......................... .......................... .......................... .................... ....... 3
2.
Solar PV Module ........................ ..................................... .......................... .......................... ......................... ......................... ............... 4 2.1.
Derivation of Circuit Model for TSM-245 PA05.08............................ 4
2.2.
Current-Voltage Current-Voltage and Power-Voltage Characteristics Characteristics at STC............ ........... . 6
3.
Selection of PV Micro-Inverter Micro-Inverter Model ......................... ...................................... .......................... ................ ... 8
4.
Designing of DC-DC Stage ......................... ...................................... .......................... .......................... ...................... ......... 9
5.
Designing of DC-AC Stage ....................................................................... 12
6.
Designing of Controllers ........................................................................... 14
7.
Simulation Results ......................... ...................................... .......................... .......................... .......................... .................... ....... 20
8.
Conclusion and Future Scope .................................................................. 45
1
List of Figures Figure 1:Equivalent Circuit of PV Module TSM-245 PA05.08 ................................................................... 5 Figure 2:Equivalent Circuit of PV Module TSM-245 PA05.08 with bypass diodes ................ ................. ... 5 Figure 3:Current-voltage characteristics at 1000 W/m^2, 800 W/m^2, 200 W/m^2 for all cells @ STC .... 6 Figure 4:Power-voltage 4:Power-volt age characteristics at 1000 W/m^2 , 800 W/m^2, 200 W/m^2 for all cells @ STC .... 6 Figure 5:Current-voltage characteristics at 500 W/m^2 for 20 cells, 800 W/m^2 for 20 cells, 200 W/m^2 for 20 cells @ STC ........................................................................................................................................ 7 Figure 6:Power-voltage characteristics at 500 W/m^2 for 20 cells, 800 W/m^2 for 20 cells, 200 W/m^2 for 20 cells @ STC ........................................................................................................................................ 7 Figure 7:Isolated Boost DC-DC Converter with HFT Isolation ................................................................. 11 Figure 8: DC-AC Inverter Stage ................................................................................................................. 13 Figure 9:Block diagram of Current Controller for DC-AC Stage ................................. ............... .................. .................. ............ 14 Figure 10: Implemented Current Controller of DC-AC Stage .................................................................... 14 Figure 11:Block diagram of PLL Basis (Reference .................................................................................... 15 Figure 12:Implemented PLL for DC-AC Stage .......................................................................................... 15 Figure 13: Block diagram of DC-Link Voltage Controller ......................................................................... ......................................................................... 16 Figure 14:Implemented DC-Link Voltage Controller ................................................................................. ................................................................................. 16 Figure 15:Actual Voltage Controller for DC-AC Stage ............................................................................. 17 Figure 16:Incremental Conductance MPPT algorithm Flowchart .............................................................. 18 Figure 17: MPPT block used in simulation ................................................................................................ 19 Figure 18: Complete Simulation Model ...................................................................................................... 20 Figure 19: Parameter Initialization ............................................................................................................. 21 Figure 20: TSM-245 PA05.08 circuit model at 50 deg. C .......................................................................... 23
Figure 21: TSM-245 PA05.08 I-V Characteristics at 50 deg. C ................................................................. 23 Figure 22: TSM-245 PA05.08 P-V Characteristics at 50 deg. C ................................................................ 24
List of Tables Table 1: Main technical parameters of ABB Micro-inverter MICRO-0.3-I-OUTD ................. ................. ... 8 Table 2: Summary of Parameters ............................................................................................................... 21
Table 3: Temperature Ratings of TSM-245 PA05.08 ................................................................................. 22 Table 4: PV Module Parameters at STC and at 50 deg. C .......................................................................... 22
2
1. Introduction A grid connected PV micro-inverter system with maximum power point tracking algorithm is designed for the rated power of 245W. PLECS has been used as a simulation software with RADAU (stiff) solver for analyzing different system operating scenarios. The total system is divided into four basic power stages- a PV module, DC-DC stage with high frequency transformer isolation, DC-AC stage and a power grid. A 245W TSM 245 PA05.08 of the Trina Solar is considered as PV module. The module is considered with bypass diodes per 20 cell and its equivalent circuit is derived from the datasheet. An ABB MICRO-0.3-I-OUTD micro-inverter model is selected for the micro-inverter stage consisting of DC-DC and DC-AC stage. Converter switches are designed for the maximum power output 300W while the inductors and capacitors involved in the converter are designed for the rated power output of 245W. The single phase AC grid is simulated as an ideal voltage source. The microinverter along with PV module is interfaced with the grid to simulate a complete micro-inverter system. The controllers for DC-AC and DC-DC stage are designed and implemented in S domain transfer functions. DC-DC stage controller involves PV output voltage controller with maximum power point tracking implemented based on incremental conductance algorithm. DC AC stage include DC link voltage controller, phase locked loop controller which keeps, inverter in synchronism with the grid and the grid current controller.
W/m
W/m 50C
The complete system is simulated for 1000 and 500 with cell junction temperature with step change in grid voltage from 1p.u. to 0.9 p.u. The reactive power support feature is tested by simulating the step change in output power from unity power factor to 0.8 lagging power factor. The MPPT algorithm with its performance is tested for the change in the irradiation intensity.
3
2. Solar PV Module 2.1. Derivation of Circuit Model for TSM-245 PA05.08 A PV module TSM-245 PA05.08 of Trina Solar Energy Systems is selected for the micro-inverter design. Data sheet for the same is attached in Annexure-I. In order to have a complete simulation of the system; an equivalent cell model is derived for the above module. Following are the steps for the extraction of P V Cell Parameters. a. Photon Current at STC (I ph) Ignoring the diode current and shunt resistance current, photon current at STC is same as the short circuit current. Hence, I ph = ISC = 8.68 A
b. Shunt resistance (R sh) From the datasheet, zooming in near the short circuit current region at full irradiance (8-9A and 0-10V region). Scaling factors are: 1A=0.21 inch, 10V=0.52 inch
dvdi | =tan0.54 × 0.121 × 0.1052 = 2.333 ×10− A/V Rsh= dvdi | = 2.333 1× 10 3 =. Ω
c. Slope of I-V characteristic at open circuit Scaling factors are: 1A=11.52 inch, 1V=5.164 inch at I-V characteristics at open circuit.
| at OC=tan100.1290× . × . = 0.39817
V/A
d. Determination of a, R s and I0 Following three equations are solved simultaneously in MATLAB.
Voc Isc Io = eRsh Imp=IscIo e+ × 1 VmpRsRsh ×Imp Rs= | at OC VT= − Voc=37.5V,Vmp=30. 2 V, I mp=8. 1 3A, N s=60cells, q =1. 6 ×10 , T =298K, k =1. 3 8×10− where
Where,
4
Above three equations are solved simultaneously in MATLAB and the values of obtained. The MATLAB script for the same is attached in Annexure-I.
,
are
Hence the values obtained are as follows:
=. × − = . Ω, a= 1.2688 ,
The equivalent circuit of the PV Module is obtained.
Figure 1:Equivalent Circuit of PV Module TSM-245 PA05.08
Let us consider that the PV module has bypass diode per 20 cells. (No information is provided in the data sheet. Hence assumed.) The equivalent circuit with bypass diodes is as follows.
Figure 2:Equivalent Circuit of PV Module TSM-245 PA05.08 with bypass diodes
5
2.2. Current-Voltage and Power-Voltage Characteristics at STC 1. Current-voltage characteristics at 1000
/ / / , 800
, 200
for all cells @ STC
Figure 3:Current-voltage characteristics at 1000 W/m^2, 800 W/m^2, 200 W/m^2 for all cells @ STC
2.
Power-voltage characteristics at 1000
/ / / , 800
, 200
for all cells @ STC
Figure 4:Power-voltage characteristics at 1000 W/m^2 , 800 W/m^2, 200 W/m^2 for all cells @ STC
6
3.
/
Current-voltage characteristics at 500 for 20 cell @ STC
/
for 20 cells, 800
/
for 20 cells, 200
Figure 5:Current-voltage characteristics at 500 W/m^2 for 20 cells, 800 W/m^2 for 20 cells, 200 W/m^2 for 20 cells @ STC
/
4. Power-voltage characteristics at 500 for 20 cell @ STC
/
for 20 cells, 800
/
for 20 cells, 200
Figure 6:Power-voltage characteristics at 500 W/m^2 for 20 cells, 800 W/m^2 for 20 cells, 200 W/m^2 for 20 cells @ STC
7
3. Selection of PV Micro-Inverter Model The PV module TSM-245 PA05.08 has peak power of 245W at STC. Hence the micro-inverter model of ABB manufacturer MICRO-0.3-I-OUTD having peak power capacity of 300W is selected. Main technical parameters of ABB Micro-inverter MICRO-0.3-I-OUTD
The data sheet for the selected ABB Micro-inverter is attached in the Annexure- II. The main technical parameters are listed in the table below. Table 1: Main technical parameters of ABB Micro-inverter MICRO-0.3-I-OUTD
BASIC DATA Nominal Output Power Rated Grid AC Voltage
300W 208 V (1ph / 2W)
INPUT SIDE (DC) Maximum PV Panel Rating (STC) Full Power MPPT Voltage Range Maximum Usable Current (Idcmax) Maximum SC Current
OUTPUT SIDE (AC) Adjustable Voltage Range Nominal Grid Frequency Adjustable Frequency Range Maximum Output Current Power Factor INPUT PROTECTION Reverse Polarity Protection Anti-islanding protection Over-voltage Protection Type EFFICIENCY Maximum efficiency CEC Efficiency SAFETY Isolation level
300W 30V-60V 10.5A 12.5A
183-228V (1ph / 2W) 60Hz 57-60.5 Hz 1.44A >0.95 Yes Meets UL 1741 / IEEE1547 requirements Varistor 96.5% 96% HF Transformer
The THD limitation is not specified in the data sheet. Hence a 3% of THD limitation is assumed complying to IEEE-519 while designing of filters.
8
4. Designing of DC-DC Stage The converter for DC-DC stage of the Micro-inverter is selected as an isolated-boost DC-DC converter with high frequency transformer isolation. The selected conve rter is capable of providing reactive power support to the grid. IGBTs are considered as the switching devices and switching signals are generated by selecting switching frequency of 20kHz.
fs =20kHz, Ts=5×10− sec.
a. Selection of Transformer Turns Ratio
Transformer turns ratio is selected to optimize the switch ratings of the isolated boost DC-DC stage. The maximum grid voltage supported by the inverter is 228V (RMS). Hence the minimum
√
DC link voltage has to be 228 2 = 322.44V. Considering the voltage drop across the output filter inductor, a DC link voltage of 400V is selected for the designing purpose.
V =400V Vin =60V
Maximum value of input DC voltage as per the ABB micro-inverter specification is 60V.
The switch rating can be optimized by selecting duty cycle (d) as small as possible. Considering practical limitations of the duty cycle generation, 10% of minimum duty cycle is considered for the designing purpose.
d =0.1 ) = 400 ×10. 1 n= VVi ×n(1d 60 =
Transformer turns ratio is calculated by following formula:
b. Selection of Input Inductor
Input current to the DC-DC converter should have minimum ripple content as possible (2-5% of maximum input current). A 3% of ripple is considered for the designing of the input inductor.
I in = VinPo = 24530 =8.166A ΔI =0.245A 9
Hence the inductor is
×× 1 × = 2
The worst case ripple will be observed at maximum output voltage of 400V and duty ratio of 0.5 Hence,
− 400 5×10 × 0. 5 × 10. 5 × = 6 0.245 2 =1.70068×10−
Standard inductor value available 1.8 mH. Hence a n inductor of 1.8mH is selected. The ESR value assumed is 0.01 Ohm obtained from the stand ard manufacturer’s datasheet. c. DC-DC Converter Switch Ratings
Switch voltage rating is the transformer primary voltage across High Frequency Transformer and the ripple.
ℎ= = 40020 6 = ℎ= 2 max = min = 30030 =10 =0.3 ℎ=10 0.23 =.
Switch current rating is the maximum primary current of the H igh Frequency Transformer.
Now,
When ripple is limited to 3%, Hence switch current rating is
d. Selection of DC Link Capacitor
DC link capacitor is selected based on the 120Hz voltage ripple. Maximum peak to peak ripple of 10% is selected for the designing purpose.
=10% ×=0.1×400=40 × = 4× = × × 2× × × = 2×400 245×377×20 = 40.6167 ×10− 10
µ
Standard capacitor available is of 47 . Hence 47 Being high value, its ESR value is neglected.
µ
capacitor is selected as DC-link capacitor.
e. Selection of Input Capacitor
Input capacitor for the converter is designed by considering the converter as a Buck-Converter. The input capacitor is selected based on the maximum permissible ripple in the PV output voltage and output PV current. The output PV voltage ripple of 2.5% is selected for the designing by considering the variation in the maximum output power with respect to the ripple in the PV output voltage. The output PV Voltage at MPPT from the PV cell model is 30.67V @ STC.
ΔVuu =2.5% ×30.67=0.7667V ΔI =0.245A ΔI × 8f1s = 0.70.6673 × 8×20×10 1 =1.9971 ×10− F C= ΔVuu
Ripple in the input current selected is of 3%. Hence, The input capacitor value is
The standard rating available is 2.2µF. The ESR value of the 2.2 µF capacitor is 0.02Ω from the standard manufacturers catalogues.
0. 7 625 = 0.245 =3.1122>
Hence the 2.2 µF capacitor is selected as input capacitor.
The isolated boost DC-DC Stage is implemented as shown below.
Figure 7:Isolated Boost DC-DC Converter with HFT Isolation
11
5. Designing of DC-AC Stage For the DC – AC stage a single phase inverter is considered. IGBTs are used as switches. Pulses are supplied to IGBT with a frequency of 20kHz. Single L filter is used as a filter for the microinverter. a. Design of L filter
For a given DC link voltage and varying modulation index (ma), the highest value THD is obtained at around ma=0.62. However, based on the maximum and minimum value of output ac voltage; the modulation index for the fixed value of dc link capacitor voltage (excluding designing ripple of 10%) varies in the range of 0.647 to 0.806. Hence the ma value selected for the filter calculation is 0.647 which is closer to the worst case ma value of 0.618. The fundamental output current is at the peak power output of the PV cell is calculated at the rated power of 245W as,
I = VP = 245208 =1.1778846A
Let us consider the current ripple to be limited to 3%. (THD limitation is not provided in the microinverter data sheet. Hence limited to 3% as per IEE519 specifications). Current ripple is given by
ΔI =THD×I =0.03× 1.1778846=0.035335A L= √ 112π × TΔIV ×m × 38π m 83 m π2
Filter inductor is calculated by
Considering,
Evaluating, we get
Tsw= 2f1 =2. 5 ×10−sec ΔI =0.035335 A Vd=400 V m =0.647 L= 17.353mH
The inductor value of 17.5 is chosen for the designing purpose. The internal resistance of the inductor is considered as 0.1Ω from standard manufacturers datasheet.
12
b. DC-AC Converter Switch Ratings
The rating of switches is decided by currents passing through them and voltage across them when they are off. When considering the micro-inverter maximum power of 300W interfaced with minimum grid voltage of 183Vrms, the current peak will determine the current rating of the switch.
300 − = = 183 =1.63934 − × 400×2. 5 ×10 − = 4 = 4×14. 2 ×10− = 0.176056 − =1.63934×√ 2 =1.63934×√ 2 0.088028=2.40641
Hence the switch current rating is 2.40641A.
The voltage rating of switch is governed by the dc link reference voltage. This voltage is enforced upon the switches along with the ripple when switches are in off state.
− =− − =40020=
The time delays of the switches (rise time, fall time etc.) must be sufficient so as to appropriately switch with a frequency of 20 kHz.
Figure 8: DC-AC Inverter Stage
13
6. Designing of Controllers A. Controllers for DC-AC Stage a. Current controller with AC voltage feed forward for inverter with L filter
A PI controller with AC grid voltage feed forward term is selected for the inner current control loop of the DC-AC stage. The grid voltage feed forward term is used to reduce the phase angle and amplitude disturbance in the grid current. The reference current magnitude is derived from the outer voltage control loop while the phase and frequency information is derived from the PLL loop.
Figure 9:Block diagram of Current Controller for DC-AC Stage (Courtesy: PSERC Academy)
The plan transfer function to be controlled is the current through the inductor filter multiplied by dc link voltage. Hence the plant transfer function is as follows:
= S×17. 5 ×10 400 − 0.1 G S= SLrl
A PI controller is designed using K-factor method. MATLAB program for the same is attached in Annexure- III. Controller Designing Parameters: Bandwidth of 2kHz is chosen so as to compensate for any ripple in the current over the large range. Phase margin of 60 is chosen for the controller design. Phase boost calculated is 60. Hence the controller is type-II controller. The controller transfer function is as follows:
Where,
Sω 1 G S=Kc× 1 ωS Kc=1852. 9, ω =3370.2, ω =46856
Figure 10: Implemented Current Controller of DC-AC Stage
14
b. Phase Locked Loop Controller
A phase locked loop controller is used to synchronize the inverter output with the Grid phase and frequency so as to have controlled energy exchange. The PLL loop designed is capable of satisfying IEEE-1547 requirements of voltage fluctuation less than 5% and out of phase synchronization. The phase locked loop architecture is considered as follows:
180
Figure 11:Block diagram of PLL Basis (Courtesy: PSERC Academy)
The phase detector considered here is a simple gain block which is considered as unity. The reference grid signal is reduced to unity by applying suitable gain. The loop filter is used to remove the pulsating component in the grid voltage from the desired dc component. A PI controller is used as the first order filter in the designing stage with the fairly low bandwidth of 6Hz to filter out the ripple content. Phase margin of 60 is chosen. The voltage controller oscillator is simply an integrator which generates the phase information which is then combined to generate sine or cosine signal of unity magnitude. Here the plant transfer function is a simple integrator as follows:
G S= 1
A PI controller is designed using K-factor method. MATLAB program for the same is attached in Annexure-III. Controller Designing Parameters: Bandwidth = 6 Hz, Phase margin =60. Phase boost calculated is 60. Hence the controller is type-II controller. The co ntroller transfer function is as follows:
Where,
Sω 1 G S=Kc× 1 ωS Kc=380.8156,ω =10.1014, ω =140.695
Figure 12:Implemented PLL for DC-AC Stage
15
c. DC-Link Voltage Controller
DC‐AC inverter stage regulates the dc link voltage and does this by providing the current reference of sinusoidal ac line current to the inner current control loop. The bandwidth of this dc link voltage loop is kept small so that it doesn’t distort the wave shape of the reference line current due to 120Hz ripple in the dc link voltage. Bandwidth of 12Hz is selected for the designing of the controller. Due to low bandwidth, the controller doesn’t respond to the 120Hz ripple content in the dc link voltage. By the energy balance equation at the DC link terminal:
C2 × dVdt =P Ig ×Vg 2
Hence the plant transfer function considering constant power input P is:
s Vg 228√2 V G S= ILs = SC = S × 47×10−
A PI controller is designed using K-factor method. MATLAB program for the same is attached in Annexure- III. Negative sign is implemented using subtract block in the simulation.
Figure 13: Block diagram of DC-Link Voltage Controller (Courtesy: PSERC Academy)
Controller Designing Parameters: Bandwidth = 12 Hz, Phase margin =60. Phase boost calculated is 60. Hence the controller is type-II controller. The controller transfer function is as follows:
Where,
Sω 1 G S=Kc× 1 ωS − Kc=2.4339×10 , ω =20.2029, ω =281.39
Figure 14:Implemented DC-Link Voltage Controller
16
B. Controllers for DC-DC Stage a. Controller for isolated boost dc-dc stage
The controller for the isolated boost DC-DC stage controls the input PV voltage command to follow the voltage reference generated by the MPPT algorithm so as to ensure the maximum power tracking. This controller is designed by considering the isolated boost DC -DC converter as a buck converter with DC-link being the input voltage and PV cell as an output voltage. The PV cell in the small signal analysis is modelled as a resistor at the MPP voltage and current. Hence its resistance is
R = VI = 30.8.123 =3.714 Ω C ESR ESR GS= 1RL VC E1S SRS LC1 R V = =66.66V , C =2.2 × 10− F, ESR=0.02Ω
The plant transfer function is the transfer function of the bu ck converter which is given b y
Where,
A PI controller is designed using K-factor method. MATLAB program for the same is attached in Annexure- III. Controller Designing Parameters: The bandwidth selected is 2kHz so that the controller should respond to the variations in the input MPP voltage. Phase margin of 45 is selected for the design purpose. Phase boost calculated is 40.938. Hence the controller is type-II controller. The controller transfer function is as follows:
Where,
Sω 1 G S=Kc× 1 ωS Kc=518.3851,ω =5663.4, ω =27883
Figure 15:Actual Voltage Controller for DC-AC Stage
17
b.
Maximum Power Point Tracking Controller
The MPPT controller is designed as per the incremental conductance MPPT algorithm. The incremental conductance algorithm flowchart is as follows.
Figure 16:Incremental Conductance MPPT algorithm Flowchart
We have used control blocks and switches to implement this in PLECS. As per the algorithm, initial values of voltage and current are assumed and set accordingly in memory blocks. (named as V(n-1) and I(n-1). At each iteration, the difference is calculated (dI, dV) and earlier values are replaced by present ones. Through division blocks, dI/dV and I/V is calculated. They are added to check the slope and then accordingly value is forwarded to another switch (switch2) that will allow this signal to pass to signum function only if dI, d V are non-zero. For changing irradiance conditions, whether dV=0 is checked and correspondingly switch (switch1) is set to check dI. The signal is passed to signum function through a switch that will allow its passage only if dV=0. Finally the value obtained through signum function is given as dVref only if dV, dI are non-zero (For which a final switch is implemented). In case of dV and dI zero, this final switch (switch3) will directly set dVref to zero thus allowing no change in the existing operating conditions.
18
Figure 17: MPPT block used in simulation
19
7. Simulation Results The complete system schematic is as follows:
Figure 18: Complete Simulation Model
There are different PLECS files for the different simulation cond itions. The above figure shows a basic simulation file for Case-I
20
All the simulation parameters are initialized as follows:
Figure 19: Parameter Initialization
Summary of all stages Table 2: Summary of Parameters
PV CELL MODEL Photon current
Reverse saturation current Series Resistance Shunt Resistance DC-DC STAGE Input Capacitor Input Inductor DC link capacitor DC-AC STAGE Inductor filter
8.782A at 50 deg. and 1000W/m^2 irradiation. This value is changed directly in proportion to the irradiation specified. 7.4421 A 0.156672 ohm. 241.11 ohm.
× 10−
2.2 µF, 0.02 ohm 1.8 mH, ESR 0.01 ohm 47 µF, ESR 0 ohm. 17.5mH, ESR 0.1 ohm
21
/
Case-I: Steady-state operation with uniform 1000 temperature of C, and grid at nominal conditions.
The cell junction temperature is this change in temperature from
5025
irradiation and cell junction
50C
C. Hence the PV cell circuit model is modified according to C(STC) to .
From the TSM-245 PA05.08 data sheet, the temperature ratings are as follows: Table 3: Temperature Ratings of TSM-245 PA05.08
The new value of short circuit current is calculated as
×10.047%×25 ×10.32%×25 , − 60×1. 2 688×1. 3 8×10 ×323 = q = =2.12083 1.6− 34. 5 8. 7 82 = ℎ = ..241. 11 =7.4421×10− = | =0.39817 .. =0.156672Ω = 8.782 A
I ph(new) = I Sc(old)
The new value of open circuit voltage is calculated as = 34.5 V
V oc(new) = V oc(old)
Let us assume that the ideality factor remains constant as that of at STC that is 1.2688, the new values of are calculated as follows:
Table 4: PV Module Parameters at STC and at 50 deg. C
Module Parameters Photon Current Open Circuit Voltage Reverse Saturation Current Ideality Factor Series Resistance Shunt Resistance
@ STC 8.68 A 37.5 V
4.0510×10− 1.2688 0.1727 Ω 241.11 Ω
22
7.4421×10− @ 8.782 A 34.5 V
A
C
1.2688 0.156672 Ω 241.11 Ω
A
Verification of the assumption of constant ideality factor:
25 W/m 0.32%/ × 10. 32%×25 = 225.4 W
With the new values cell parameters at C the maximum power at 1000 is reduced to 222.5 W. As per the data sheet for the PV cell, the power reduction co-efficient is C which gives the power of 245 . Thus the new parameters obtained for the PV Cell model are correct. The PV cell model with these new values is used in all the simulation results.
Figure 20: TSM-245 PA05.08 circuit model at 50 deg. C
Figure 21: TSM-245 PA05.08 I-V Characteristics at 50 deg. C
23
Figure 22: TSM-245 PA05.08 P-V Characteristics at 50 deg. C
From the above characteristics, it is clear that the maximum power obtained at 1000 222.5W and corresponding voltage is 27.7V and current is 8.025A.
24
W/m
is
1. PV Array Output Voltage/ DC Side capacitor voltage, its ripple and PV Array Output Current
Graph 1
From PV cell model simulation; the maximum power output at and at the output current of 8.025A.
50C
is at the voltage of 27.7V
The mean values obtained by complete system simulation are Vmp= 27.6784V and Imp=8.03432A. This shows that the MPPT algorithm is correctly tracking the maximum power point. The DC side capacitor is designed for the peak to peak ripple of 2.5%.
27. 8 13127. 5 225 %Peak to peak ripple = MaxMin ×100= Mean 27.6784 ×100=1.0499%
MPPT incremental conductance algorithm makes voltage reference to fluctuate about maximum power voltage. Hence there is a ripple observed in PV output voltage and current.
25
2. Output Voltage of DC-AC Stage
Graph 2
The output voltage of DC-AC stage oscillates between +415.8 to -415.8 which is same as the peak value of dc link voltage shown in 7. 3. Transformer Input Voltage and Current
Graph 3
26
Primary side current is the primary side inductor current switching at 20kHz with duty ratio dictated by input voltage controller. As inductor discharges during positive and negative off periods through HFT and hence a negative slope is observed in the current plot. HFT primary side voltage which is the dc link capacitor voltage reflected on primary side.
= =
= 66.667V
4. Inductor current of DC-DC stage and its Peak-Peak Ripple
Graph 4
The inductor is designed for the peak to peak ripple of 3% at constant DC link voltage of 400V and power of 245W. From the graph the peak to peak ripple is as follows:
8. 1 61237. 9 2807 %Peak to peak ripple = MaxMin ×100= Mean 8.04589 ×100=2.897877%
The DC side inductor ripple may go higher than the designed value due to the fact that the transformer primary side voltage which is the dc link voltage has 10% peak to peak ripple and the converter is operating at the reduced power of 222.5W.
27
5. PWM Voltage and Grid Current and THD in Line Current
Graph 5
The THD is designed as 3% at STC for the rated PV output of 245W considering constant dc link voltage of 400V. The THD increases with the decrease in the power output from the PV cell. With the junction temperature of , the power of the PV module is reduced to 222.5W. The dc link voltage in the system is designed with peak to peak ripple of 10% and henc e is no longer a constant value. Because of above two reasons the THD obtained at simulation is 3.50963% and is higher than that of the designed value at STC.
50C
However, the THD of 3% is obtained when the PV module at STC is simulated with the system.
28
6. Switching and average values of Inverter DC-link Current
Graph 6
The simulation condition is at unity power factor and hence the dc-link current is oscillating above zero axis. 7. Peak to Peak Ripple in DC link capacitor voltage
Graph 7
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The DC link capacitor is designed for the 10% peak to peak ripple. The obtained peak to peak ripple is as follows:
415. 6 08383. 8 36 %Peak to peak ripple= MaxMin ×100= Mean 399.911 ×100=7.94476% /
Case-II: Irradiation fixed to 1000
with step change 1 p.u. to 0.9 p.u.
1. PV Array Output Voltage and Current
Graph 8
The mean values obtained by complete system simulation are Vmp= 27.7289V and Imp=8.01975A. This shows that the MPPT algorithm is correctly tracking the maximum power point. The DC side capacitor is designed for the peak to peak ripple of 2.5%.
27. 9 19627. 5 334 %Peak to peak ripple= MaxMin ×100= Mean 27.7289 ×100=1.39277% 30
2. Output Voltage of DC-AC Stage
Graph 9
The DC-AC stage output voltage peak value is increased as it has to push higher grid current at 0.9p.u. voltage to maintain constant power of 222.5W. 3. Transformer Input Voltage and Current
Graph 10
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The transformer primary voltage and current is constant with the step change in output due to the fact that the DC link controller keeps the dc link voltage constant irrespective of any change in grid voltage. The value is same as explained in Case-I. 4. Inductor current of DC-DC stage with peak to peak ripple
Graph 11
The inductor is designed for the peak to peak ripple of 3% at constant DC link voltage of 400V and power of 245W. From the graph the peak to peak ripple is as follows:
8. 1 32487. 8 8848 %Peak to peak ripple = MaxMin ×100= Mean 8.01231 ×100=3.0453%
The DC side inductor ripple may go higher than the designed value due to the fact that the transformer primary side voltage which is the dc link voltage reflected on the primary side has 10% peak to peak ripple and also the converter is operating at the reduced power of 222.5W.
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5. PWM Voltage and Grid Current and THD in Line Current
Graph 12
The THD is designed as 3% at STC for the rated PV output of 245W considering constant dc link voltage of 400V. The THD increases with the decrease in the power output from the PV cell. With the junction temperature of , the power of the PV module is reduced to 222.5W. Also the dc link voltage in the system is designed with peak to peak ripple of 10% and is no longer a constant value. Because of above two reasons the THD obtained at simulation is 3.2538% and is higher than that of the designed value at STC.
50C
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6. Switching and average values of Inverter DC-link Current
Graph 13
The average value of the dc-link current remains constant as that in the Case-I due to the fact that the power delivered is constant in both cases. However, the peak of switching waveform increases as the grid current has increased (voltage dropped t o 0.9p.u.) because same current is passed to the grid through switches.
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7. Peak to Peak Ripple in DC link capacitor voltage
Graph 14
The DC link capacitor is designed for the 10% peak to peak ripple. The obtained peak to peak ripple is as follows:
417. 1 43383. 7 91 %Peak to peak ripple = MaxMin ×100= Mean 400.138 ×100=8.335124%
The average DC-link capacitor voltage remains constant due to dc-link voltage controller.
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/
Case-III: With fixed irradiation of 500 with step change in power factor command of unity to 0.8 lagging (the injected current should lag the grid voltage) while operating with MPPT.
The power factor is changed by giving delay in voltage signal in the PLL block. 1. PV Array Output Voltage/ DC Side capacitor voltage, its ripple and PV Array Output Current
Graph 15
The mean values obtained by complete system simulation are Vmp= 26.8351V and Imp=3.965A. This shows that the MPPT algorithm is correctly tracking the maximum power point. The irradiation is reduced by 50% which causes the maximum power current to reduce by 50% and maximum power voltage has very small reduction. The DC side capacitor is designed for the peak to peak ripple of 2.5%.
27. 0 47526. 6 291 %Peak to peak ripple= MaxMin ×100= Mean 26.8416 ×100=1.55877%
This increment in ripple from Case-I and II is because the output power has reduced to 50% of that at 1000W/m^2 irradiance and the capacitor is sized for the rated power of 245W.
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2. Output Voltage of DC-AC Stage
Graph 16
A small ripple is observed when there is a step change in power factor. The peak value is same as dc link voltage in 7. 3. Transformer Input Voltage and Current
Graph 17
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The transformer primary voltage is constant because the DC link controller keeps the dc link voltage constant irrespective of any change in irradiation o r grid power. DC link current is reduced almost to 50% because power output is reduced to 50%. A small ripple is observed when the step ch ange is applied in the power factor. 4. Inductor current of DC-DC stage with peak to peak ripple
Graph 18
The inductor is designed for the peak to peak ripple of 3% at constant DC link voltage of 400V and power of 245W. From the graph the peak to peak ripple is as follows:
4. 0 75773. 8 5502 %Peak to peak ripple = MaxMin ×100= Mean 3.96545 ×100=5.566833%
The DC side inductor ripple is higher than the designed value due to the fact that the transformer primary side voltage which is the dc link voltage reflected on the primary side has 10% peak to peak ripple and also the converter is operating at 50% of the rated power. A small ripple is observed when a step change in the power factor is applied.
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5. PWM Voltage and Grid Current and THD in Line Current
Graph 19
The THD is designed as 3% at STC for the rated PV output of 245W considering constant dc link voltage of 400V. The THD increases with the decrease in the power output from the PV cell. With the junction temperature of , the power of the PV module is reduced to 50% of rated power. Also the dc link voltage in the system is designed with peak to p eak ripple of 10% and is no longer a constant value. Because of above two reasons the THD obtained at simulation is 5.57583% and is almost 2 times that of the designed value at STC.
50C
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6. Switching and average values of Inverter DC-link Current
Graph 20
The negative peak in the inverter DC link current appears after the application of step change in the power factor. This because the converter is supplying reactive power once the power factor h as changed from 1 to 0.8. The average value is reduced and it goes below zero. 7. Peak Ripple in DC link capacitor voltage
Graph 21
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The DC link capacitor is designed for the 10% peak to peak ripple. The obtained peak to peak ripple is as follows:
409. 1 32385. 1 89 %Peak to peak ripple = MaxMin ×100= Mean 397.22 ×100=6.027642%
The peak to peak ripple has reduced as compared to Case-I, because less current is pushed into the grid due to less maximum power.
/ /
Case-IV: With nominal grid voltage and unity power factor operation, step change in irradiation from 1000 to 600 .
A MPPT algorithm is implemented as per the logic described in controller design stage. A step change in irradiation is applied at 0.5 sec. in the simulation by changing photon current of the PV Module. 1. PV Output Voltage and Current
Graph 22
A step change in irradiation has affected the PV current with the same proportion as that of the change in irradiation. The effect of change in irradiance on voltage at maximum power is negligible. The MPPT algorithm tracks the new MPP after change in irradiation and a small transient is introduced till the controller has tracked the new MPP.
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2. DC link Voltage
Graph 23
There is a transient introduced in the dc link voltage till the new MPP is tracked. The peak to peak ripple has reduced after step change because less current is pushed into the grid due to less maximum power.
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3. DC link Current (into inverter)
Graph 24
Due to reduced irradiance, less power is delivered to the grid and hence d c link current is reduced. 4. CCA values of PWM voltage
Graph 25
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5. Grid Current (along with current reference for comparison)
Graph 26
Controller is working appropriately as the reference current and actual current are coinciding in the graph.
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8. Conclusion and Future Scope
The micro inverter system is able to provide required active and reactive po wer to the grid. The variations of certain parameters from the ideal values can be because of multiple reasons (interaction of various controllers, changes in grid conditions, atmospheric conditions etc. as simulated). The controllers give an instant response and h ave a less settling time. The MPPT controller having implemented incremental conductance algorithm, works for the given cell conditions. System can be modified to build a standalone system with battery support. The MPPT algorithm can be modified to work with PV modules with partial shading.
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ANNEXURE-I PV Module TSM-PA05.08 Data Sheet
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Matlab Script for finding a, Rs and I0
syms rs del;isc=8.68;voc=37.5;vmp=30.2;imp=8.13; ns=60;dvdi=0.39817;q=1.6*10^-19; t=298;rsh=241.11;k=1.38*10^-23; del=1; a=1; while del~=0 io=(isc-(voc/rsh))/((exp((q*voc)/(ns*a*k*t)))); rs= dvdi-((ns*a*k*t/(isc*q))); del=isc-(io*(exp(q*(vmp+imp*rs)/(ns*a*k*t))-1))-((vmp+imp*rs)/rsh)-imp; if del>=0 a=a+0.00001; else del=0; end end isc a rs io Solution:
isc = 8.6800 a =1.2688 rs = 0.1727 io = 4.0510e-08
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ANNEXURE-II
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ANNEXURE-III Matlab Script for Current controller with AC voltage feed forward for inverter with L filter
% K-factor Controller %Let Phase margin=60, Bandwidth=2kHz, L=17.5*10^-3, rl=0.1 s=zpk(0,[], 1); wc=2*pi*2000; pm=60; rl=0.1; l=17.5*10^-3; j=sqrt(-1); p=j*wc; vd=400; Gplant=(vd/(p*l+rl)); phisystem=angle(Gplant)*180/pi; phiboost=(pm-90)-phisystem; k=tan(((phiboost*pi/180)/2)+pi/4); wz=wc/k wp=k*wc Gcpre=abs ((1+p/wz)/(1+p/wp))*(1/p); Golpre=Gcpre*Gplant; Kc=1/abs(Golpre) Gc=Kc*(1+s/wz)/(s*(1+s/wp)) Solution:
wz = 3.3702e+03 wp = 4.6856e+04 Kc = 1.8529e+03 Gc = 25760 (s+3370) -------------s (s+4.686e04) Continuous-time zero/pole/gain model.
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Matlab Script for Phase Locked Loop Controller
% K-factor Controller %Let Phase margin=60, Bandwidth=6Hz s=zpk(0,[], 1); wc=2*pi*6; pm=60; j=sqrt(-1); p=j*wc; Gplant=(1/(p)); phisystem=angle(Gplant)*180/pi; phiboost=(pm-90)-phisystem; k=tan(((phiboost*pi/180)/2)+pi/4); wz=wc/k wp=k*wc Gcpre=abs ((1+p/wz)/(1+p/wp))*(1/p); Golpre=Gcpre*Gplant; Kc=1/abs(Golpre) Gc=Kc*(1+s/wz)/(s*(1+s/wp)) Solution:
wz = 10.1014 wp = 140.6950 Kc = 380.8156 Gc = 5304.1 (s+10.1) --------------s (s+140.7) Continuous-time zero/pole/gain model.
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Matlab Script for DC-Link Voltage Controller
% K-factor Controller %Let Phase margin=60, Bandwidth=12Hz, Cdclink=47*10^-6 s=zpk(0,[], 1); wc=2*pi*12; pm=60; cdclink=47*10^-6; vg=294.156; j=sqrt(-1); p=j*wc; Gplant=(vg/(p*cdclink)); phisystem=angle(Gplant)*180/pi; phiboost=(pm-90)-phisystem; k=tan(((phiboost*pi/180)/2)+pi/4); wz=wc/k wp=k*wc Gcpre=abs ((1+p/wz)/(1+p/wp))*(1/p); Golpre=Gcpre*Gplant; Kc=1/abs(Golpre) Gc=Kc*(1+s/wz)/(s*(1+s/wp)) Solution:
wz = 20.2029 wp = 281.3900 Kc = 2.4339e-04 Gc = 0.0033899 (s+20.2) -----------------s (s+281.4) Continuous-time zero/pole/gain model.
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Matlab Script of controller for isolated boost dc-dc stage
% K-factor Controller %Let Phase margin=45, Bandwidth=2kHz, L= 1.8*10^-3, Co=2.2*e-6 s=zpk(0,[], 1); n=6; Vin=400/n; R_L=3.714; wc=2*pi*2000; pm=45; L=1.8*10^-3; Lr=10*10^-3; ESR=0.02; C0=2.2*10^-6; j=sqrt(-1); p=j*wc; Gplant=(Vin*(1+p*C0*ESR))/(1+p*((L/R_L)+ C0*ESR)+p*p*L*C0*(1+ESR/R_L)); phisystem=angle(Gplant)*180/pi; phiboost=(pm-90)-phisystem; k=tan(((phiboost*pi/180)/2)+pi/4); wz=wc/k wp=k*wc Gcpre=abs ((1+p/wz)/(1+p/wp))*(1/p); Golpre=Gcpre*Gplant; Kc=1/abs(Golpre) Gc=Kc*(1+s/wz)/(s*(1+s/wp)) Solution wz = 5.6634e+03 wp = 2.7883e+04 Kc = 518.3851
Gc = 2552.2 (s+5663) --------------s (s+2.788e04) Continuous-time zero/pole/gain model.
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