5
4
3
2
1
01
Chocolate DIS (14" / 15" / 17") Intel SKYLAKE ULT Platform Block Diagram
D
DDR3L SODIMM1 DDR3L Maxima 8GBs PAGE 17 DDR3L SODIMM2 DDR3L Maxima 8GBs PAGE 18 SATA0 - 1st HDD Package : 9.5 (mm) Power : PAGE 34
C
PCI-E Gen3 x 4 Lane
Power : 25 (Watt) Package : S3 Size : 23 x 23 (mm)
Processor : Daul Core Power : 15 (Watt) Package : BGA1356 Size : 40 X 24 (mm)
SATA0 6GB/s
LVDS (2CH) PAGE 27/27
RTD2136
Package : QFN-32 PAGE 22
eDP SATA1 3GB/s HDMI Conn PAGE 28
DP Port 1
HP
USB3.0 Port x 1
PAGE 31
Touch Pad PAGE 31
PAGE 33
USB2.0 Interface
Azalia
Keyboard
SM BUS
PAGE 2~16
Port 1
SPI Interface TPM PAGE 32 SLB9665TT2.0 FW 5 LPC Interface
G-Sensor H.P HP3DC2TR PAGE32
C
PAGE 27/27
USB3.0 Interface USB 3.0 Port 1,2,3(USB 2.0 Port 0,1,5)
B
D
PAGE 19~24
eDP X 2
SATA ODD Package : 12.7 (mm) Power : PAGE 34
System BIOS SPI ROM PAGE 10
LAYER 1 : TOP LAYER 2 : SGND LAYER 3 : IN1(High) LAYER 4 : IN2(Low) LAYER 5 : SVCC LAYER 6 : BOT
VRAM DDR3L x 4 (900 MHz) 256 x 16 x 4, 64 bit Max 4GBs PAGE 18 19
AMD MESO XT
SKYLAKE U Processor
PCB 6L STACK UP
Embedded Controller iTE 8987
Camera
Touch Screen
Port2
Port7 Elan EKTH3915 for 14",15" Elan EKTH3918 for 17"
PAGE 28 PCIE Gen 1 x 1 Lane
Audio Codec ALC3241
Card Reader RTS5237S-GRT
Power :
Power :
Power :
Package : LQPF128
Package : MQFN
Package : LQPF48
Size : 14 x 14 (mm) PAGE 35
Size : 6 x 6 (mm) PAGE 29
Size : 7 x 7 (mm) DB
PAGE 32
LAN Controller RTL8111HSH(Giga) RTL8107EH(10/100)
B
M2 Card Intel Rambo Peak WLAN / BT Combo Port6
Power : Package : OFN32 DB
PAGE 34
FAN
Speaker
PAGE 31 A
PAGE 29 A
Head Phone AMP HPA022642RTJR
Combo Jack
PAGE 29
PROJECT : X1A Quanta Computer Inc.
Digital MIC
Size
PAGE 28
NB5
Custom
Document Number
Date: Wednesday, May 13, 2015 5
4
www.vinafix.com
3
2
Rev 1A
Block Diagram 1
Sheet
1 of
49
5
4
3
[28] [28] [28] [28] [28] [28] [28] [28]
+3V [4,10,11,12,13,14,15,16,17,18,27,28,29,30,31,32,33,34,35,41,43] +1.0V [4,6,16,32,35,40] +VCCSTPLL [4,5,6,9,40,41] +VCCIO [6,16,40]
HDMI
IN_D2# IN_D2 IN_D1# IN_D1 IN_D0# IN_D0 IN_CLK# IN_CLK
C50 D50 C52 D52 A50 B50 D51 C51
D
DDPB_CTRLDATA/ GPP_E19 Display Port B Detected This signal has a weak internal pull-down. 0 = Port B is not detected. 1 = Port B is detected.
DDI1_TXN[0] DDI1_TXP[0] DDI1_TXN[1] DDI1_TXP[1] DDI1_TXN[2] DDI1_TXP[2] DDI1_TXN[3] DDI1_TXP[3]
EDP_TXN[0] EDP_TXP[0] EDP_TXN[1] EDP_TXP[1] EDP_TXN[2] EDP_TXP[2] EDP_TXN[3] EDP_TXP[3]
DDI2_TXN[0] DDI2_TXP[0] DDI2_TXN[1] DDI2_TXP[1] DDI2_TXN[2] DDI2_TXP[2] DDI2_TXN[3] DDI2_TXP[3]
DDI
EDP_AUXN EDP_AUXP
EDP
EDP_DISP_UTIL DDI1_AUXN DDI1_AUXP DDI2_AUXN DDI2_AUXP DDI3_AUXN DDI3_AUXP
Q DISPLAY SIDEBANDS
[28] [28]
L13 L12
SDVO_CLK SDVO_DATA
TP121 TP122
DDPC_CTRLDATA
N7 N8
DDPD_CTRLDATA
N11 N12
24.9/F_4 EDP_RCOMP E52
R96
+VCCIO
1
02
Need apply PN
?
SKL_ULT
U17A
E55 F55 E58 F58 F53 G53 F56 G56
IN_D2# IN_D2 IN_D1# IN_D1 IN_D0# IN_D0 IN_CLK# IN_CLK
2
GPP_E18/DDPB_CTRLCLK GPP_E19/DDPB_CTRLDATA
GPP_E13/DDPB_HPD0 GPP_E14/DDPC_HPD1 GPP_E15/DDPD_HPD2 GPP_E16/DDPE_HPD3 GPP_E17/EDP_HPD
GPP_E20/DDPC_CTRLCLK GPP_E21/DDPC_CTRLDATA GPP_E22/DDPD_CTRLCLK GPP_E23/DDPD_CTRLDATA
EDP_BKLTEN EDP_BKLTCTL EDP_VDDEN
EDP_RCOMP *SKL_ULT REV = 1
C47 C46 D46 C45 A45 B45 A47 B47
INT_EDP_TXN0 INT_EDP_TXP0 INT_EDP_TXN1 INT_EDP_TXP1
INT_EDP_TXN0 INT_EDP_TXP0 INT_EDP_TXN1 INT_EDP_TXP1
E45 F45
INT_EDP_AUXN INT_EDP_AUXP
INT_EDP_AUXN INT_EDP_AUXP
B52
EDP_DISP_UTIL
[27] [27] [27] [27]
Reserve EDP_HPD opposites circuit!
+3V [27] [27]
D
R90 *10K/F_4
TP46
G50 F50 E48 F48 G46 F46
ULT_EDP_HPD
R100 100K_4
L9 L7 L6 N9 L10
HDMI_HPD_CON
R12 R11 U13
PCH_LVDS_BLON PCH_DPST_PWM PCH_DISP_ON
ULT_EDP_HPD
HDMI_HPD_CON
ULT_EDP_HPD
[28]
[27,28]
PCH_LVDS_BLON PCH_DPST_PWM PCH_DISP_ON
[28] [27] [28]
1 OF 20 ?
eDP_COMPIO and ICOMPO signals should be shorted near balls and routed with typical impedance <25 mohms
1125 change R96 connection from +1.0V to +VCCIO 1222 del for DDP not use C
C
SKL_ULT
U17D TP45 [35,36,41]
H_PROCHOT#
R381
[35]
499/F_4 [35]
0114 Del TP39, Add R557 with 0ohm mount for 3D camera
+VCCSTPLL R405
*49.9/F_4
[16] [16]
*0_4/S
C55 D55 B54 C56
XDP_BPM0 XDP_BPM1
R557
3D_FW_GPIO
TP38 TP98 TP97
0423 change to shortpad R74
PM_THRMTRIP#
D63 A54 C65 C63 A65
CATERR# [33]
+1.0V
EC_PECI
CATERR# EC_PECI PROCHOT# PM_THRMTRIP#
R389
*51_4
JTAGX_PCH
R390
51_4
JTAG_TMS_PCH
R407
51_4
JTAG_TDI_PCH
R408
51_4
JTAG_TDO_PCH
R391
51_4
JTAG_TCK_PCH
R198 R191 R107 R101
B
49.9/F_4 49.9/F_4 49.9/F_4 49.9/F_4
*0_4 3D_FW_GPIO_R CPU_GP1 CPU_GP2 CPU_GP3
A6 A7 BA5 AY5
AT16 PROC_POPIRCOMP AU16 PCH_OPI_RCOMP EDRAM_OPIO_RCOMP H66 H65 EOPIO_RCOMP
?
Need apply PN Close to EC
CATERR# PECI PROCHOT# THERMTRIP# SKTOCC#
CPU MISC
BPM#[0] BPM#[1] BPM#[2] BPM#[3] GPP_E3/CPU_GP0 GPP_E7/CPU_GP1 GPP_B3/CPU_GP2 GPP_B4/CPU_GP3 PROC_POPIRCOMP PCH_OPIRCOMP OPCE_RCOMP OPC_RCOMP *SKL_ULT REV = 1
+VCCSTPLL
JTAG
PROC_TCK PROC_TDI PROC_TDO PROC_TMS PROC_TRST# PCH_JTAG_TCK PCH_JTAG_TDI PCH_JTAG_TDO PCH_JTAG_TMS PCH_TRST# JTAGX
B61 D60 A61 C60 B59
XDP_TCK0 XDP_TDI_CPU XDP_TDO_CPU XDP_TMS_CPU XDP_TRST#_CPU
B56 JTAG_TCK_PCH D59 JTAG_TDI_PCH A56 JTAG_TDO_PCH C59 JTAG_TMS_PCH C61 XDP_TRST#_CPU A59 JTAGX_PCH
PM_THRMTRIP# XDP_TCK0 [16] XDP_TDI_CPU [16] XDP_TDO_CPU [16] XDP_TMS_CPU [16] XDP_TRST#_CPU [2,16]
R404
1K_4
Processor pull-up (CPU) TO BE REPLACED WITH 1K OHMS FOR SKL . 470 OHM IS FOR I/P
JTAG_TCK_PCH [16] JTAG_TDI_PCH [16] JTAG_TDO_PCH [16] JTAG_TMS_PCH [16] XDP_TRST#_CPU [2,16] JTAGX_PCH [16] B
PLACE NEAR CPU
PDC
+1.0V
4 OF 20
Close to Chipset
XDP_TMS_CPU
R392
*51_4
XDP_TDI_CPU
R388
*51_4
XDP_TDO_CPU
R378
*51_4
1231 un-install R378, R392 +1.0V
H_PROCHOT#
R44
XDP_TCK0
R406
51_4
XDP_TRST#_CPU R384
51_4
1K_4
A
A
PROJECT : X1A Quanta Computer Inc.
NB5
Size
Document Number
Custom
02 -- SKYPAKE 1/20(eDP/DDI)
Date: Friday, May 22, 2015 5
4
3
2
Sheet 1
Rev 1A 2 of
49
5
[17] [17] [18] [18] [17] [18]
4
3
2
1
03
M_A_DQSN[7:0] M_A_DQSP[7:0] M_B_DQSN[7:0] M_B_DQSP[7:0] M_A_DQ[63:0] M_B_DQ[63:0]
+1.35VSUS
SkyLake ULT Processor (DDR3L)
[6,17,18,38,40]
D
D
U17B M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31
C
B
AL71 AL68 AN68 AN69 AL70 AL69 AN70 AN71 AR70 AR68 AU71 AU68 AR71 AR69 AU70 AU69 AF65 AF64 AK65 AK64 AF66 AF67 AK67 AK66 AF70 AF68 AH71 AH68 AF71 AF69 AH70 AH69 BB65 AW65 AW63 AY63 BA65 AY65 BA63 BB63 BA61 AW61 BB59 AW59 BB61 AY61 BA59 AY59 AT66 AU66 AP65 AN65 AN66 AP66 AT65 AU65 AT61 AU61 AP60 AN60 AN61 AP61 AT60 AU60
DDR0_DQ[0] DDR0_DQ[1] DDR0_DQ[2] DDR0_DQ[3] DDR0_DQ[4] DDR0_DQ[5] DDR0_DQ[6] DDR0_DQ[7] DDR0_DQ[8] DDR0_DQ[9] DDR0_DQ[10] DDR0_DQ[11] DDR0_DQ[12] DDR0_DQ[13] DDR0_DQ[14] DDR0_DQ[15] DDR1_DQ[0]/DDR0_DQ[16] DDR1_DQ[1]/DDR0_DQ[17] DDR1_DQ[2]/DDR0_DQ[18] DDR1_DQ[3]/DDR0_DQ[19] DDR1_DQ[4]/DDR0_DQ[20] DDR1_DQ[5]/DDR0_DQ[21] DDR1_DQ[6]/DDR0_DQ[22] DDR1_DQ[7]/DDR0_DQ[23] DDR1_DQ[8]/DDR0_DQ[24] DDR1_DQ[9]/DDR0_DQ[25] DDR1_DQ[10]/DDR0_DQ[26] DDR1_DQ[11]/DDR0_DQ[27] DDR1_DQ[12]/DDR0_DQ[28] DDR1_DQ[13]/DDR0_DQ[29] DDR1_DQ[14]/DDR0_DQ[30] DDR1_DQ[15]/DDR0_DQ[31] DDR0_DQ[16]/DDR0_DQ[32] DDR0_DQ[17]/DDR0_DQ[33] DDR0_DQ[18]/DDR0_DQ[34] DDR0_DQ[19]/DDR0_DQ[35] DDR0_DQ[20]/DDR0_DQ[36] DDR0_DQ[21]/DDR0_DQ[37] DDR0_DQ[22]/DDR0_DQ[38] DDR0_DQ[23]/DDR0_DQ[39] DDR0_DQ[24]/DDR0_DQ[40] DDR0_DQ[25]/DDR0_DQ[41] DDR0_DQ[26]/DDR0_DQ[42] DDR0_DQ[27]/DDR0_DQ[43] DDR0_DQ[28]/DDR0_DQ[44] DDR0_DQ[29]/DDR0_DQ[45] DDR0_DQ[30]/DDR0_DQ[46] DDR0_DQ[31]/DDR0_DQ[47] DDR1_DQ[16]/DDR0_DQ[48] DDR1_DQ[17]/DDR0_DQ[49] DDR1_DQ[18]/DDR0_DQ[50] DDR1_DQ[19]/DDR0_DQ[51] DDR1_DQ[20]/DDR0_DQ[52] DDR1_DQ[21]/DDR0_DQ[53] DDR1_DQ[22]/DDR0_DQ[54] DDR1_DQ[23]/DDR0_DQ[55] DDR1_DQ[24]/DDR0_DQ[56] DDR1_DQ[25]/DDR0_DQ[57] DDR1_DQ[26]/DDR0_DQ[58] DDR1_DQ[27]/DDR0_DQ[59] DDR1_DQ[28]/DDR0_DQ[60] DDR1_DQ[29]/DDR0_DQ[61] DDR1_DQ[30]/DDR0_DQ[62] DDR1_DQ[31]/DDR0_DQ[63]
SKL_ULT
?
Need apply PN DDR0_CKN[0] DDR0_CKP[0] DDR0_CKN[1] DDR0_CKP[1] DDR0_CKE[0] DDR0_CKE[1] DDR0_CKE[2] DDR0_CKE[3] DDR0_CS#[0] DDR0_CS#[1] DDR0_ODT[0] DDR0_ODT[1]
DDR0_MA[5]/DDR0_CAA[0]/DDR0_MA[5] DDR0_MA[9]/DDR0_CAA[1]/DDR0_MA[9] DDR0_MA[6]/DDR0_CAA[2]/DDR0_MA[6] DDR0_MA[8]/DDR0_CAA[3]/DDR0_MA[8] DDR0_MA[7]/DDR0_CAA[4]/DDR0_MA[7] DDR0_BA[2]/DDR0_CAA[5]/DDR0_BG[0] DDR0_MA[12]/DDR0_CAA[6]/DDR0_MA[12] DDR0_MA[11]/DDR0_CAA[7]/DDR0_MA[11] DDR0_MA[15]/DDR0_CAA[8]/DDR0_ACT# DDR0_MA[14]/DDR0_CAA[9]/DDR0_BG[1] DDR0_MA[13]/DDR0_CAB[0]/DDR0_MA[13] DDR0_CAS#/DDR0_CAB[1]/DDR0_MA[15] DDR0_WE#/DDR0_CAB[2]/DDR0_MA[14] DDR0_RAS#/DDR0_CAB[3]/DDR0_MA[16] DDR0_BA[0]/DDR0_CAB[4]/DDR0_BA[0] DDR0_MA[2]/DDR0_CAB[5]/DDR0_MA[2] DDR0_BA[1]/DDR0_CAB[6]/DDR0_BA[1] DDR0_MA[10]/DDR0_CAB[7]/DDR0_MA[10] DDR0_MA[1]/DDR0_CAB[8]/DDR0_MA[1] DDR0_MA[0]/DDR0_CAB[9]/DDR0_MA[0] DDR0_MA[3] DDR0_MA[4] DDR0_DQSN[0] DDR0_DQSP[0] DDR0_DQSN[1] DDR0_DQSP[1] DDR1_DQSN[0]/DDR0_DQSN[2] DDR1_DQSP[0]/DDR0_DQSP[2] DDR1_DQSN[1]/DDR0_DQSN[3] DDR1_DQSP[1]/DDR0_DQSP[3] DDR0_DQSN[2]/DDR0_DQSN[4] DDR0_DQSP[2]/DDR0_DQSP[4] DDR0_DQSN[3]/DDR0_DQSN[5] DDR0_DQSP[3]/DDR0_DQSP[5] DDR1_DQSN[2]/DDR0_DQSN[6] DDR1_DQSP[2]/DDR0_DQSP[6] DDR1_DQSN[3]/DDR0_DQSN[7] DDR1_DQSP[3]/DDR0_DQSP[7] DDR0_ALERT# DDR0_PAR
NIL-DDR CH A
DDR_VREF_CA DDR0_VREF_DQ DDR1_VREF_DQ DDR_VTT_CNTL
*SKL_ULT REV = 1
U17C
AU53 AT53 AU55 AT55
M_A_CLKN0 M_A_CLKP0 M_A_CLKN1 M_A_CLKP1
BA56 BB56 AW56 AY56
M_A_CKE0 M_A_CKE1
AU45 AU43 AT45 AT43
[17] [17] [17] [17] [17] [17]
M_A_CS#0 [17] M_A_CS#1 [17] M_A_DIM0_ODT0 M_A_DIM0_ODT1
BA51 M_A_A5 BB54 M_A_A9 BA52 M_A_A6 AY52 M_A_A8 AW52M_A_A7 AY55 M_A_BS#2 AW54M_A_A12 BA54 M_A_A11 BA55 M_A_A15 AY54 M_A_A14
M_A_A5 [17] M_A_A9 [17] M_A_A6 [17] M_A_A8 [17] M_A_A7 [17] M_A_BS#2 [17] M_A_A12 [17] M_A_A11 [17] M_A_A15 [17] M_A_A14 [17]
AU46 M_A_A13 AU48 AT46 AU50 AU52 AY51 M_A_A2 AT48 AT50 M_A_A10 BB50 M_A_A1 AY50 M_A_A0 BA50 M_A_A3 BB52 M_A_A4
M_A_A13 [17] M_A_CAS# [17] M_A_WE# [17] M_A_RAS# [17] M_A_BS#0 [17] M_A_A2 [17] M_A_BS#1 [17] M_A_A10 [17] M_A_A1 [17] M_A_A0 [17] M_A_A3 [17] M_A_A4 [17]
[17] [17]
AM70 M_A_DQSN0 AM69 M_A_DQSP0 AT69 M_A_DQSN1 AT70 M_A_DQSP1 AH66 M_B_DQSN0 AH65 M_B_DQSP0 AG69 M_B_DQSN1 AG70 M_B_DQSP1 BA64 M_A_DQSN2 AY64 M_A_DQSP2 AY60 M_A_DQSN3 BA60 M_A_DQSP3 AR66 M_B_DQSN2 AR65 M_B_DQSP2 AR61 M_B_DQSN3 AR60 M_B_DQSP3 AW50 AT52 DDR0_PAR
TP12
AY67 SM_VREF AY68 SMDDR_VREF_DQ0_M3 BA67 SMDDR_VREF_DQ1_M3
SM_VREF [17] SMDDR_VREF_DQ0_M3 SMDDR_VREF_DQ1_M3
AW67DDR_VTT_CNTL
DDR_VTT_CNTL
[17] [18]
20mils width
[4,18]
2 OF 20
M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63
AY39 AW39 AY37 AW37 BB39 BA39 BA37 BB37 AY35 AW35 AY33 AW33 BB35 BA35 BA33 BB33 AU40 AT40 AT37 AU37 AR40 AP40 AP37 AR37 AT33 AU33 AU30 AT30 AR33 AP33 AR30 AP30 AY31 AW31 AY29 AW29 BB31 BA31 BA29 BB29 AY27 AW27 AY25 AW25 BB27 BA27 BA25 BB25 AU27 AT27 AT25 AU25 AP27 AN27 AN25 AP25 AT22 AU22 AU21 AT21 AN22 AP22 AP21 AN21
DDR0_DQ[32]/DDR1_DQ[0] DDR0_DQ[33]/DDR1_DQ[1] DDR0_DQ[34]/DDR1_DQ[2] DDR0_DQ[35]/DDR1_DQ[3] DDR0_DQ[36]/DDR1_DQ[4] DDR0_DQ[37]/DDR1_DQ[5] DDR0_DQ[38]/DDR1_DQ[6] DDR0_DQ[39]/DDR1_DQ[7] DDR0_DQ[40]/DDR1_DQ[8] DDR0_DQ[41]/DDR1_DQ[9] DDR0_DQ[42]/DDR1_DQ[10] DDR0_DQ[43]/DDR1_DQ[11] DDR0_DQ[44]/DDR1_DQ[12] DDR0_DQ[45]/DDR1_DQ[13] DDR0_DQ[46]/DDR1_DQ[14] DDR0_DQ[47]/DDR1_DQ[15] DDR1_DQ[32]/DDR1_DQ[16] DDR1_DQ[33]/DDR1_DQ[17] DDR1_DQ[34]/DDR1_DQ[18] DDR1_DQ[35]/DDR1_DQ[19] DDR1_DQ[36]/DDR1_DQ[20] DDR1_DQ[37]/DDR1_DQ[21] DDR1_DQ[38]/DDR1_DQ[22] DDR1_DQ[39]/DDR1_DQ[23] DDR1_DQ[40]/DDR1_DQ[24] DDR1_DQ[41]/DDR1_DQ[25] DDR1_DQ[42]/DDR1_DQ[26] DDR1_DQ[43]/DDR1_DQ[27] DDR1_DQ[44]/DDR1_DQ[28] DDR1_DQ[45]/DDR1_DQ[29] DDR1_DQ[46]/DDR1_DQ[30] DDR1_DQ[47]/DDR1_DQ[31] DDR0_DQ[48]/DDR1_DQ[32] DDR0_DQ[49]/DDR1_DQ[33] DDR0_DQ[50]/DDR1_DQ[34] DDR0_DQ[51]/DDR1_DQ[35] DDR0_DQ[52]/DDR1_DQ[36] DDR0_DQ[53]/DDR1_DQ[37] DDR0_DQ[54]/DDR1_DQ[38] DDR0_DQ[55]/DDR1_DQ[39] DDR0_DQ[56]/DDR1_DQ[40] DDR0_DQ[57]/DDR1_DQ[41] DDR0_DQ[58]/DDR1_DQ[42] DDR0_DQ[59]/DDR1_DQ[43] DDR0_DQ[60]/DDR1_DQ[44] DDR0_DQ[61]/DDR1_DQ[45] DDR0_DQ[62]/DDR1_DQ[46] DDR0_DQ[63]/DDR1_DQ[47] DDR1_DQ[48] DDR1_DQ[49] DDR1_DQ[50] DDR1_DQ[51] DDR1_DQ[52] DDR1_DQ[53] DDR1_DQ[54] DDR1_DQ[55] DDR1_DQ[56] DDR1_DQ[57] DDR1_DQ[58] DDR1_DQ[59] DDR1_DQ[60] DDR1_DQ[61] DDR1_DQ[62] DDR1_DQ[63]
?
SKL_ULT
Need apply PN DDR1_CKN[0] DDR1_CKN[1] DDR1_CKP[0] DDR1_CKP[1] DDR1_CKE[0] DDR1_CKE[1] DDR1_CKE[2] DDR1_CKE[3] DDR1_CS#[0] DDR1_CS#[1] DDR1_ODT[0] DDR1_ODT[1]
DDR1_MA[5]/DDR1_CAA[0]/DDR1_MA[5] DDR1_MA[9]/DDR1_CAA[1]/DDR1_MA[9] DDR1_MA[6]/DDR1_CAA[2]/DDR1_MA[6] DDR1_MA[8]/DDR1_CAA[3]/DDR1_MA[8] DDR1_MA[7]/DDR1_CAA[4]/DDR1_MA[7] DDR1_BA[2]/DDR1_CAA[5]/DDR1_BG[0] DDR1_MA[12]/DDR1_CAA[6]/DDR1_MA[12] DDR1_MA[11]/DDR1_CAA[7]/DDR1_MA[11] DDR1_MA[15]/DDR1_CAA[8]/DDR1_ACT# DDR1_MA[14]/DDR1_CAA[9]/DDR1_BG[1] DDR1_MA[13]/DDR1_CAB[0]/DDR1_MA[13] DDR1_CAS#/DDR1_CAB[1]/DDR1_MA[15] DDR1_WE#/DDR1_CAB[2]/DDR1_MA[14] DDR1_RAS#/DDR1_CAB[3]/DDR1_MA[16] DDR1_BA[0]/DDR1_CAB[4]/DDR1_BA[0] DDR1_MA[2]/DDR1_CAB[5]/DDR1_MA[2] DDR1_BA[1]/DDR1_CAB[6]/DDR1_BA[1] DDR1_MA[10]/DDR1_CAB[7]/DDR1_MA[10] DDR1_MA[1]/DDR1_CAB[8]/DDR1_MA[1] DDR1_MA[0]/DDR1_CAB[9]/DDR1_MA[0] DDR1_MA[3] DDR1_MA[4] DDR0_DQSN[4]/DDR1_DQSN[0] DDR0_DQSP[4]/DDR1_DQSP[0] DDR0_DQSN[5]/DDR1_DQSN[1] DDR0_DQSP[5]/DDR1_DQSP[1] DDR1_DQSN[4]/DDR1_DQSN[2] DDR1_DQSP[4]/DDR1_DQSP[2] DDR1_DQSN[5]/DDR1_DQSN[3] DDR1_DQSP[5]/DDR1_DQSP[3] DDR0_DQSN[6]/DDR1_DQSN[4] DDR0_DQSP[6]/DDR1_DQSP[4] DDR0_DQSN[7]/DDR1_DQSN[5] DDR0_DQSP[7]/DDR1_DQSP[5] DDR1_DQSN[6] DDR1_DQSP[6] DDR1_DQSN[7] DDR1_DQSP[7] DDR1_ALERT# DDR1_PAR DRAM_RESET# DDR_RCOMP[0] DDR_RCOMP[1] DDR_RCOMP[2] NIL-DDR CH B
*SKL_ULT REV = 1
AN45 AN46 AP45 AP46
M_B_CLKN0 M_B_CLKN1 M_B_CLKP0 M_B_CLKP1
AN56 AP55 AN55 AP53
M_B_CKE0 M_B_CKE1
BB42 AY42 BA42 AW42
[18] [18] [18] [18] [18] [18]
M_B_CS#0 [18] M_B_CS#1 [18] M_B_DIM0_ODT0 M_B_DIM0_ODT1
AY48 M_B_A5 AP50 M_B_A9 BA48 M_B_A6 BB48 M_B_A8 AP48 M_B_A7 AP52 AN50 M_B_A12 AN48 M_B_A11 AN53 M_B_A15 AN52 M_B_A14
M_B_A5 [18] M_B_A9 [18] M_B_A6 [18] M_B_A8 [18] M_B_A7 [18] M_B_BS#2 [18] M_B_A12 [18] M_B_A11 [18] M_B_A15 [18] M_B_A14 [18]
BA43 M_B_A13 AY43 AY44 AW44 BB44 AY47 M_B_A2 BA44 AW46M_B_A10 AY46 M_B_A1 BA46 M_B_A0 BB46 M_B_A3 BA47 M_B_A4
M_B_A13 [18] M_B_CAS# [18] M_B_WE# [18] M_B_RAS# [18] M_B_BS#0 [18] M_B_A2 [18] M_B_BS#1 [18] M_B_A10 [18] M_B_A1 [18] M_B_A0 [18] M_B_A3 [18] M_B_A4 [18]
BA38 M_A_DQSN4 AY38 M_A_DQSP4 AY34 M_A_DQSN5 BA34 M_A_DQSP5 AT38 M_B_DQSN4 AR38 M_B_DQSP4 AT32 M_B_DQSN5 AR32 M_B_DQSP5 BA30 M_A_DQSN6 AY30 M_A_DQSP6 AY26 M_A_DQSN7 BA26 M_A_DQSP7 AR25 M_B_DQSN6 AR27 M_B_DQSP6 AR22 M_B_DQSN7 AR21 M_B_DQSP7
[18] [18]
C
+1.35VSUS B
R285 470/F_4
AN43 AP43 DDR1_PAR AT13 SM_DRAMRST# AR18 SM_RCOMP_0 R159 AT18 SM_RCOMP_1 R162 AU18 SM_RCOMP_2 R163
TP14 DDR3_DRAMRST#
121/F_4 80.6/F_4 100/F_4
[17,18]
PDC 3 OF 20
A
A
PROJECT : X1A Quanta Computer Inc.
NB5
Size
Document Number
Custom
04 -- SKYPAKE 3/20(DDR3-A I/F)
Date: Wednesday, May 13, 2015 5
4
3
2
1
Sheet
3 of
Rev 1A 49
5
4
3
2
04
[10,11,12,14,15,16,18] +3V_DEEP_SUS [2,10,11,12,13,14,15,16,17,18,27,28,29,30,31,32,33,34,35,41,43] +3V [10,15,16,32,34,35,37,39,40,43,44,46] +3VS5 [2,5,6,9,40,41] +VCCSTPLL [2,6,16,32,35,40] +1.0V SKL_ULT
U17K
?
Need apply PN
SYSTEM POWER MANAGEMENT
D
[16] [35]
PLTRST# SYS_RESET# RSMRST#
SYS_RESET#
RSMRST#
[16] SYS_PWROK [16,35] EC_PWROK SUSWARN# *0_4 [35]
A68 *10K_4 PROCPWRGD H_VCCST_PWRGD B65 C560 *0.1U/16V_4 B6 SYS_PWROK BA20 PCH_PWROK DSWROK_EC_R BB20
R196
0_4
SUSACK#_EC
AN10 B5 AY17
R394
EC26 *220P/50V_4
[35]
R199
SUSWARN#_EC
R192
*0_4/S SUSWARN# SUSACK#
0423 change to shortpad [30,34,35] [3,18]
1
PCIE_WAKE#
DDR_VTT_CNTL
AR13 AP11
BB15 AM15 AW 17 DDR_VTT_CNTL AT15 PCIE_WAKE# LAN_WAKE#
C GPP_B12/SLP_S0# GPD4/SLP_S3# GPD5/SLP_S4# GPD10/SLP_S5#
GPP_B13/PLTRST# SYS_RESET# RSMRST#
SLP_SUS# SLP_LAN# GPD9/SLP_W LAN# GPD6/SLP_A#
PROCPW RGD VCCST_PW RGD SYS_PW ROK PCH_PW ROK DSW _PW ROK
GPD3/PW RBTN# GPD1/ACPRESENT GPD0/BATLOW #
GPP_A13/SUSW ARN#/SUSPW RDNACK GPP_A15/SUSACK# GPP_A11/PME# INTRUDER#
W AKE# GPD2/LAN_W AKE# GPD11/LANPHYPC GPD7/RSVD
GPP_B11/EXT_PW R_GATE# GPP_B2/VRALERT#
PCH Pull-high/low(CLG) AT11 AP15 BA16 AY16
PCH_SLP_S0_N
AN15 AW 15 BB17 AN16
SLP_SUS#_EC
BA15 AY15 AU13
PCH_SLP_S0_N SUSB# [16,35] SUSC# [16,35] SLP_S5# [16] SLP_SUS#_EC
GPD9 DNBSWON# AC_PRESENT_EC RF_OFF_PCH
INTRUDER#_R
AM10 AM11
GPP_B2
+3V_DEEP_SUS [35]
TP105 SLP_A#
AU11 AP16
[16,35]
[16]
SUSWARN#
R193
10K_4
SUSACK#
R200
10K_4
RF_OFF_PCH
R187
10K_4
PCIE_WAKE#
R204
1K_4
AC_PRESENT_EC
R203
*10K_4
LAN_WAKE#
R591
*10K_4
SYS_RESET#
R415
10K_4
RSMRST#
R208
10K_4
DSWROK_EC
R224
100K/F_4
DNBSWON# [35] AC_PRESENT_EC [20,35] RF_OFF_PCH [34]
1M_4
R165
D
+3VS5
+3V_RTC
TP10 +3V
Need check circuit!!!! Should be delete
*SKL_ULT REV = 1
11 OF 20 ?
C
C
For DS3 Sequence
For HWPG, +1.0V and +VCCSTPLL Sequence +1.0V
For DS3 Non-DS3
-->Ra -->Rb
RSMRST#
R212
*0_4
R215
0_4
Rb
[35]
DSWROK_EC
+1.0V
+VCCSTPLL
DSWROK_EC_R R380 1K_4
R26 15K/F_4
+3VS5
R23 100K_4
R30 10K_4
R379 *1K_4
HWPG
3
Ra
1216 colayout +VCCSTPLL & +1.0V
+5VS5
2 RB500V-40
H_VCCST_PWRGD_R R395
PLTRST#(CLG) Check Q2010 Rise/Fall time less than 100ns PLTRST#
C543 *10P/50V_4
60.4/F_4
+1.0V_PWRGD_G2 2
H_VCCST_PWRGD
R395 close to CPU side H_VCCST_PWRGD trace 0.3" - 1.5"
+1.0V_PWRGD_G1
C32 0.1U/16V_4
[16,19,30,32,34,35]
Q5 2N7002K
R21 100K_4
2
Q6 METR3904-G
R16 100K_4
1
D12 1
3
HWPG
1
[16,35,37,38,39]
R14 100K/F_4
B
B
1110 Add Citcuit for +1.0V Power Good System PWR_OK(CLG) SYS_PWROK
R411
0_4 EC_PWROK
R412 10K/F_4
A
A
PROJECT : X1A Quanta Computer Inc.
NB5
Size
Document Number
Custom
06 -- SKYPAKE 5/20(Power Manger)
Date: Friday, May 22, 2015 5
4
3
2
Sheet 1
4 of
Rev 1A 49
5
4
3
[41] +VCC_CORE [2,4,6,16,32,35,40] +1.0V [6] +VCCSTG +VCCSTPLL
[2,4,6,9,40,41]
+VCC_CORE
Under U17
C59 C47 10U/6.3V_6 22U/6.3V_6
C52 22U/6.3V_6
C518 22U/6.3V_6
C517 C519 47U/6.3VS_8 22U/6.3V_6
C60 22U/6.3V_6
C524 22U/6.3V_6
D
C95 10U/6.3V_4
C193 10U/6.3V_4
C123 10U/6.3V_4
C180 10U/6.3V_4
C181 10U/6.3V_4
C121 10U/6.3V_4
C523 22U/6.3V_6
C63 22U/6.3V_6
C83 22U/6.3V_6
C70 22U/6.3V_6
C520 22U/6.3V_6
C55 22U/6.3V_6
C547 10U/6.3V_4
A30 A34 A39 A44 AK33 AK35 AK37 AK38 AK40 AL33 AL37 AL40 AM32 AM33 AM35 AM37 AM38 G30 K32 AK32 AB62 P62 V62 H63 G61 AC63 AE63 AE62 AG62
C
VCCEOPIO_SENSE VSSEOPIO_SENSE
TP13 TP8
AL63 AJ62
U17L
?
VCC_A30 VCC_A34 VCC_A39 VCC_A44 VCC_AK33 VCC_AK35 VCC_AK37 VCC_AK38 VCC_AK40 VCC_AL33 VCC_AL37 VCC_AL40 VCC_AM32 VCC_AM33 VCC_AM35 VCC_AM37 VCC_AM38 VCC_G30
33A
RSVD_K32
+VCC_CORE
VCC_G32 VCC_G33 VCC_G35 VCC_G37 VCC_G38 VCC_G40 VCC_G42 VCC_J30 VCC_J33 VCC_J37 VCC_J40 VCC_K33 VCC_K35 VCC_K37 VCC_K38 VCC_K40 VCC_K42 VCC_K43 VCC_SENSE VSS_SENSE
RSVD_AK32 VCCOPC_AB62 VCCOPC_P62 VCCOPC_V62
1
05
Need apply PN
CPU POWER 1 OF 4
VIDALERT# VIDSCK VIDSOUT VCCSTG_G20
G32 G33 G35 G37 G38 G40 G42 J30 J33 J37 J40 K33 K35 K37 K38 K40 K42 K43
Under U17
C566 1U/6.3V_4
C155 1U/6.3V_4
C567 1U/6.3V_4
C169 1U/6.3V_4
C529 1U/6.3V_4
C194 1U/6.3V_4
C162 1U/6.3V_4 D
100- ±1% pull-up to VCC near processor. C568 1U/6.3V_4
C133 1U/6.3V_4
C140 1U/6.3V_4
C147 1U/6.3V_4
R98
E32 E33
C195 1U/6.3V_4
C182 1U/6.3V_4
*100/F_4
G20
R99
C112 1U/6.3V_4
+VCC_CORE
VCC_SENSE VSS_SENSE
B63 H_CPU_SVIDALRT# A63 VR_SVID_CLK_R D64 H_CPU_SVIDDAT
C122 1U/6.3V_4
[41] [41]
*100/F_4
+VCCSTG
VCC_OPC_1P8_H63 VCC_OPC_1P8_G61 VCCOPC_SENSE VSSOPC_SENSE VCCEOPIO VCCEOPIO VCCEOPIO_SENSE VSSEOPIO_SENSE *SKL_ULT REV = 1
Close U17
SKL_ULT
2
C
PDC Layout note: need routing together and ALERT need between CLK and DATA.
12 OF 20 ?
+VCCSTPLL +VCC_CORE R385 56.2/F_4
CLOSE TO CPU PLACE THE PU RESISTORS C151 47U/6.3VS_8
C522 C521 C167 C135 C136 C166 C152 47U/6.3VS_8 47U/6.3VS_8 47U/6.3VS_8 47U/6.3VS_8 47U/6.3VS_8 47U/6.3VS_8 47U/6.3VS_8
H_CPU_SVIDALRT#
R398
220/F_4
VR_SVID_ALERT#
[41]
C534 *0.1U/16V_4
+VCC_CORE
C120 10U/6.3V_4
SVID ALERT
C87 10U/6.3V_4
C93 10U/6.3V_4
C113 10U/6.3V_4
C535 10U/6.3V_4
C538 10U/6.3V_4
C565 10U/6.3V_4
C562 10U/6.3V_4
+VCCSTPLL
B
B
R383 *54.9/F_4
PLACE THE PU RESISTORS CLOSE TO VR PULL UP IS IN THE VR MODULE VR_SVID_CLK_R
SVID CLK R403
*0_4/S
VR_SVID_CLK
[41]
0423 change to shortpad +VCCSTPLL
R397 100/F_4
CLOSE TO CPU PLACE THE PU RESISTORS H_CPU_SVIDDAT
SVID DATA R382
*0_4/S
VR_SVID_DATA
[41]
0423 change to shortpad
A
A
PROJECT : X1A Quanta Computer Inc.
NB5
Size
Document Number
Custom
07 -- SKYPAKE 6/20 (POWER-1)
Date: Wednesday, May 13, 2015 5
4
3
2
1
Sheet
Rev 1A 5 of
49
5
4
3
2
1
06
+VCCSTPLL [2,4,5,9,40,41] +VCCSA [41,42] +1.35VSUS [3,17,18,38,40] +1.0V_DEEP_SUS [9,13,15,16,39,40] +1.0V [2,4,16,32,35,40] +3VPCU [13,30,31,32,33,34,35,36,37] +VCCIO [2,16,40] +1.35VSUS
Under U17
U17N
SKL_ULT
?
Need apply PN
+VCCIO
Under U17
Close U17
CPU POWER 3 OF 4
D
C281 10U/6.3V_4
C297 10U/6.3V_4
C268 1U/6.3V_4
C271 1U/6.3V_4
C270 1U/6.3V_4
AU23 AU28 AU35 AU42 BB23 BB32 BB41 BB47 BB51
C258 1U/6.3V_4
Close U17
C260 10U/6.3V_4
C278 10U/6.3V_4
C269 10U/6.3V_4
AM40
C273 10U/6.3V_4 C200 *10U/6.3V_4
C196 1U/6.3V_4
A18
+VCCSTPLL
A22
+VCCSTG
AL23
+VCCPLL_OC +VCCSTPLL
Close U17 Under U17 R556
0_4
R75
*0_4
+1.0V
120mA +VCCPLL
K20 K21
VDDQ_AU23 VDDQ_AU28 2A VDDQ_AU35 VDDQ_AU42 VDDQ_BB23 VDDQ_BB32 VDDQ_BB41 VDDQ_BB47 VDDQ_BB51
4.5A
VCCST
0.12A
VCCSTG_A220.04A VCCPLL_OC VCCPLL_K200.12A VCCPLL_K21
VCCIO_SENSE VSSIO_SENSE VSSSA_SENSE VCCSA_SENSE
+VCCIO *0_4
VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA
VDDQC
+VCCSTG
R589
VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO
3.1A
E
0421 Add R588,R589 for Modern Stand By
*SKL_ULT REV = 1
AK28 AK30 AL30 AL42 AM28 AM30 AM42
C161 1U/6.3V_4
C188 1U/6.3V_4
C190 1U/6.3V_4
C154 10U/6.3V_4
C138 10U/6.3V_4
C145 10U/6.3V_4
C189 1U/6.3V_4
C178 1U/6.3V_4
C192 1U/6.3V_4
D
C168 1U/6.3V_4 +VCCSA
Under U17
AK23 AK25 G23 G25 G27 G28 J22 J23 J27 K23 K25 K27 K28 K30
C544 1U/6.3V_4
C530 1U/6.3V_4
C67 1U/6.3V_4
C532 1U/6.3V_4
C80 1U/6.3V_4
C94 1U/6.3V_4
C126 10U/6.3V_4
C108 10U/6.3V_4
C163 10U/6.3V_4
C179 10U/6.3V_4
C41 10U/6.3V_4
C91 10U/6.3V_4
C170 1U/6.3V_4
C107 10U/6.3V_4
C125 10U/6.3V_4
C542 10U/6.3V_4
C551 10U/6.3V_4
C558 10U/6.3V_4
C86 10U/6.3V_4
C536 10U/6.3V_4
Close U17 +VCCIO
AM23 AM22
VCCIO_VCCSENSE VCCIO_VSSSENSE
H21 H20
VSSSA_SENSE VCCSA_SENSE
14 OF 20
[41] [41]
VCCIO_VCCSENSE
R135
100/F_4
VCCIO_VSSSENSE
R186
100/F_4
C
C
+1.35VSUS
+VCCPLL_OC R168
0_6
+1.35V_VCCPLL_OC R588
*0_6
R67
*0_6/S
+VCCSTPLL
+VCCPLL
0423 change to shortpad
1226 Add thermistor circuit for CPU & DDR
IO Thrm Protect
Under U17 +VCCSTG
+VCCPLL_OC +3VPCU
C98 1U/6.3V_4
C230 1U/6.3V_4
+3VPCU
+3VPCU
For 65 degree, 1.8v limit, (SW)
For 65 degree, 1.8v limit, (SW)
For 65 degree, 1.8v limit, (SW)
R146 20K/F_4
R549 20K/F_4
R551 *20K/F_4
B
B
Close A18 Ball +VCCSTPLL
THRM_MOINTOR2 THER_CPU
2
R142 100K_4 NTC
[35]
C206 0.1U/16V_4
R550 100K_4 NTC
[35]
THRM_MOINTOR3 THER_DDR
C659 0.1U/16V_4
R552 *100K_4 NTC
[35]
2
THRM_MOINTOR1 THER_PIPE
2
*22U/6.3V_6
R552 close U12 For 75 degree, 1.2v limit, (HW)
1
C82
*1U/6.3V_4
1
C96
R550 close R44 For 75 degree, 1.2v limit, (HW)
C660 *0.1U/16V_4
1
For 75 degree, 1.2v limit, (HW)
Close U17 +VCCSTPLL
+VCCPLL +1.35VSUS
C69 1U/6.3V_4
Close U17
C134 1U/6.3V_4
A
A
C229 10U/6.3V_6
C240 10U/6.3V_6
C237 10U/6.3V_6
C255 10U/6.3V_6
C228 10U/6.3V_6
C238 10U/6.3V_6
C257 1U/6.3V_4
C289 1U/6.3V_4
C279 1U/6.3V_4
C305 1U/6.3V_4
PROJECT : X1A Quanta Computer Inc.
NB5
Size
Document Number
Custom
08 -- SKYPAKE 7/20 (POWER-2)
Date: Friday, May 22, 2015 5
4
3
2
Sheet 1
Rev 1A 6 of
49
5
4
+VCCGT
3
2
1
07
[41]
U17M
+VCCGT
C141 1U/6.3V_4
C160 1U/6.3V_4
?
Need apply PN +VCCGT
Close U17
CPU POWER 2 OF 4
Under U17
D
SKL_ULT
C76 10U/6.3V_4
C186 10U/6.3V_4
C118 10U/6.3V_4
C576 10U/6.3V_4
C117 10U/6.3V_4
C111 10U/6.3V_4
C142 10U/6.3V_4
C129 10U/6.3V_4
C159 10U/6.3V_4
C130 10U/6.3V_4
C114 1U/6.3V_4
C119 1U/6.3V_4
C578 1U/6.3V_4
C109 1U/6.3V_4
C110 1U/6.3V_4
C92 1U/6.3V_4
C85 1U/6.3V_4
C64 1U/6.3V_4
C563 1U/6.3V_4
C
[41] [41]
VCCGT_SENSE VSSGT_SENSE
C131 1U/6.3V_4
A48 A53 A58 A62 A66 AA63 AA64 AA66 AA67 AA69 AA70 AA71 AC64 AC65 AC66 AC67 AC68 AC69 AC70 AC71 J43 J45 J46 J48 J50 J52 J53 J55 J56 J58 J60 K48 K50 K52 K53 K55 K56 K58 K60 L62 L63 L64 L65 L66 L67 L68 L69 L70 L71 M62 N63 N64 N66 N67 N69 J70 J69
VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT
31A
VCCGT_SENSE VSSGT_SENSE *SKL_ULT REV = 1
VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGTX_AK42 VCCGTX_AK43 VCCGTX_AK45 VCCGTX_AK46 VCCGTX_AK48 VCCGTX_AK50 VCCGTX_AK52 VCCGTX_AK53 VCCGTX_AK55 VCCGTX_AK56 VCCGTX_AK58 VCCGTX_AK60 VCCGTX_AK70 VCCGTX_AL43 VCCGTX_AL46 VCCGTX_AL50 VCCGTX_AL53 VCCGTX_AL56 VCCGTX_AL60 VCCGTX_AM48 VCCGTX_AM50 VCCGTX_AM52 VCCGTX_AM53 VCCGTX_AM56 VCCGTX_AM58 VCCGTX_AU58 VCCGTX_AU63 VCCGTX_BB57 VCCGTX_BB66
PDC
VCCGTX_SENSE VSSGTX_SENSE
N70 N71 R63 R64 R65 R66 R67 R68 R69 R70 R71 T62 U65 U68 U71 W 63 W 64 W 65 W 66 W 67 W 68 W 69 W 70 W 71 Y62
C175 47U/6.3VS_8
C157 47U/6.3VS_8
C143 47U/6.3VS_8
C124 47U/6.3VS_8
C149 47U/6.3VS_8
C150 47U/6.3VS_8 D
C185 22U/6.3V_6
C183 22U/6.3V_6
C173 22U/6.3V_6
C172 22U/6.3V_6
C174 22U/6.3V_6
C156 22U/6.3V_6
C148 22U/6.3V_6
C127 22U/6.3V_6
C115 22U/6.3V_6
C184 22U/6.3V_6
C137 22U/6.3V_6
C165 22U/6.3V_6
AK42 AK43 AK45 AK46 AK48 AK50 AK52 AK53 AK55 AK56 AK58 AK60 AK70 AL43 AL46 AL50 AL53 AL56 AL60 AM48 AM50 AM52 AM53 AM56 AM58 AU58 AU63 BB57 BB66
C
AK62 AL61
13 OF 20
B
B
A
A
PROJECT : X1A Quanta Computer Inc.
NB5
Size
Document Number
Custom
09 -- SKYPAKE 8/20 (POWER-3)
Date: Wednesday, May 13, 2015 5
4
3
2
1
Sheet
Rev 1A 7 of
49
5
4
3
2
1
08 U17Q U17P D
U17R SKL_ULT
?
SKL_ULT
Need apply PN
C
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
*SKL_ULT REV = 1
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
SKL_ULT
Need apply PN ? D
GND 2 OF 3 GND 1 OF 3
A5 A67 A70 AA2 AA4 AA65 AA68 AB15 AB16 AB18 AB21 AB8 AD13 AD16 AD19 AD20 AD21 AD62 AD8 AE64 AE65 AE66 AE67 AE68 AE69 AF1 AF10 AF15 AF17 AF2 AF4 AF63 AG16 AG17 AG18 AG19 AG20 AG21 AG71 AH13 AH6 AH63 AH64 AH67 AJ15 AJ18 AJ20 AJ4 AK11 AK16 AK18 AK21 AK22 AK27 AK63 AK68 AK69 AK8 AL2 AL28 AL32 AL35 AL38 AL4 AL45 AL48 AL52 AL55 AL58 AL64
GND 3 OF 3
F8 G10 G22 G43 G45 G48 G5 G52 G55 G58 G6 G60 G63 G66 H15 H18 H71 J11 J13 J25 J28 J32 J35 J38 J42 J8 K16 K18 K22 K61 K63 K64 K65 K66 K67 K68 K70 K71 L11 L16 L17
Need apply PN ?
L18 L2 L20 L4 L8 N10 N13 N19 N21 N6 N65 N68 P17 P19 P20 P21 R13 R6 T15 T17 T18 T2 T21 T4 U10 U63 U64 U66 U67 U69 U70 V16 V17 V18 W 13 W6 W9 Y17 Y19 Y20 Y21
18 OF 20 ?
B
R
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
*SKL_ULT REV = 1
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
AT63 AT68 AT71 AU10 AU15 AU20 AU32 AU38 AV1 AV68 AV69 AV70 AV71 AW 10 AW 12 AW 14 AW 16 AW 18 AW 21 AW 23 AW 26 AW 28 AW 30 AW 32 AW 34 AW 36 AW 38 AW 41 AW 43 AW 45 AW 47 AW 49 AW 51 AW 53 AW 55 AW 57 AW 6 AW 60 AW 62 AW 64 AW 66 AW 8 AY66 B10 B14 B18 B22 B30 B34 B39 B44 B48 B53 B58 B62 B66 B71 BA1 BA10 BA14 BA18 BA2 BA23 BA28 BA32 BA36 F68 BA45
AL65 AL66 AM13 AM21 AM25 AM27 AM43 AM45 AM46 AM55 AM60 AM61 AM68 AM71 AM8 AN20 AN23 AN28 AN30 AN32 AN33 AN35 AN37 AN38 AN40 AN42 AN58 AN63 AP10 AP18 AP20 AP23 AP28 AP32 AP35 AP38 AP42 AP58 AP63 AP68 AP70 AR11 AR15 AR16 AR20 AR23 AR28 AR35 AR42 AR43 AR45 AR46 AR48 AR5 AR50 AR52 AR53 AR55 AR58 AR63 AR8 AT2 AT20 AT23 AT28 AT35 AT4 AT42 AT56 AT58
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
BA49 BA53 BA57 BA6 BA62 BA66 BA71 BB18 BB26 BB30 BB34 BB38 BB43 BB55 BB6 BB60 BB64 BB67 BB70 C1 C25 C5 D10 D11 D14 D18 D22 D25 D26 D30 D34 D39 D44 D45 D47 D48 D53 D58 D6 D62 D66 D69 E11 E15 E18 E21 E46 E50 E53 E56 E6 E65 E71 F1 F13 F2 F22 F23 F27 F28 F32 F33 F35 F37 F38 F4 F40 F42 BA41
C
B
PDC *SKL_ULT REV = 1
16 OF 20 ?
17 OF 20 ?
A
A
PROJECT : X1A Quanta Computer Inc.
NB5
Size
Document Number
Custom
10 -- SKYPAKE 9/20 (GND-1)
Date: Friday, May 22, 2015 5
4
3
2
Sheet 1
Rev 1A 8 of
49
5
4
3
2
1
09
+1.0V_DEEP_SUS [13,15,16,39,40] +1.8V_DEEP_SUS [15,39,46] +VCCSTPLL [2,4,5,6,40,41]
? SKL_ULT
U17S
CFG0-19 need Reserve TP [16] [16] [16] [16] [16] [16] [16] [16] [16] [16] [16] [16] [16] [16] [16] [16]
D
CFG0 CFG1 CFG2 CFG3 CFG4 CFG5 CFG6 CFG7 CFG8 CFG9 CFG10 CFG11 CFG12 CFG13 CFG14 CFG15
[16] [16]
CFG16 CFG17
[16] [16]
CFG18 CFG19
+1.0V_DEEP_SUS
CFG0 CFG1 CFG2 CFG3 CFG4 CFG5 CFG6 CFG7 CFG8 CFG9 CFG10 CFG11 CFG12 CFG13 CFG14 CFG15
E68 B67 D65 D67 E70 C68 D68 C67 F71 G69 F70 G68 H70 G71 H69 G70
CFG16 CFG17
E63 F63
CFG18 CFG19
E66 F66
49.9/F_4 CFG_RCOMP
R97 R72
E60 E8
*1K_4
AY2 AY1 D1 D3
C
Need apply PN
RESERVED SIGNALS-1
K46 K45 AL25 AL27 C71 B70 F60 A52 BA70 BA68 J71 J68 F65 G65 F61 E61
CFG[0] CFG[1] CFG[2] CFG[3] CFG[4] CFG[5] CFG[6] CFG[7] CFG[8] CFG[9] CFG[10] CFG[11] CFG[12] CFG[13] CFG[14] CFG[15]
RSVD_TP_BB68 RSVD_TP_BB69 RSVD_TP_AK13 RSVD_TP_AK12 RSVD_BB2 RSVD_BA3 TP5 TP6 RSVD_D5 RSVD_D4 RSVD_B2 RSVD_C2
CFG[16] CFG[17]
RSVD_B3 RSVD_A3
CFG[18] CFG[19]
RSVD_AW 1 CFG_RCOMP RSVD_E1 RSVD_E2
ITP_PMODE RSVD_AY2 RSVD_AY1
RSVD_BA4 RSVD_BB4
RSVD_D1 RSVD_D3
RSVD_A4 RSVD_C4
RSVD_K46 RSVD_K45
TP4 RSVD_A69 RSVD_B69
RSVD_AL25 RSVD_AL27
RSVD_AY3 RSVD_C71 RSVD_B70
RSVD_D71 RSVD_C70
RSVD_F60 RSVD_C54 RSVD_D54
RSVD_A52 RSVD_TP_BA70 RSVD_TP_BA68
TP1 TP2
RSVD_J71 RSVD_J68
VSS_AY71 ZVM#
VSS_F65 VSS_G65
RSVD_TP_AW 71 RSVD_TP_AW 70
RSVD_F61 RSVD_E61
MSM# PROC_SELECT#
BB68 BB69
*SKL_ULT REV = 1
Processor Strapping
U17T
1226 Add R548, C658 for Cannonlake-U reserved
AU5 AT5 D5 D4 B2 C2
R548
+1.8V_DEEP_SUS
*0_4
B3 A3
SKL_ULT
?
SPARE
AW 69 AW 68 AU56 AW 48 C7 U12 U11 H11
RSVD_AW 69 RSVD_AW 68 RSVD_AU56 RSVD_AW 48 RSVD_C7 RSVD_U12 RSVD_U11 RSVD_H11
RSVD_F6 RSVD_E3 RSVD_C11 RSVD_B11 RSVD_A11 RSVD_D12 RSVD_C12 RSVD_F52
F6 E3 C11 B11 A11 D12 C12 F52
C658 *1U/6.3V_4 *SKL_ULT REV = 1
AW 1
20 OF 20 ?
E1 E2 BA4 BB4 A4 C4
C
BB5 A69 B69 AY3
R457
*0_4/S
D71 C70 C54 D54
0423 change to shortpad
AY4 BB3 AY71 AR56
R491
*0_4/S
AW 71 AW 70 AP56 C64
19 OF 20 ?
R396
*100K_4
+VCCSTPLL
1222 Cannonlake-U stuff, Skylake-U un-stuff B
The CFG signals have a default value of '1' if not terminated on the board.
1 CFG3 (Physcial Debug Enable) DFX Privacy CFG4 (DP Presence Strap)
Need apply PN
BB2 BA3
PDC B
D
AK13 AK12
0
Circuit
Disable:
Enable: Set DFX Enable in DFX interface MSR
CFG3
Disable; No physical DP attached to eDP
Enable; An ext DP device is connected to eDP
CFG4
R387
*1K_4
R427
1K_4
A
A
PROJECT : X1A Quanta Computer Inc.
NB5
Size
Document Number
Custom
13 -- SKYPAKE 12/20 (RSV-1)
Date: Wednesday, May 13, 2015 5
4
3
2
1
Sheet
Rev 1A 9 of
49
5
4
3
2
1
10
+3V_DEEP_SUS [4,11,12,14,15,16,18] +3V [2,4,11,12,13,14,15,16,17,18,27,28,29,30,31,32,33,34,35,41,43] +3VS5 [4,15,16,32,34,35,37,39,40,43,44,46]
?
SKL_ULT
U17E
Need apply PN
SPI - FLASH
AV2 AW3 AV3 AW2 AU4 AU3 AU2 AU1
PCH_SPI1_CLK PCH_SPI1_SO PCH_SPI1_SI PCH_SPI_IO2 PCH_SPI_IO3 PCH_SPI_CS0#
D
SMBUS, SMLINK
SPI0_CLK SPI0_MISO SPI0_MOSI SPI0_IO2 SPI0_IO3 SPI0_CS0# SPI0_CS1# SPI0_CS2#
GPP_C0/SMBCLK GPP_C1/SMBDATA GPP_C2/SMBALERT# GPP_C3/SML0CLK GPP_C4/SML0DATA GPP_C5/SML0ALERT# GPP_C6/SML1CLK GPP_C7/SML1DATA GPP_B23/SML1ALERT#/PCHHOT#
SPI - TOUCH
TP54 [35] [35]
M2 M3 J4 V1 V2 M1
SPI1_CLK SIO_EXT_SMI# PCI_SERR# SPI1_IO2 SPI1_IO3 SPI1_CS#
SIO_EXT_SMI# PCI_SERR# TP66 TP65 TP51
GPP_D1/SPI1_CLK GPP_D2/SPI1_MISO GPP_D3/SPI1_MOSI GPP_D21/SPI1_IO2 GPP_D22/SPI1_IO3 GPP_D0/SPI1_CS#
[35] [32,35]
AW13
EC_RCIN#
AY11
SERIRQ
SMB_PCH_CLK SMB_PCH_DAT SML0ALERT#
R9 W2 W1
SMB_ME0_CLK SMB_ME0_DAT SML1ALERT#
D
W3 SMB_ME1_CLK V3 SMB_ME1_DAT AM7 GPP_B23
SML0ALERT#
[11]
SML1ALERT#
[11]
TP19
D LPC
GPP_A1/LAD0/ESPI_IO0 GPP_A2/LAD1/ESPI_IO1 GPP_A3/LAD2/ESPI_IO2 GPP_A4/LAD3/ESPI_IO3 GPP_A5/LFRAME#/ESPI_CS# GPP_A14/SUS_STAT#/ESPI_RESET#
C LINK
G3 G2 G1
R7 R8 R10
CL_CLK CL_DATA CL_RST# GPP_A0/RCIN#
PDC
GPP_A6/SERIRQ
GPP_A9/CLKOUT_LPC0/ESPI_CLK GPP_A10/CLKOUT_LPC1 GPP_A8/CLKRUN#
AY13 BA13 BB13 AY12 BA12 BA11
LAD0 [32,34,35] LAD1 [32,34,35] LAD2 [32,34,35] LAD3 [32,34,35] LFRAME# [32,34,35]
AW9 CLK_PCI_EC_R AY9 CLK_PCI_LPC_R AW11CLKRUN#
EC25 R171 R166
CLKRUN#
18P/50V_4
22/F_4 22/F_4
CLK_24M_KBC [35] CLK_24M_DEBUG [34]
[35] EC21
5 OF 20
*SKL_ULT REV = 1
R170
*22/F_4
18P/50V_4
EMI(near PCH)
CLK_PCI_TPM
[32]
? EC22 *18P/50V_4
EMI(near PCH)
C
C
PCH SPI ROM(CLG)
GPIO Pull UP +3V
+3V_DEEP_SUS SMB_PCH_CLK
R91
2.2K_4
Vender
Size
P/N
SERIRQ
R210
10K_4
SMB_PCH_DAT
R88
2.2K_4
EON
8MB
AKE3EZN0Q01 (EN25QH64-104HIP)
CLKRUN#
R513
8.2K_4
SMB_ME0_CLK
R103
499/F_4
Winbond
8MB
AKE3EFP0N07 (W25Q64FVSSIQ)
SIO_EXT_SMI#
R431
10K_4
SMB_ME0_DAT
R442
499/F_4
GigaDevice
8MB
AKE3EGN0Q01 (GD25B64BSIGR)
EC_RCIN#
R512
10K_4
SMB_ME1_CLK
R439
1K_4
PCI_SERR#
R430
10K_4
SMB_ME1_DAT
R436
1K_4
Socket
DFHS08FS023
4M SPI ROM Socket
U16 [35] [35] [35] [35]
PCH_SPI_CS0#_R PCH_SPI1_CLK_R PCH_SPI1_SI_R PCH_SPI1_SO_R
B
PCH_SPI_CS0#_R PCH_SPI1_CLK_R PCH_SPI1_SI_R PCH_SPI1_SO_R
1 6 5 2
BIOS_WP#
3
CE# SCK SI SO
VDD HOLD#
WP#
VSS
8
+3VSPI
7
HOLD# B
4
A25LQ32AM-F/Q AKE3EFP0N07 91960-0084L-8P-SOCKET
TP66-71 need place to TOP
U15&U16 footprint 要要要
PCH_SPI_CS0#_R PCH_SPI1_CLK_R PCH_SPI1_SI_R PCH_SPI1_SO_R BIOS_WP# HOLD#
TP43 TP78 TP75 TP44 TP40 TP67
PCH SPI ROM(CLG)
SMBus/Pull-up(CLG) +3V
R401/R402/R410/R438/R443/R444 close to U15 pin PCH_SPI_CS0# PCH_SPI1_CLK PCH_SPI1_SI PCH_SPI1_SO
5 4
MBCLK2
3
SMB_ME1_CLK
2 [18,27,35]
1
MBDATA2
R451
*0_4
R452
0_4
U15
Q34
[18,27,35]
+3VS5 +3V_DEEP_SUS
6
SMB_ME1_DAT
CPU heat pipe local thermal sensor DDR thermal sensor RTD2136 EC
R401 R444 R438 R402
15/F_4 15/F_4 15/F_4 15/F_4
PCH_SPI_CS0#_R PCH_SPI1_CLK_R PCH_SPI1_SI_R PCH_SPI1_SO_R
1 6 5 2 3
C577 22P/50V_4 C580
1U/10V_4
+3VSPI
R409
1K_4
PCH_SPI_IO2
R410
15/F_4
CE# SCK SI SO WP#
VDD
8
+3VSPI
7
HOLD#
R437 HOLD# VSS
1K_4
R443
15/F_4
PCH_SPI_IO3
4
*GD25B64BSIGR AKE3EFP0N07
C583 0.1U/16V_4
*2N7002KDW A
+3V
A
BIOS_WP#
Q11 +3V [16,17,18,27,31]
SMB_RUN_DAT
[16,17,18,27,31]
SMB_RUN_CLK
+3V
R89
5
4.7K_4 4
R87
3
1222 change R409,R437 from 3.3K 1% to 1K 5% SMB_PCH_DAT
2
4.7K_4 1
6
Touch Pad XDP DDR3-L
PROJECT : X1A Quanta Computer Inc.
SMB_PCH_CLK
2N7002KDW
NB5
Size
Document Number
Custom
15 -- SKYPAKE 14/20(SPI/LPC/SMBUS)
Date: Friday, May 22, 2015 5
4
3
2
Sheet 1
10 of
Rev 1A 49
5
4
3
2
1
11 Functional Strap Definitions
D
D
DESIGN NOTE: WEAK PULL UP RESISTOR PRESENT ON THIS NET +3V_DEEP_SUS [14,29]
ACZ_SPKR
ACZ_SPKR
R458 *20K/F_4
TOP SWAP OVERRIDE HIGH - TOP SWAP ENABLE LOW-DISABLED HIGH: LPC SELECTED FOR SYSTEM FLASH WEAK INTERNAL PD
R492 *4.7K_4
[14]
[35]
ACZ_SDOUT
ACZ_SDOUT
GPIO33_EC
R219
1K_4
No Boot: The signal has a weak internal pull-down. 0 = Enable security measures defined in the Flash Descriptor. 1 = Disable Flash Descriptor Security (override). This strap should only be asserted high using external pull-up in manufacturing/debug environments ONLY. This function is useful when running ITP/XDP.
ACZ_SDOUT
+3V_DEEP_SUS
C
R95 1K_4
[10]
SML0ALERT#
SML0ALERT#
C
No Boot: The signal has a weak internal pull-down. 0 = Disable Intel ME Crypto Transport Layer Security (TLS) cipher suite (no confidentiality). 1 = Enable Intel ME Crypto Transport Layer Security (TLS) cipher suite (with confidentiality). Must be pulled up to support Intel AMT with TLS and Intel SBA (Small Business Advantage) with TLS.
+3V
R144 *4.7K_4
[14]
R94 *20K/F_4
GPP_B18
No Boot: The signal has a weak internal pull-down. 0 = Disable No Reboot mode. 1 = Enable No Reboot mode (PCH will disable the TCO Timer system reboot feature). This function is useful when running ITP/XDP.
GPP_B18
R143 10K_4
+3V_DEEP_SUS
B
[14]
GSPI1_MOSI
GSPI1_MOSI
R140 *20K/F_4
No Boot: The signal has a weak internal pull-down. 0 = LPC Is selected for EC. 1 = eSPI Is selected for EC.
B
R441 *10K_4
No Boot: The signal has a weak internal pull-down. This field determines the destination of accesses to the BIOS memory range. Also controllable using Boot BIOS Destination bit (Chipset Configuration Registers: Offset 3410h:Bit 10). This strap is used in conjunction with Boot BIOS Destination Selection 0 strap. Bit 10 Boot BIOS Destination 0 SPI 1 LPC
[10]
SML1ALERT#
SML1ALERT#
R440 20K/F_4
A
A
PROJECT : X1A Quanta Computer Inc.
NB5
Size
Document Number
Custom
16 -- SKYPAKE 15/20(HDA)
Date: Wednesday, May 13, 2015 5
4
3
2
1
Sheet
Rev 1A 11of
49
5
4
3
+3V [2,4,10,11,13,14,15,16,17,18,27,28,29,30,31,32,33,34,35,41,43] +3V_DEEP_SUS [4,10,11,14,15,16,18] SKL_ULT
U17H
PEG_RXN0 PEG_RXP0 PEG_TXN0 PEG_TXP0
C574 C573
0.22U/10V_4 0.22U/10V_4
H13 G13 PEG_TXN0_C B17 PEG_TXP0_C A17
[19] [19] [19] [19]
PEG_RXN1 PEG_RXP1 PEG_TXN1 PEG_TXP1
C557 C556
0.22U/10V_4 0.22U/10V_4
G11 F11 PEG_TXN1_C D16 PEG_TXP1_C C16
[19] [19] [19] [19]
PEG_RXN2 PEG_RXP2 PEG_TXN2 PEG_TXP2
0.22U/10V_4 0.22U/10V_4
H16 G16 PEG_TXN2_C D17 PEG_TXP2_C C17
[19] [19] [19] [19]
PEG_RXN3 PEG_RXP3 PEG_TXN3 PEG_TXP3
C552 C553
0.22U/10V_4 0.22U/10V_4
G15 F15 PEG_TXN3_C B19 PEG_TXP3_C A19
[30] [30] [30] [30]
PCIE_RXN5_CARD PCIE_RXP5_CARD PCIE_TXN5_CARD PCIE_TXP5_CARD
C571 C572
F16 E16 0.1U/16V_4 PCIE_TXN5_CARD_C C19 0.1U/16V_4 PCIE_TXP5_CARD_C D19
WLAN
[34] [34] [34] [34]
PCIE_RXN6_WLAN PCIE_RXP6_WLAN PCIE_TXN6_WLAN PCIE_TXP6_WLAN
C569 C570
G18 F18 0.1U/16V_4 PCIE_TXN6_WLAN_C D20 0.1U/16V_4 PCIE_TXP6_WLAN_C C20
HDD
[34] [34] [34] [34]
SATA_RXN0 SATA_RXP0 SATA_TXN0 SATA_TXP0
ODD
[34] [34] [34] [34]
SATA_RXN1 SATA_RXP1 SATA_TXN1 SATA_TXP1
LAN
[30] [30] [30] [30]
PCIE_RXN9_LAN PCIE_RXP9_LAN PCIE_TXN9_LAN PCIE_TXP9_LAN
D
dGPU
Cardreader
C
C554 C555
F20 E20 B21 A21 G21 F21 D21 C21
C575 C564
0.1U/16V_4 0.1U/16V_4
E22 E23 PCIE_TXN9_LAN_C B23 PCIE_TXP9_LAN_C A23 F25 E25 D23 C23 R56
[16] XDP_PRDY#_CPU [16] XDP_PREQ#_CPU +3V_DEEP_SUS
R180
100/F_4
F5 E5
D56 D61 10K_4 PIRQA# BB11 E28 E27 D24 C24 E30 F30 A25 B25
B
1
12
Need apply PN
?
SSIC / USB3
PCIE/USB3/SATA
[19] [19] [19] [19]
2
USB3_1_RXN USB3_1_RXP USB3_1_TXN USB3_1_TXP
PCIE1_RXN/USB3_5_RXN PCIE1_RXP/USB3_5_RXP PCIE1_TXN/USB3_5_TXN PCIE1_TXP/USB3_5_TXP
USB3_2_RXN/SSIC_1_RXN USB3_2_RXP/SSIC_1_RXP USB3_2_TXN/SSIC_1_TXN USB3_2_TXP/SSIC_1_TXP
PCIE2_RXN/USB3_6_RXN PCIE2_RXP/USB3_6_RXP PCIE2_TXN/USB3_6_TXN PCIE2_TXP/USB3_6_TXP
USB3_3_RXN/SSIC_2_RXN USB3_3_RXP/SSIC_2_RXP USB3_3_TXN/SSIC_2_TXN USB3_3_TXP/SSIC_2_TXP
PCIE3_RXN PCIE3_RXP PCIE3_TXN PCIE3_TXP
USB2N_1 USB2P_1
PCIE5_RXN PCIE5_RXP PCIE5_TXN PCIE5_TXP
USB2N_2 USB2P_2 USB2N_3 USB2P_3
PCIE6_RXN PCIE6_RXP PCIE6_TXN PCIE6_TXP
USB2N_6 USB2P_6
PCIE8_RXN/SATA1A_RXN PCIE8_RXP/SATA1A_RXP PCIE8_TXN/SATA1A_TXN PCIE8_TXP/SATA1A_TXP
USB2N_7 USB2P_7 USB2N_8 USB2P_8
PCIE9_RXN PCIE9_RXP PCIE9_TXN PCIE9_TXP
GPP_E9/USB2_OC0# GPP_E10/USB2_OC1# GPP_E11/USB2_OC2# GPP_E12/USB2_OC3#
PCIE11_RXN/SATA1B_RXN PCIE11_RXP/SATA1B_RXP PCIE11_TXN/SATA1B_TXN PCIE11_TXP/SATA1B_TXP PCIE12_RXN/SATA2_RXN PCIE12_RXP/SATA2_RXP PCIE12_TXN/SATA2_TXN PCIE12_TXP/SATA2_TXP
GPP_E4/DEVSLP0 GPP_E5/DEVSLP1 GPP_E6/DEVSLP2 GPP_E0/SATAXPCIE0/SATAGP0 GPP_E1/SATAXPCIE1/SATAGP1 GPP_E2/SATAXPCIE2/SATAGP2
PDC
GPP_E8/SATALED#
*SKL_ULT REV = 1
AB9 AB10
USBP1USBP1+
AD6 AD7
USBP2USBP2+
USB30_RX3USB30_RX3+ USB30_TX3USB30_TX3+
[30] [30] [30] [30]
USB3.0 (M/B-1) D
USB3.0 (3D CAMERA) USB3.0 Small Board
AH3 AJ3
USBP1- [33] USBP1+ [33]
Combo USB3.0 MB-1
USBP2- [30] USBP2+ [30]
Combo USB3.0 Small Board
USBP3USBP3+
USBP3- [28] USBP3+ [28]
Camera
AF6 AF7
USBP6USBP6+
USBP6- [30] USBP6+ [30]
Combo USB3.0 Small Board
AH1 AH2
USBP7USBP7+
USBP7- [34] USBP7+ [34]
WLAN
AF8 AF9
USBP8USBP8+
USBP8- [32] USBP8+ [32]
Touch Screen
AB6 USB2_COMP R126 AG3 AG4
USB2_COMP USB2_ID USB2_VBUSSENSE
PROC_PRDY# PROC_PREQ# GPP_A7/PIRQA#
USB30_RX3USB30_RX3+ USB30_TX3USB30_TX3+
[33] [33] [33] [33]
C
AH7 AH8
USB2N_10 USB2P_10
PCIE_RCOMPN PCIE_RCOMPP
J10 H10 B15 A15
USB30_RX2USB30_RX2+ USB30_TX2USB30_TX2+
AG1 AG2
USB2N_9 USB2P_9
PCIE10_RXN PCIE10_RXP PCIE10_TXN PCIE10_TXP
USB30_RX2USB30_RX2+ USB30_TX2USB30_TX2+
[33] [33] [33] [33]
AJ1 AJ2
USB2N_5 USB2P_5
USB2
J6 H6 B13 A13
USB30_RX1USB30_RX1+ USB30_TX1USB30_TX1+
AD9 AD10
USB2N_4 USB2P_4
PCIE7_RXN/SATA0_RXN PCIE7_RXP/SATA0_RXP PCIE7_TXN/SATA0_TXN PCIE7_TXP/SATA0_TXP
USB30_RX1USB30_RX1+ USB30_TX1USB30_TX1+
E10 F10 C15 D15
USB3_4_RXN USB3_4_RXP USB3_4_TXN USB3_4_TXP
PCIE4_RXN PCIE4_RXP PCIE4_TXN PCIE4_TXP
H8 G8 C13 D13
A9 C9 D9 B9
DGPU_HOLD_RST# GPU_EVENT# DGPU_PWR_EN DGPU_PWROK
J1 J2 J3
GC6_FB_EN DEVSLP1 OCP_OC#
H2 H3 G4
ACC_LED# ODD_PRSNT#_R SATAGP2
R416
H1
SATA_LED#_R
R421
+3V
PLACE 'R10387' WITHIN 500 MILS FROM USB2_COMP PIN WITH TRACE IMPEDANCE LESS THAN 0.5 OHMS
113/F_4
DGPU_HOLD_RST# DGPU_PWR_EN DGPU_PWROK
[19]
R584
100K_4
[20,44,46] [20,35,44,46]
TP49 TP48 ACC_LED# [34] ZERO_ODD_DP#
*0_4
[34]
TP47 *0_4/S
SATA_LED#
SATA_LED#
GPU_EVENT#
R413
*10K_4
DGPU_HOLD_RST#
R400
*10K_4
DGPU_PWR_EN
R73
10K_4
DGPU_PWROK
R414
10K_4
SATA_LED#
R425
10K_4
GC6_FB_EN
R424
*10K_4
ODD_PRSNT#_R
R418
10K_4 B
[34] +3V_DEEP_SUS
0423 change to shortpad
8 OF 20 ?
ACC_LED#
PCI-E Port Mapping Table PCI-E Port
USB3.0
Function CLK RQ Port Function
Port1
dGPU
Port0
Un-used
Port2
dGPU
Port1
CardReader
Port3
dGPU
Port2
WLAN
Port4
dGPU
Port3
LAN
Port5
CardReader
Port4
VGA
Port6
WLAN
Port5
Un-used
Port7
HDD
Port8
ODD
Port9
LAN
Port10
Un-used
USB3.0 PORT-1 PORT-2 PORT-3 PORT-4
Port Mapping Table
USB2.0
Function USB3.0 MB-1 USB3.0 (3D CAMERA) Cobime USB3.0 Smaii Board NC
R426
10K_4
Port Mapping Table
USB2.0 Function Cobime USB3.0 MB-1 PORT-1 Cobime USB3.0 Smaii Board PORT-2 PORT-3 Camera PORT-4 NC PORT-5 NC PORT-6 Cobime USB3.0 Smaii Board PORT-7 WLAN PORT-8 Touch Screen PORT-9 NC PORT-10 NC
A
A
PROJECT : X1A Quanta Computer Inc.
NB5
Size
Document Number
Custom
17 -- SKYPAKE 16/20 (PCIE/USB)
Date: Wednesday, May 13, 2015 5
4
3
2
1
Sheet
Rev 1A 12of
49
5
4
3
2
1
13
+3V_RTC [4,15,32] +1.8V_DEEP_SUS [9,15,39,46] +3V [2,4,10,11,12,14,15,16,17,18,27,28,29,30,31,32,33,34,35,41,43]
Need apply PN
?
SKL_ULT
U17J
CLOCK SIGNALS
VGA D
CLK_GFX_N CLK_GFX_P PCIE_CLKREQ_VGA#
CLK_GFX_N CLK_GFX_P PCIE_CLKREQ_VGA#
[30] [30]
CLK_PCIE_CRN CLK_PCIE_CRP PCIE_CLKREQ_CR#
CLK_PCIE_CRN CLK_PCIE_CRP PCIE_CLKREQ_CR#
B42 A42 AT7
[34] [34] [34]
CLK_PCIE_WLANN CLK_PCIE_WLANP PCIE_CLKREQ_WLAN#
CLK_PCIE_WLANN CLK_PCIE_WLANP PCIE_CLKREQ_WLAN#
D41 C41 AT8
CLK_PCIE_LANN CLK_PCIE_LANP PCIE_CLKREQ_LAN#
CLK_PCIE_LANN CLK_PCIE_LANP PCIE_CLKREQ_LAN#
Cardreader [30] WLAN LAN
D42 C42 AR10
[19] [19] [20]
[30] [30] [30]
D40 C40 AT10
PCIE_CLKREQ4#
B40 A40 AU8
PCIE_CLKREQ5#
E40 E38 AU7
1222 for Cannonlake-U reserve
CLKOUT_PCIE_N0 CLKOUT_PCIE_P0 GPP_B5/SRCCLKREQ0# CLKOUT_ITPXDP_N CLKOUT_ITPXDP_P
CLKOUT_PCIE_N2 CLKOUT_PCIE_P2 GPP_B7/SRCCLKREQ2#
GPD8/SUSCLK XTAL24_IN XTAL24_OUT
CLKOUT_PCIE_N3 CLKOUT_PCIE_P3 GPP_B8/SRCCLKREQ3#
XCLK_BIASREF RTCX1 RTCX2
CLKOUT_PCIE_N4 CLKOUT_PCIE_P4 GPP_B9/SRCCLKREQ4#
SRTCRST# RTCRST#
CLKOUT_PCIE_N5 CLKOUT_PCIE_P5 GPP_B10/SRCCLKREQ5#
F43 E43
CK_XDP_N_R CK_XDP_P_R
BA17
2 4
1 3
CK_XDP_N CK_XDP_P
[16] [16]
R547
*60.4/F_4
XCLK_BIASREF
R393
2.7K/F_4
*0_4P2R_4
E37 E35
XTAL24_IN XTAL24_OUT
E42
XCLK_BIASREF
AM18 AM20
RTC_X1 RTC_X2
AN18 AM16
SRTC_RST# RTC_RST#
CLK_REQ/Strap Pin(CLG) +3V
TP103 RTC_RST#
[16]
TBT
*SKL_ULT REV = 1
U17I
D
RP3
CLKOUT_PCIE_N1 CLKOUT_PCIE_P1 GPP_B6/SRCCLKREQ1#
C
+1.0V_DEEP_SUS
RP3 install for XDP
PCIE_CLKREQ_VGA#
R150
10K_4
PCIE_CLKREQ_WLAN#
R149
10K_4
PCIE_CLKREQ_LAN#
R161
10K_4
PCIE_CLKREQ_CR#
R148
10K_4
PCIE_CLKREQ5#
R158
10K_4
PCIE_CLKREQ4#
R157
10K_4
10 OF 20 ?
SKL_ULT
?
Need apply PN
C
CSI-2
A36 B36 C38 D38 C36 D36 A38 B38 C31 D31 C33 D33 A31 B31 A33 B33 A29 B29 C28 D28 A27 B27 C27 D27
CSI2_DN0 CSI2_DP0 CSI2_DN1 CSI2_DP1 CSI2_DN2 CSI2_DP2 CSI2_DN3 CSI2_DP3
CSI2_CLKN0 CSI2_CLKP0 CSI2_CLKN1 CSI2_CLKP1 CSI2_CLKN2 CSI2_CLKP2 CSI2_CLKN3 CSI2_CLKP3
CSI2_DN4 CSI2_DP4 CSI2_DN5 CSI2_DP5 CSI2_DN6 CSI2_DP6 CSI2_DN7 CSI2_DP7
CSI2_COMP GPP_D4/FLASHTRIG
C37 D37 C32 D32 C29 D29 B26 A26 E13 B7
GPP_D4
AP2 AP1 AP3 AN3 AN1 AN2 AM4 AM1
GPP_F13 GPP_F14 GPP_F15 GPP_F16 GPP_F17 GPP_F18 GPP_F19 GPP_F20
AM2 AM3 AP4
EMMC_RCLK EMMC_CLK EMMC_CMD
AT1
EMMC_RCOMP R455
R82
100/F_4
TP36
EMMC
GPP_F13/EMMC_DATA0 GPP_F14/EMMC_DATA1 GPP_F15/EMMC_DATA2 GPP_F16/EMMC_DATA3 GPP_F17/EMMC_DATA4 GPP_F18/EMMC_DATA5 GPP_F19/EMMC_DATA6 GPP_F20/EMMC_DATA7
CSI2_DN8 CSI2_DP8 CSI2_DN9 CSI2_DP9 CSI2_DN10 CSI2_DP10 CSI2_DN11 CSI2_DP11
PDC
GPP_F21/EMMC_RCLK GPP_F22/EMMC_CLK GPP_F12/EMMC_CMD EMMC_RCOMP
*SKL_ULT REV = 1
TP93 TP94 TP96 TP91 TP90 TP89 TP92 TP88 TP86 TP83 TP95 200/F_4
9 OF 20 ?
B
B
RTC Clock 32.768KHz
RTC Circuitry(RTC)
External Crystal and Green Clock The 24 MHz (50 Ohm ESR) XTAL used for Skylake-U needs to be replaced by 38.4 MHz (30 Ohm ESR) XTAL for Cannonlake-U.
1216 increase space for on cell touch 5V R477
*0_4
R386
30mils CLKGEN_RTC_X1
[32]
R365
+3V_RTC
*0_4
RTC_RST#
+3V_RTC_0
RTC Power trace width 20mils.
RTC_X2
1
+3V_RTC_0
2
A
CN9 BAT_CONN DFHS02FS027 BAT-23_2-4_2
R362 1K_4
+3VPCU
XTAL24_IN
C561 1 2
C506 1U/6.3V_4
0513 Y2 change to 20pF internal capacity
R361 20K/F_4 2
SRTC_RST# +3V_RTC_1 D11 BAT54CW-7-F C508 1U/6.3V_4
C509 1U/6.3V_4
RTC_RST#
10P/50V_4
R399 1M_4
24MHZ +-30PPM_20P Y2 3 4
R486 10M_4
1
18P/50V_4
3 4
C601
RTC_RST#
20K/F_4 3
Uninstall for Green-CLK
Y4 32.768KHZ
[32]
TP37
RTC_X1
18P/50V_4 2 1
C602
PCH_XTAL24_IN
*0_6
R357
EC_RTC_RST
[35]
XTAL24_OUT
C559
Q31 2N7002K
10P/50V_4 TP34 A
R364 10K_4
R377
*0_4
*0_6 SRTC_RST#
R359
PROJECT : X1A Quanta Computer Inc.
NB5
Size
Document Number
Custom
13 -- SKYPAKE 17/20 (CLK)
Date: Wednesday, May 13, 2015 5
4
3
2
1
Sheet
Rev 1A 13 of
49
5
4
3
2
1
14
+3V [2,4,10,11,12,13,15,16,17,18,27,28,29,30,31,32,33,34,35,41,43] +3V_DEEP_SUS [4,10,11,12,15,16,18]
Skylake (GPIO) SKL_ULT
U17F LPSS
GPP_B15 GPP_B16 GPP_B17 GPP_B18
AN8 AP7 AP8 AR7
TP17 TP21 TP22
GPP_B19 GPP_B20 GPP_B21 GSPI1_MOSI
AM5 AN7 AP5 AN5
TP72 TP70 TP68 TP69
GPP_C8 GPP_C9 GPP_C10 GPP_C11
AB1 AB2 W4 AB3
UART2_RXD UART2_TXD ACCEL_INTA# SIO_EXT_SCI#
AD1 AD2 AD3 AD4
TP20 TP23 TP24 [11]
+3V_DEEP_SUS
D
BT_OFF
R433
10K_4
PCH_TEMPALERT#
R434
10K_4
[11]
SIO_EXT_SCI#
R145
GPP_B18
GSPI1_MOSI
10K_4
UART2_RXD
R545
49.9K/F_4
UART2_TXD
R546
49.9K/F_4
[33] [33] [32] [35]
UART2_RXD UART2_TXD ACCEL_INTA# SIO_EXT_SCI#
U7 U6
1225 Add R545 and R546 for UART function reserved
+3V
ACCEL_INTA#
R456
10K_4
C
TP57 TP71
I2C1_SDA I2C1_SCL
U8 U9
TP87 TP81
I2C2_SDA I2C2_SCL
AH9 AH10
TP7 TP6
I2C3_SDA I2C3_SCL
AH11 AH12
TP5 TP4
I2C4_SDA I2C4_SCL
AF11 AF12
0114 Del TP58, Add R558 with 0ohm unmount for 3D camera
Need apply PN
?
ISH
GPP_B15/GSPI0_CS# GPP_B16/GSPI0_CLK GPP_B17/GSPI0_MISO GPP_B18/GSPI0_MOSI
GPP_D9 GPP_D10 GPP_D11 GPP_D12
GPP_B19/GSPI1_CS# GPP_B20/GSPI1_CLK GPP_B21/GSPI1_MISO GPP_B22/GSPI1_MOSI
GPP_D5/ISH_I2C0_SDA GPP_D6/ISH_I2C0_SCL GPP_D7/ISH_I2C1_SDA GPP_D8/ISH_I2C1_SCL
GPP_C8/UART0_RXD GPP_C9/UART0_TXD GPP_C10/UART0_RTS# GPP_C11/UART0_CTS#
GPP_F10/I2C5_SDA/ISH_I2C2_SDA GPP_F11/I2C5_SCL/ISH_I2C2_SCL
GPP_C20/UART2_RXD GPP_C21/UART2_TXD GPP_C22/UART2_RTS# GPP_C23/UART2_CTS#
GPP_D13/ISH_UART0_RXD/SML0BDATA/I2C4B_SDA GPP_D14/ISH_UART0_TXD/SML0BCLK/I2C4B_SCL GPP_D15/ISH_UART0_RTS# GPP_D16/ISH_UART0_CTS#/SML0BALERT# GPP_C12/UART1_RXD/ISH_UART1_RXD GPP_C13/UART1_TXD/ISH_UART1_TXD GPP_C14/UART1_RTS#/ISH_UART1_RTS# GPP_C15/UART1_CTS#/ISH_UART1_CTS#
GPP_C16/I2C0_SDA GPP_C17/I2C0_SCL GPP_C18/I2C1_SDA GPP_C19/I2C1_SCL
GPP_A18/ISH_GP0 GPP_A19/ISH_GP1 GPP_A20/ISH_GP2 GPP_A21/ISH_GP3 GPP_A22/ISH_GP4 GPP_A23/ISH_GP5 GPP_A12/BM_BUSY#/ISH_GP6
GPP_F4/I2C2_SDA GPP_F5/I2C2_SCL GPP_F6/I2C3_SDA GPP_F7/I2C3_SCL
P2 P3 P4 P1
GPP_D9 3D_CAM_EN_PCH GPP_D11 BT_OFF
M4 N3
ISH_I2C0_SDA ISH_I2C0_SCL
N1 N2
ISH_I2C1_SDA ISH_I2C1_SCL
AD11 AD12
ISH_I2C2_SDA ISH_I2C2_SCL
U1 U2 U3 U4
PCH_TEMPALERT# SML0BDATA SML0BCLK SML0BALERT#
AC1 AC2 AC3 AB4
UART1_RXD UART1_TXD UART1_RTS UART1_CTS
AY8 BA8 BB7 BA7 AY7 AW7 AP13
GPP_A18 GPP_A19 GPP_A20 GPP_A21 GPP_A22 GPP_A23 GPP_A12
TP59
R558
*0_4
3D_CAM_EN
3D_CAM_EN
[35,43]
TP60 BT_OFF
[34]
D
TP52 TP56 TP53 TP55 TP3 TP2 TP61 TP63 TP62 TP64 TP76 TP73 TP77 TP74 TP107 TP104 TP101 TP100 TP102 TP99 TP9
GPP_F8/I2C4_SDA GPP_F9/I2C4_SCL
C
6 OF 20 ?
*SKL_ULT REV = 1
HDA Bus(CLG) +3V_DEEP_SUS
R482
*1K_4
ACZ_SYNC
ACZ_SYNC_AUDIO
R218
33_4
ACZ_SYNC
ACZ_RST#_AUDIO
R493
33_4
ACZ_RST#
ACZ_SDOUT_AUDIO
R220
33_4
ACZ_SDOUT
R481
33_4
ACZ_BCLK
[29] [29] [29]
B
R120
*10K_4
BOARD_ID0
R121
10K_4
R136
*10K_4
BOARD_ID1
R139
10K_4
R131
10K_4
BOARD_ID2
R137
*10K_4
R108
10K_4
BOARD_ID3
R109
*10K_4
R105
*10K_4
BOARD_ID4
R106
10K_4
R117
10K_4
BOARD_ID5
R116
*10K_4
R128
10K_4
BOARD_ID6
R132
*10K_4
R111
10K_4
BOARD_ID7
R112
*10K_4
R494
10K_4
BOARD_ID8
R483
*10K_4
[29]
C598 *10P/50V_4 B
Model
BOARD_ID[8:7]
ID8 ID7
BOARD_ID[6:5]
ID6 ID5
Board ID [4:3]
ID4 ID3
Definition
?
Need apply PN
AUDIO
[11] ACZ_SDOUT [29] ACZ_SDIN0
BOARD_ID[2:1]
ID2 ID1
BOARD_ID[0]
ACZ_SYNC ACZ_BCLK ACZ_SDOUT ACZ_SDIN0
00:non 3D SKU
00:Crunch1.0
00:I+N Single(X1B-6L)
00:14"
0:UMA
01:3D SKU
01:Crunch2.0
01:I+N Dual(X1B-10L)
01:15"
1:DIS
10:I+A Single(X1A-6L)
10:17"
11 Reserve
11:Reserve
BA22 AY22 BB22 BA21 AY21 AW22 J5 AY20 AW20 AK7 AK6 AK9 AK10
TP85 TP82 TP16 TP15
SSP2_SFRM SSP2_SCLK SSP2_TXD SSP2_RXD
TP1 TP42
GPP_D19 GPP_D20
H5 D7
TP35 TP41
GPP_D17 GPP_D18
D8 C8
ID0 [11,29]
A
SKL_ULT
U17G
ACZ_RST#
Skylake U
BIT_CLK_AUDIO
+3V_DEEP_SUS
ACZ_SPKR
ACZ_SPKR
AW5
HDA_SYNC/I2S0_SFRM HDA_BLK/I2S0_SCLK HDA_SDO/I2S0_TXD HDA_SDI0/I2S0_RXD HDA_SDI1/I2S1_RXD HDA_RST#/I2S1_SCLK GPP_D23/I2S_MCLK I2S1_SFRM I2S1_TXD GPP_F1/I2S2_SFRM GPP_F0/I2S2_SCLK GPP_F2/I2S2_TXD GPP_F3/I2S2_RXD
SDIO/SDXC
GPP_G0/SD_CMD GPP_G1/SD_DATA0 GPP_G2/SD_DATA1 GPP_G3/SD_DATA2 GPP_G4/SD_DATA3 GPP_G5/SD_CD# GPP_G6/SD_CLK GPP_G7/SD_WP GPP_A17/SD_PWR_EN#/ISH_GP7 GPP_A16/SD_1P8_SEL
GPP_D19/DMIC_CLK0 GPP_D20/DMIC_DATA0
SD_RCOMP
GPP_D17/DMIC_CLK1 GPP_D18/DMIC_DATA1
GPP_F23
AB11 AB13 AB12 W12 W11 W10 W8 W7
BOARD_ID0 BOARD_ID1 BOARD_ID2 BOARD_ID3 BOARD_ID4 BOARD_ID5 BOARD_ID6 BOARD_ID7
BA9 BB9
BOARD_ID8 GPP_A16
AB7 AF13
GPP_A16 R123
GPP_F23
[33]
0129 Del TP108 add GPP_A16
200/F_4
TP84
GPP_B14/SPKR A
*SKL_ULT REV = 1
7 OF 20 ?
PROJECT : X1A Quanta Computer Inc.
NB5
Size
Document Number
Custom
20 -- SKYPAKE 19/20 (GPIO)
Date: Wednesday, May 13, 2015 5
4
3
2
1
Sheet
Rev 1A 14of
49
5
4
3
2
1
15
[4,10,11,12,14,16,18] +3V_DEEP_SUS [9,13,16,39,40] +1.0V_DEEP_SUS [9,39,46] +1.8V_DEEP_SUS [4,13,32] +3V_RTC [4,10,16,32,34,35,37,39,40,43,44,46] +3VS5
D
?
SKL_ULT
U17O
D
Need apply PN
CPU POWER 4 OF 4
AB19 AB20 P18
+VCCPRIM C158 1U/6.3V_4
+1.0V_DEEP_SUS
C153
AF18 AF19 V20 V21
1U/6.3V_4
C820 and C690 close to cpu less then 100 mils
PCH Internal VRM
+VCCDSW_1.0V +1.0V_DEEP_SUS
+1.0V_DEEP_SUS
+1.0V_DEEP_SUS
C581 C146
C84 C62 C65
+1.0V_DEEP_SUS +1.0V_DEEP_SUS
C
1U/6.3V_4 R429 1U/6.3V_4
+VCCMPHYAON_1P0
*0_6/S
R190
1U/6.3V_4 47U/6.3VS_8 +VCCAMPHYPLL_1P0
R69 *0_6/S 1U/6.3V_4 R71
*0_6/S
+VCCAPLL_1.0V
R113
*0_6/S
+VCCPRIM
1U/6.3V_4
C274
1U/6.3V_4
K15 L15 V15 AB17 Y18 AD17 AD18 AJ17
*0_4/S C171
K17 L1 N15 N16 N17 P15 P16
0423 change to shortpad +3VS5
AL1
AJ19
+V3.3DX_1.5DX_ADO R175
+3V_DEEP_SUS
+VCCSPI
*0_6/S
AJ16 AF20 AF21 T19 T20
R115 *0_6/S 1U/6.3V_4
+VCCSRAM_1.0V
+3V_DEEP_SUS
R174
*0_6/S
+VCCPRIM_3.3V
AJ21
+1.0V_DEEP_SUS
R435
*0_6/S
+VCCPRIM_1.0V
AK20
+1.0V_DEEP_SUS
C116
0423 change to shortpad
+1.0V_DEEP_SUS
C139
+VCCAPLLEBB
R78 *0_6/S 1U/6.3V_4
N18
VCCPRIM_1P0 VCCPRIM_1P0 VCCPRIM_1P0
VCCPGPPA VCCPGPPB VCCPGPPC VCCPGPPD VCCPGPPE VCCPGPPF VCCPGPPG
2.899A
VCCPRIM_CORE VCCPRIM_CORE VCCPRIM_CORE VCCPRIM_CORE
2.57A
DCPDSW _1P0
VCCPRIM_3P3_V19
VCCMPHYAON_1P0 VCCMPHYAON_1P0
VCCPRIM_1P0_T1 VCCATS_1P8
VCCMPHYGT_1P0_N15 VCCMPHYGT_1P0_N16 VCCMPHYGT_1P0_N17 VCCMPHYGT_1P0_P15 VCCMPHYGT_1P0_P16
VCCRTCPRIM_3P3
1.714A
VCCRTC_AK19 VCCRTC_BB14
VCCAMPHYPLL_1P0 VCCAMPHYPLL_1P0 VCCAPLL_1P0
DCPRTC VCCCLK1
0.03A
VCCCLK2 VCCPRIM_1P0_AB17 VCCPRIM_1P0_Y18 VCCDSW _3P3_AD17 VCCDSW _3P3_AD18 VCCDSW _3P3_AJ17
VCCCLK3 VCCCLK4
0.09A
VCCCLK5
VCCHDA
VCCCLK6
VCCSPI
GPP_B0/CORE_VID0 GPP_B1/CORE_VID1
AK15 AG15 Y16 Y15 T16 AF16 AD15
+VCCPGPPA +VCCPGPPB +VCCPGPPC +VCCPGPPD +VCCPGPPE +VCCPGPPF +VCCPGPPG
+3V_DEEP_SUS
C201
1U/6.3V_4
V19
+3V_DEEP_SUS
T1
+VCCPRIM_1.0V_T1
R134
*0_6/S
AA1
+VCCATS_1.8V
R450
*0_6/S
AK17
+VCCRTCPRIM_3.3V
AK19 BB14
R130
*0_6/S
+1.0V_DEEP_SUS +1.8V_DEEP_SUS +3V_DEEP_SUS
0423 change to shortpad
+VCCPGPPB
R127
*0_6/S
+VCCPGPPC
R114
*0_6/S
+VCCPGPPD
R118
*0_6/S
+VCCPGPPE
R110
*0_6/S
+VCCPGPPG
R122
*0_6/S
+3V_RTC
DCPRTC
A14
+VCCCLK1
R79
*0_6/S
K19
+VCCCLK2
R53
*0_6/S
L21
+VCCCLK3
R57
*0_6/S
N20
+VCCCLK4
R76
*0_6/S
L19
+VCCCLK5
R77
*0_6/S
A10
+VCCCLK6
R70
AN11 AN13
CORE_VID0 CORE_VID1
0.1U/16V_4
0423 change to shortpad +1.8V_DEEP_SUS
+VCCPGPPF
C97
R449
*0_6/S
0423 change to shortpad
C
*0_6/S 1U/6.3V_4
TP18 TP11
VCCPRIM_3P3_AJ21 VCCPRIM_1P0_AK20 VCCAPLLEBB 15 OF 20 ? +VCCATS_1.8V
+3V_RTC
+VCCRTCPRIM_3.3V
+1.0V_DEEP_SUS
B
R183
*0_6/S
VCCSRAM_1P0 VCCSRAM_1P0 VCCSRAM_1P0 VCCSRAM_1P0
*SKL_ULT REV = 1 +V3.3DX_1.5DX_ADO
R138
+1.0V_DEEP_SUS
BB10
C239
+VCCPGPPA
*0_4/S
+3V
C77 *1U/6.3V_4
C58 *22U/6.3V_6
for DS3
+3VS5
+3V_DEEP_SUS
C579 1U/6.3V_4
C293 0.1U/16V_4
C300 1U/6.3V_4
C191 1U/6.3V_4
B
C176 0.1U/16V_4
0423 change to shortpad R93 100K_4
C104 1U/6.3V_4
+VCCPGPPB
U5
5 4 [35,39,40]
3
SLP_SUS_ON
IN
OUT
IN
GND
+VCCPGPPE
2 C106 0.1U/16V_4
ON/OFF
+VCCPGPPC
1 C164 1U/6.3V_4
C144 1U/6.3V_4
C128 1U/6.3V_4
G5243AT11U C105 *10P/50V_4
A
A
PROJECT : X1A Quanta Computer Inc.
NB5
Size
Document Number
Custom
15 -- SKYPAKE 20/20(PCH POWER)
Date: Wednesday, May 13, 2015 5
4
3
2
1
Sheet
15
Rev 1A of
49
5
4
3
2
1
16
+1.0V_DEEP_SUS
0116 Change CN2 footprint CN2
D
[16]
XDP_PREQ#_CPU XDP_PRDY#_CPU [9] CFG0 [9] CFG1 [9] CFG2 [9] CFG3 [9] CFG4 [9] CFG5 [9] CFG6 [9] CFG7 ON/OFFBTN_KBC# [13] [13]
[10,17,18,27,31] [10,17,18,27,31]
R432 R420
CFG0
R428
CK_XDP_P CK_XDP_N R84 R83
SMB_RUN_DAT SMB_RUN_CLK
0423 change to shortpad XDP_TCK0
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26
51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27
51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27
XDP_BPM0 [2] XDP_BPM1 [2] CFG17 [9] CFG16 [9] CFG8 [9] CFG9 [9] CFG10 [9] CFG11 [9] CFG19 [9] CFG18 [9] CFG12 [9] CFG13 [9] CFG14 [9] CFG15 [9] EC_PW ROK [4,35]
XDP_TCK1 SYS_PW ROK XDP_RST
D
*FH26W -51S-0.3SHW (05)
52 53
[2]
1 2 3 4 5 6 1K_4 7 8 9 10 11 12 1K_4 PW R_DEBUG 13 14 15 XDP_DBRESET_N *0_4/S SMB_RUN_DAT_XDP 16 *0_4/S SMB_RUN_CLK_XDP 17 18 XDP_TDO 19 XDP_TRST# 20 XDP_TDI 21 XDP_TMS 22 XDP_TCK0 23 24 25 26 1K_4
52 53
[12] [12]
TP50
1125 change R81 connection from +1.0V to +VCCIO
+VCCIO +1.0V_DEEP_SUS
C
XDP_DBRESET_N
R80
1K_4
+3V
SYS_PW ROK
R104
C103 0.1U/16V_4
*1K_4
C
R81 150/F_4
+3V_DEEP_SUS
C132 0.1U/16V_4
C100 0.1U/16V_4
C101 0.1U/16V_4
PW R_DEBUG
+3V R86 *10K_4
+3V_DEEP_SUS +3VS5 C99 0.1U/16V_4
APS CN3
B
U4
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
14 SUSB#
[4,16,35]
SLP_S5# [4] SUSC# [4,35] SLP_A# [4] RTC_RST#
[4,35,37,38,39]
SYS_RESET# *0_4
1
HW PG
5
XDP_TDI
4
[13]
ON/OFFBTN_KBC#
R202
2
XDP_TDO
+3VS5
9
XDP_TMS
[16]
10
[4]
PCH_SLP_S0_N
12
XDP_TRST#
[4,35]
13 SUSB#
[4,16,35]
VCC 1A
1B
3
XDP_TDO_CPU
[2]
1OE 2A
2B
6
XDP_TDI_CPU
[2]
2OE 3A
3B
8
XDP_TMS_CPU
[2]
B
3OE 4A
4B
4OE DPAD
*ACES_88511-180N
GND
11
XDP_TRST#_CPU
[2]
15 7
+1.0V
*SN74CBTLV3126RGYR
[4]
[4,19,30,32,34,35]
R85
1K_4
XDP_RST
[2]
JTAGX_PCH
[2]
JTAG_TMS_PCH
[2]
JTAG_TDI_PCH
[2] [2,6,40]
51_4
R422
*0_4
XDP_TDO
SYS_PW ROK
SYS_PW ROK
PLTRST#
R417
XDP_TCK0 XDP_TMS XDP_TDI XDP_TDO
JTAG_TDO_PCH
+VCCIO
[2]
R423
*0_4
XDP_TDI
R419
*0_4
XDP_TCK0 XDP_TCK1
JTAG_TCK_PCH
A
A
PROJECT : X1A Quanta Computer Inc. Size
NB5
Document Number
5
4
3
2
Rev 1A
16 -- HSW XDP & APS Date: Wednesday, May 13, 2015
Sheet 1
16
of
49
4
D
R288 R290
10K/F_4 10K/F_4
[3] [3] [3] [3] [3] [3] [3] [3] [3] [3] [3] [3] [3] [3]
[10,16,18,27,31] [10,16,18,27,31] [3] [3]
M_A_BS#0 M_A_BS#1 M_A_BS#2 M_A_CS#0 M_A_CS#1 M_A_CLKP0 M_A_CLKN0 M_A_CLKP1 M_A_CLKN1 M_A_CKE0 M_A_CKE1 M_A_CAS# M_A_RAS# M_A_WE#
SMB_RUN_CLK SMB_RUN_DAT
M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15
98 97 96 95 92 91 90 86 89 85 107 84 83 119 80 78
DIMM0_SA0 DIMM0_SA1 SMB_RUN_CLK SMB_RUN_DAT
109 108 79 114 121 101 103 102 104 73 74 115 110 113 197 201 202 200 116 120
M_A_DIM0_ODT0 M_A_DIM0_ODT1
11 28 46 63 136 153 170 187
C
[3]
[3]
M_A_DQ[63:0]
JDIM2A
M_A_A[15:0]
M_A_DQSP[7:0]
M_A_DQSN[7:0]
CPU Bracket
M_A_DQSP0 M_A_DQSP1 M_A_DQSP2 M_A_DQSP3 M_A_DQSP4 M_A_DQSP5 M_A_DQSP6 M_A_DQSP7 M_A_DQSN0 M_A_DQSN1 M_A_DQSN2 M_A_DQSN3 M_A_DQSN4 M_A_DQSN5 M_A_DQSN6 M_A_DQSN7
12 29 47 64 137 154 171 188 10 27 45 62 135 152 169 186
5 M_A_DQ4 DQ0 7 M_A_DQ0 DQ1 15 M_A_DQ7 DQ2 17 M_A_DQ3 DQ3 4 M_A_DQ1 DQ4 6 M_A_DQ5 DQ5 16 M_A_DQ2 DQ6 18 M_A_DQ6 DQ7 21 M_A_DQ9 DQ8 23 M_A_DQ12 DQ9 33 M_A_DQ10 DQ10 35 M_A_DQ14 DQ11 22 M_A_DQ8 DQ12 24 M_A_DQ13 DQ13 34 M_A_DQ15 DQ14 36 M_A_DQ11 DQ15 39 M_A_DQ17 DQ16 41 M_A_DQ21 BA0 DQ17 51 M_A_DQ22 BA1 DQ18 53 M_A_DQ18 BA2 DQ19 40 M_A_DQ20 S0# DQ20 42 M_A_DQ16 S1# DQ21 50 M_A_DQ23 CK0 DQ22 52 M_A_DQ19 CK0# DQ23 57 M_A_DQ28 CK1 DQ24 59 M_A_DQ24 CK1# DQ25 67 M_A_DQ31 CKE0 DQ26 69 M_A_DQ27 CKE1 DQ27 56 M_A_DQ25 CAS# DQ28 58 M_A_DQ29 RAS# DQ29 68 M_A_DQ26 W E# DQ30 70 M_A_DQ30 SA0 DQ31 129 M_A_DQ37 SA1 DQ32 131 M_A_DQ33 SCL DQ33 141 M_A_DQ38 SDA DQ34 143 M_A_DQ35 DQ35 130 M_A_DQ32 ODT0 DQ36 132 M_A_DQ36 ODT1 DQ37 140 M_A_DQ34 DQ38 142 M_A_DQ39 DM0 DQ39 147 M_A_DQ40 DM1 DQ40 149 M_A_DQ43 DM2 DQ41 157 M_A_DQ41 DM3 DQ42 159 M_A_DQ47 DM4 DQ43 146 M_A_DQ45 DM5 DQ44 148 M_A_DQ44 DM6 DQ45 158 M_A_DQ42 DM7 DQ46 160 M_A_DQ46 DQ47 163 M_A_DQ53 DQS0 DQ48 165 M_A_DQ52 DQS1 DQ49 175 M_A_DQ55 DQS2 DQ50 177 M_A_DQ50 DQS3 DQ51 164 M_A_DQ49 DQS4 DQ52 166 M_A_DQ48 DQS5 DQ53 174 M_A_DQ54 DQS6 DQ54 176 M_A_DQ51 DQS7 DQ55 181 M_A_DQ56 DQS#0 DQ56 183 M_A_DQ60 DQS#1 DQ57 191 M_A_DQ59 DQS#2 DQ58 193 M_A_DQ63 DQS#3 DQ59 180 M_A_DQ57 DQS#4 DQ60 182 M_A_DQ61 DQS#5 DQ61 192 M_A_DQ62 DQS#6 DQ62 194 M_A_DQ58 DQS#7 DQ63 EZIW DDR3-DIMM0_H=4.0_STD ddr-ddrsk-20401-tp4b-204p-smt DGMK4000324 SOCKET DDR3 SODIMM(204P,H4.0,STD)TOP BSQ A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 A14 A15
2
[3]
1
JDIM2B
199
+3V
+3V
PV modify to short pad
[3,18]
R311
10K/F_4
77 122 125 198 30
PM_EXTTS#0
[18] PM_EXTTS#0 DDR3_DRAMRST# R286
*0_6/S
+SMDDR_VREF_DIMM
*0.1U/16V_4 1 +SMDDR_VREF_DQ0 +SMDDR_VREF_DIMM 126
VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 VDD15 VDD16 VDD17 VDD18 VDDSPD NC1 NC2 NCTEST EVENT# RESET#
C438 SMDDR_VREF_DQ0_M1
17
+1.35VSUS
2.48A
75 76 81 82 87 88 93 94 99 100 105 106 111 112 117 118 123 124
PC2100 DDR3 SDRAM SO-DIMM (204P)
[3]
3
2 3 8 9 13 14 19 20 25 26 31 32 37 38 43
VREF_DQ VREF_CA VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15
PC2100 DDR3 SDRAM SO-DIMM (204P)
5
VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52
44 48 49 54 55 60 61 65 66 71 72 127 128 133 134 138 139 144 145 150 151 155 156 161 162 167 168 172 173 178 179 184 185 189 190 195 196
D
C
VTT1 VTT2 GND GND
203 204
+0.65V_DDR_VTT
205 206
DDR3-DIMM0_H=4.0_STD ddr-ddrsk-20401-tp4b-204p-smt DGMK4000324 SOCKET DDR3 SODIMM(204P,H4.0,STD)TOP BSQ
[2,4,10,11,12,13,14,15,16,18,27,28,29,30,31,32,33,34,35,41,43] +3V [3,6,18,38,40] +1.35VSUS [18,38] +0.65V_DDR_VTT [18] +SMDDR_VREF_DIMM
B
B
Place these Caps near So-Dimm0. 1uF/10uF 4pcs on each side of connector
For EMI RESERVE
+1.35VSUS
+1.35VSUS
VREF DQ0 M1 Solution
+0.65V_DDR_VTT
+1.35VSUS 1U/6.3V_4
C430
1U/6.3V_4
EC36
*120P/50V_4
EC45
*120P/50V_4
C426
1U/6.3V_4
C432
1U/6.3V_4
EC51
*120P/50V_4
EC50
*120P/50V_4
C433
1U/6.3V_4
C429
1U/6.3V_4
EC49
*120P/50V_4
EC48
*120P/50V_4
C434
1U/6.3V_4
C418
1U/6.3V_4
EC37
120P/50V_4
EC40
*0.1U/16V_4
C435
1U/6.3V_4
C416
R283 1.8K/F_4 [3]
SMDDR_VREF_DQ0_M3
SMDDR_VREF_DQ0_M3
1U/6.3V_4 R282
*120P/50V_4
EC42
*0.1U/16V_4
C425
1U/6.3V_4
EC47
*120P/50V_4
EC43
*0.1U/16V_4
C423
1U/6.3V_4
EC46
*120P/50V_4
EC41
*0.1U/16V_4
C421
1U/6.3V_4
C442
10U/6.3V_6
C441
10U/6.3V_6
C420
10U/6.3V_6
C419
10U/6.3V_6
C424
10U/6.3V_6
C439
10U/6.3V_6
C440 C422
SMDDR_VREF_DQ0_M1
2/F_6
24.9/F_4
+1.35VSUS
C411 0.022U/25V_4
R287 1.8K/F_4 R292 1.8K/F_4
+SMDDR_VREF_DIMM C443
*0.1U/16V_4
C431
*2.2U/6.3V_6
[3]
R293
SM_VREF
1
EC44
R281
1
C436
2
+1.35VSUS
EC39
*120P/50V_4
EC38
*120P/50V_4
A
+SMDDR_VREF_DIMM
C437 0.022U/25V_4
R295 1.8K/F_4
2
+0.65V_DDR_VTT
2/F_6
+SMDDR_VREF_DQ0
R294 C428
*0.1U/16V_4
C427
*2.2U/6.3V_6
10U/6.3V_6
C417
0.1U/16V_4
10U/6.3V_6
C414
2.2U/6.3V_6
A
24.9/F_4
PROJECT : X1A Quanta Computer Inc.
+3V
NB5
Size
Document Number
Custom
DDR3 DIMM0-STD(4.0H)
Date: Wednesday, May 13, 2015 5
4
3
2
1
Sheet
Rev 1A 17of
49
5
4
3
M_B_DQ[63:0]
2
1
18
[3] +1.35VSUS
+3V
R271 R272
[3] [3] [3] [3] [3] [3] [3] [3] [3] [3] [3] [3] [3] [3]
10K/F_4 10K/F_4
[10,16,17,27,31] [10,16,17,27,31] [3] [3]
M_B_BS#0 M_B_BS#1 M_B_BS#2 M_B_CS#0 M_B_CS#1 M_B_CLKP0 M_B_CLKN0 M_B_CLKP1 M_B_CLKN1 M_B_CKE0 M_B_CKE1 M_B_CAS# M_B_RAS# M_B_WE#
DIMM1_SA0 DIMM1_SA1
SMB_RUN_CLK SMB_RUN_DAT M_B_ODT0 M_B_ODT1
M_B_DIM0_ODT0 M_B_DIM0_ODT1
109 108 79 114 121 101 103 102 104 73 74 115 110 113 197 201 202 200 116 120 11 28 46 63 136 153 170 187
C
[3]
[3]
M_B_DQSP[7:0]
M_B_DQSP1 M_B_DQSP0 M_B_DQSP2 M_B_DQSP3 M_B_DQSP4 M_B_DQSP5 M_B_DQSP6 M_B_DQSP7 M_B_DQSN1 M_B_DQSN0 M_B_DQSN2 M_B_DQSN3 M_B_DQSN4 M_B_DQSN5 M_B_DQSN6 M_B_DQSN7
M_B_DQSN[7:0]
12 29 47 64 137 154 171 188 10 27 45 62 135 152 169 186
JDIM1B
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 A14 A15 BA0 BA1 BA2 S0# S1# CK0 CK0# CK1 CK1# CKE0 CKE1 CAS# RAS# W E# SA0 SA1 SCL SDA ODT0 ODT1 DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7 DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS#0 DQS#1 DQS#2 DQS#3 DQS#4 DQS#5 DQS#6 DQS#7
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63
5 7 15 17 4 6 16 18 21 23 33 35 22 24 34 36 39 41 51 53 40 42 50 52 57 59 67 69 56 58 68 70 129 131 141 143 130 132 140 142 147 149 157 159 146 148 158 160 163 165 175 177 164 166 174 176 181 183 191 193 180 182 192 194
M_B_DQ12 M_B_DQ8 M_B_DQ11 M_B_DQ10 M_B_DQ9 M_B_DQ13 M_B_DQ15 M_B_DQ14 M_B_DQ4 M_B_DQ0 M_B_DQ3 M_B_DQ6 M_B_DQ5 M_B_DQ1 M_B_DQ2 M_B_DQ7 M_B_DQ17 M_B_DQ16 M_B_DQ18 M_B_DQ19 M_B_DQ21 M_B_DQ20 M_B_DQ22 M_B_DQ23 M_B_DQ25 M_B_DQ24 M_B_DQ30 M_B_DQ31 M_B_DQ28 M_B_DQ29 M_B_DQ26 M_B_DQ27 M_B_DQ36 M_B_DQ37 M_B_DQ39 M_B_DQ35 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ38 M_B_DQ44 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ45 M_B_DQ40 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ52 M_B_DQ55 M_B_DQ54 M_B_DQ49 M_B_DQ53 M_B_DQ50 M_B_DQ51 M_B_DQ57 M_B_DQ56 M_B_DQ58 M_B_DQ62 M_B_DQ61 M_B_DQ60 M_B_DQ59 M_B_DQ63
75 76 81 82 87 88 93 94 99 100 105 106 111 112 117 118 123 124
2.48A
VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 VDD15 VDD16 VDD17 VDD18
199
+3V
VDDSPD
77 122 125
[3,17]
PV modify to short pad
PM_EXTTS#0
[17] PM_EXTTS#0 DDR3_DRAMRST# C415
SMDDR_VREF_DQ1_M1
R263
*0_6/S
*0.1U/16V_4 +SMDDR_VREF_DQ1
+SMDDR_VREF_DIMM
NC1 NC2 NCTEST
198 30
EVENT# RESET#
1 126
VREF_DQ VREF_CA
2 3 8 9 13 14 19 20 25 26 31 32 37 38 43
VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15
44 48 49 54 55 60 61 65 66 71 72 127 128 133 134 138 139 144 145 150 151 155 156 161 162 167 168 172 173 178 179 184 185 189 190 195 196
D
C
VTT1 VTT2 HOLE1 HOLE2 PAD1 PAD2
203 204
+0.65V_DDR_VTT
205 206 207 208
DDR3-DIMM1_H=4.0_RVS ddr-ddrrk-20401-tp4b-204p-smt DGMK4000262
Local Thermal Sensor U12 [10,27,35]
MBCLK2
[10,27,35]
MBDATA2
DDR3-DIMM1_H=4.0_RVS ddr-ddrrk-20401-tp4b-204p-smt DGMK4000262
+3V
MBCLK2
8
MBDATA2
7
PM_EXTTS#0
6
R313
*10K/F_4
4
C448
SCLK
VCC
SDA
DXP
ALERT#
DXN
OVERT#
GND
*0.01U/50V_4
1
+3V
2
DDR_THERMDA
3
DDR_THERMDC
1
DDR_VTT_CNTL
TMP431ADGKR(98h) +1.35VSUS
1U/6.3V_4
C380
1U/6.3V_4
C378
1U/6.3V_4
C401
1U/6.3V_4
C379
1U/6.3V_4
C404
1U/6.3V_4
C377
1U/6.3V_4
C395
1U/6.3V_4
C413
1U/6.3V_4
C391
1U/6.3V_4
C396
1U/6.3V_4
DDR_VTT_PG_CTRL
R254
*0_4
DDR_VTT_PG_CTRL_R
Q16 *DRC5144E0L [36,37] +5VPCU [3,6,17,38,40] +1.35VSUS [17,38] +0.65V_DDR_VTT [4,30,32,33,37,38,39,40,41,42,43,44,46] +5VS5 [2,4,10,11,12,13,14,15,16,17,27,28,29,30,31,32,33,34,35,41,43] +3V
[38]
C372 C371
10U/6.3V_6 10U/6.3V_6
C405 C407
10U/6.3V_6 10U/6.3V_6
C403 C376
10U/6.3V_6 10U/6.3V_6
C408 C382
10U/6.3V_6 10U/6.3V_6
C412
*0.1U/16V_4
C444
*2.2U/6.3V_6
R265 1.8K/F_4 [3]
SMDDR_VREF_DQ1_M3
SMDDR_VREF_DQ1_M3
+SMDDR_VREF_DQ1 C359
*0.1U/16V_4
C358
*2.2U/6.3V_6
10U/6.3V_6
+3V C388
0.1U/16V_4
C410
2.2U/6.3V_6
R267
C375 0.022U/25V_4
R264 1.8K/F_4
R266 24.9/F_4
A
PROJECT : X1A Quanta Computer Inc.
NB5
Size
Document Number
Custom
DDR3 DIMM1-RVS(4.0H)
Date: Wednesday, May 13, 2015 5
4
3
SMDDR_VREF_DQ1_M1
2/F_6
1
C402
VREF DQ1 M1 Solution
+SMDDR_VREF_DIMM
1U/6.3V_4
C409
3
B
*G781P8
2
R251 *47K/F_4
2 [3,4]
G781P8(98h)
3nd:AL000431014
+0.65V_DDR_VTT
+1.35VSUS C406
R209 *47K/F_4
2nd:AL000781012
(EOD)
1uF/10uF 4pcs on each side of connector
+3V_DEEP_SUS
R213 *47K/F_4
EMC1412-1-ACZL-TR(98h)
Q21 *METR3904-G
Place these Caps near So-Dimm1.
Co-lay for ODT From Intel MOW, ODT directly connection to CPU +1.35VSUS
Main:AL001412003
DDR3 Thermal Sensor
2
C452 *2200P/50V_4
5
B
A
VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52
3
D
98 97 96 95 92 91 90 86 89 85 107 84 83 119 80 78
1
M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15
PC2100 DDR3 SDRAM SO-DIMM (204P)
M_B_A[15:0]
PC2100 DDR3 SDRAM SO-DIMM (204P)
[3]
JDIM1A
2
1
Sheet
Rev 1A 18of
49
U19A
[12] [12]
PEG_TXP0 PEG_TXN0
PEG_TXP0 PEG_TXN0
AF30 AE31
PEG_TXP1 PEG_TXN1
AE29 AD28
PEG_TXP2 PEG_TXN2
AD30 AC31
PEG_TXP3 PEG_TXN3
AC29 AB28
Platform Carrizo Carrizo-L
PCIE_RX0P PCIE_RX0N
PCIE_TX0P PCIE_TX0N
AH30 AG31
C_PEG_RXP0 C_PEG_RXN0
C203 C207
0.22U/10V_4 0.22U/10V_4
AG29 AF28
C_PEG_RXP1 C_PEG_RXN1
C208 C210
0.22U/10V_4 0.22U/10V_4
AF27 AF26
C_PEG_RXP2 C_PEG_RXN2
C213 C211
0.22U/10V_4 0.22U/10V_4
AD27 AD26
C_PEG_RXP3 C_PEG_RXN3
C216 C219
0.22U/10V_4 0.22U/10V_4
PEG_RXP0 PEG_RXN0
[12] [12]
PEG_RXP1 PEG_RXN1
[12] [12]
PEG_RXP2 PEG_RXN2
[12] [12]
PEG_RXP3 PEG_RXN3
[12] [12]
Type P/N Gen 3 CH4222K9B04 Gen 1/Gen 2 CH4103K1B08
19 U19G DP POWER
[12] [12]
PEG_TXP1 PEG_TXN1
[12] [12]
PEG_TXP2 PEG_TXN2
[12] [12]
PEG_TXP3 PEG_TXN3
AB30 AA31
Y30 W 31 W 29 V28 V30 U31 U29 T28 T30 R31 R29 P28 P30 N31 N29 M28 M30 L31 L29 K30
PCIE_TX1P PCIE_TX1N
PCIE_RX2P PCIE_RX2N
PCIE_TX2P PCIE_TX2N
PCIE_RX3P PCIE_RX3N
PCIE_TX3P PCIE_TX3N
PCIE_RX4P PCIE_RX4N
PCIE_TX4P PCIE_TX4N
PCIE_RX5P PCIE_RX5N
PCIE_TX5P PCIE_TX5N
PCIE_RX6P PCIE_RX6N PCIE_RX7P PCIE_RX7N NC#V30 NC#U31 NC#U29 NC#T28 NC#T30 NC#R31 NC#R29 NC#P28 NC#P30 NC#N31 NC#N29 NC#M28
PCI EXPRESS INTERFACE
AA29 Y28
PCIE_RX1P PCIE_RX1N
PCIE_TX6P PCIE_TX6N PCIE_TX7P PCIE_TX7N NC#W 24 NC#W 23 NC#V27 NC#U26 NC#U24 NC#U23 NC#T26 NC#T27 NC#T24 NC#T23 NC#P27 NC#P26
NC#M30 NC#L31
NC#P24 NC#P23
NC#L29 NC#K30
NC#M27 NC#N26
AG15 AG16 AF16 AG17 AG18 AG19 AF14
1.8V ( 40mA) +1.8V_VGA
NC/DP POWER
NC_DP_VDDR#1 NC_DP_VDDR#2 NC_DP_VDDR#3 NC_DP_VDDR#4 NC_DP_VDDR#5 NC_DP_VDDR#6 DP_VDDR
NC#AE11 NC#AF11 NC#AE13 NC#AF13 NC#AG8 NC#AG10
NC_DP_VDDC#1 NC_DP_VDDC#2 NC_DP_VDDC#3 NC_DP_VDDC#4 DP_VDDC
NC#AF6 NC#AF7 NC#AF8 NC#AF9
AE11 AF11 AE13 AF13 AG8 AG10
C287 C231 10U/6.3V_6
1U/10V_4
AC25 AB25 Y23 Y24
AG20 AG21 AF22 AG22 AD14
1.0V ( 32mA) +1.0V_VGA C197 *10U/6.3V_6
AB27 AB26
C276 1U/10V_4
AF6 AF7 AF8 AF9
C198 0.1U/16V_4
AG14 AH14 AM14 AM16 AM18 AF23 AG23 AM20 AM22 AM24 AF19 AF20 AE14
Y27 Y26 W 24 W 23 V27 U26
NC_DP_VSSR#1 NC_DP_VSSR#2 NC_DP_VSSR#3 NC_DP_VSSR#4 NC_DP_VSSR#5 NC_DP_VSSR#6 NC_DP_VSSR#7 NC_DP_VSSR#8 NC_DP_VSSR#9 NC_DP_VSSR#10 NC_DP_VSSR#11 NC_DP_VSSR#12 DP_VSSR
NC#AE1 NC#AE3 NC#AG1 NC#AG6 NC#AH5 NC#AF10 NC#AG9 NC#AH8 NC#AM6 NC#AM8 NC#AG7 NC#AG11
NC_UPHYAB_DP_CALR
NC#AE10
AE1 AE3 AG1 AG6 AH5 AF10 AG9 AH8 AM6 AM8 AG7 AG11
U24 U23 AF17
AE10
T26 T27 Meso_S3
T24 T23 P27 P26 P24 P23 M27 N26
12/10:reserve for verify CLOCK CLK_GFX_P CLK_GFX_N
CLK_GFX_P CLK_GFX_N
AK30 AK32
+3V_VGA
PCIE_REFCLKP PCIE_REFCLKN CALIBRATION
PCIE_CALR_TX 1K_4
TEST_PG PEGX_RST#
N10 AL27
TEST_PG
PCIE_CALR_RX
Y22
SUN_PCIE_CALRP
R448
1.69K/F_4
AA22
SUN_PCIE_CALRN
R447
1K/F_4
+1.0V_VGA R460 1K/F_4
PERSTB
PLTRST#
2
DGPU_HIN_RST#
1
3
Meso_S3
PEGX_RST#
+3V_VGA
D13 BAT54AW-L
C587 [4,16,30,32,34,35] [12]
*0.1U/16V_4
U18 *MC74VHC1G08DFT2G
2
PLTRST#
DGPU_HOLD_RST#
[20,22,46] +3V_VGA [20,22,32,44,46] +1.8V_VGA [22,46] +1.0V_VGA
C591 *0.1U/16V_4
5
R233
4 R470
*0_4/S
DGPU_HIN_RST#
0423 change to shortpad
PEGX_RST#
1 3
[13] [13]
PEGX_RST#
[20]
R459 100K/F_4
PROJECT : X1A Quanta Computer Inc. Size
Document Number
Date:
Wednesday, May 13, 2015
Rev 1A
MESO_S3 PCIE/DP power
NB5
Sheet
19of
49
+1.8V_VGA
10/6 : FAE request reserve Pure UMA can remove
VGA_REQ
3
30K/F_4
R511 [12,35,44,46]
C224 0.47U/6.3V_4
Carrizo : PU 8.45K ; PD 2K
2
DGPU_PWROK *10K/F_4
Q38 *METR3904-G
1
10/2 : remove TP for no use +3V_VGA
Thermal Solution(Close to GPU) C350 R253 10K/F_4
VGA_ALERT
R256
*0_4 R248
+3V_VGA [35]
DGPUT_DATA
7
VGA_ALERT_R
6 4
*10K/F_4
1
VCC
SDA
DXP
ALERT#
DXN
OVERT#
GND
+3V_VGA
2
W6 V6
+1.8V_VGA
5
AC5 AC6
9/11: follow CRB change to 10K
C347 *2200P/50V_4
Main:AL000781039
R520 10K_4
G781-1P8(9Ah)
+3V_VGA
U3 Y6
TP114 GPU_AC_BATT
R522
*10K/F_4
DGPU_TDI
R529
*10K/F_4
DGPU_TMS
R528
*10K/F_4
DGPU_TDO
R530
*10K/F_4
DGPU_TRSTB
R524
*10K/F_4
R497
*10K/F_4
R238
*10K/F_4
10K/F_4
R526 R525
4.7K_4 4.7K_4
R195 R223
47K/F_4 47K/F_4
R1 R3
9/4: change to 47K ohm for CRB
DGPU_PROCHOT#
DGPUT_DATA DGPUT_CLK
R230 R231 R232
GPU_AC_BATT
D14
TEMP_FAIL
GPU_AC_BATT
AC_PRESENT_EC
*0_4/S DGPUT_DATA_R *0_4/S DGPUT_CLK_R *0_4/S GPU_GPIO5 GPU_GPIO6 GPIO8_ROMSO GPIO9_ROMSI GPIO10_ROMSCK
TP30 TP26 TP31 TP27 TP116 TP112
*RB500V-40
AMD recommend
0423 change to shortpad R214
Dual 3
4
GPIO22_ROMCS TP32 [35] DGPU_PROCHOT#
DGPUT_DATA R181
TP110
PEGX_RST#
NC#AK6 NC#AM5
DPB
NC#AJ7 NC#AH6
R480 8.45K/F_4
AG3 AG5
PS_0
NC#V4 NC#U5
NC#Y4 NC#W5
NC#AA5 NC#AA6
NC#Y2 NC#J8 NC#U1/BP_0 NC#AA1/PLL_ANALOG_IN NC#AA3/PLL_ANALOG_OUT
NC#U3/BP_1 NC#Y6
C597 *0.01U/50V_4
R476 2K/F_4
R484 2K/F_4
C599 *0.082U/16V_4
AK3 AK1 AK5 AM3
+1.8V_VGA
+1.8V_VGA
AK6 AM5 AJ7 AH6
R496 *0_4
AK8 AL7
R445 4.53K/F_4
PS_2
PS_3
BIT5 => BIT0 R490 4.75K/F_4
NC#AC5 N#CAC6
Beema : PU NC ; PD 4.75K
PS_1
AH3 AH1
DPC
NC#W6 NC#V6
Carrizo-L : PU NC ; PD 4.75K
R488 8.45K/F_4
C603 *0.68U/4V_4
R446 2K/F_4
C582 *0.01U/50V_4
V4 U5
PS0
=>
11001
PS1
=>
11001
PS2
=>
11000
PS3
=>
11000
V2 Y4 W5 Y2 J8 AA1 AA3
R517
TP111
16.2K/F_4
SCL SDA
I2C
Follow AMD check list
1
U8 U7 T9 T8 T7 P10 P4 P2 N6 N5 N3 N1 M4 R6
M2 P8 P7 N8 *0_4 DGPU_PROCHOT#_R AK10 AM10 N7 PCIE_REQ_GPU# L6 DGPU_TRSTB
+3V_VGA
DGPU_TDI DGPU_TCK DGPU_TMS DGPU_TDO TESTEN
TP113 TP118 TP119 TP117
DGPUT_CLK
L5 L3 L1 K4 K7 AF24
Dual Q17B
+3V_VGA
NC_G NC_AVSSN#AJ25 SMBDATA SMBCLK GPIO_5_AC_BATT PCC/GPIO_6 NC_GPIO_7 GPIO_8_ROMSO GPIO_9_ROMSI GPIO_10_ROMSCK NC_GPIO_11 NC_GPIO_12 NC_GPIO_13
NC_B NC_AVSSN#AG25
DAC1
NC_HSYNC NC_VSYNC/WAKEb NC_RSET NC_AVDD NC_AVSSQ
GPIO_15_PWRCNTL_0 GPIO_16 GPIO_17_THERMAL_INT GPIO_19_CTF GPIO_20_PWRCNTL_1 GPIO_21 GPIO_22_ROMCSB GPIO_29 GPIO_30 CLKREQB JTAG_TRSTB
NC_VDD1DI NC_VSS1DI NC NC_SVI2#1/GPIO_SVD NC_SVI2#2/GPIO_SVT NC_SVI2#3/GPIO_SVC
W7 AD10 AJ9 AL9
*0_4/S
JTAG_TDI JTAG_TCK JTAG_TMS JTAG_TDO TESTEN NC#AF24
NC_GENLK_CLK NC_GENLK_VSYNC
DAC2 NC_SWAPLOCKA NC_SWAPLOCKB
NC_GENERICB PS_0 NC_GENERICD NC_GENERICE_HPD4 NC#AJ9 DBG_CNTL0
PS_1 PS_2 PS_3
C584
R467
AL25 AJ25
*10K/F_4
+3V_VGA
AH24 AG25
R465
AH26 AJ27
R462
*4.7K_4
*4.7K_4
Q36
1
AD22 R464 4.7K_4
AG24 AE22
3 *2N7002K
TP106
9/4: follow CRB design by FAE
AE23 AD23
0423 change to shortpad
AM12 AK12 AL11 AJ11
GPU_SVD GPU_SVT GPU_SVC
GPU_SVD
R507
*0_4/S
SVI2_DATA
GPU_SVC
R510
*0_4/S
SVI2_CLK
[44]
GPU_SVT
R508
*0_4/S
SVI2_SVT
[44]
[44]
AL13 AJ13 +3V_VGA
AG13 AH12
1K/F_4 R236
12P/50V_4
PX_EN
TP109
AB16
PX_EN
TS_A
AC19
PS_1
AE17
PS_2
AE20 AE19
DGPU_OCP_L
[44]
*10K/F_4 GPU_SVD R501
*10K/F_4
R509
*10K/F_4 GPU_SVC R505
*10K/F_4
R504
*10K/F_4 GPU_SVT R502
*10K/F_4
0.1U/16V_4
PS_3 R487
R500
C338
PS_0
AD19
+1.8V_VGA
R244 10K/F_4
GPU_GPIO6
0423 change to shortpad R243 *5.1K/F_4
AM26 AK26
*2N7002KDW
W8 R221
DCM/NC_R NC_AVSSN#AK26
GPIO_0
[19]
9/9: follow AMD CRB design
*4.7K_4
2 6
GPUT_CLK
R498
TP120
*0_4
R194
GPUT_CLK
U6
TEMP_FAIL
*2N7002KDW
5
GPUT_DATA
VGA_ALERT
*0_4/S
Q17A
[35]
NC#AK5 NC#AM3
GENERAL PURPOSE I/O
0423 change to shortpad
PCIE_REQ_GPU#
GPUT_DATA
NC#AK3 NC#AK1
+3V_VGA
[4,35]
[35]
NC#AH3 NC#AH1
AF2 AF4
+3V_VGA
[35]
R527
AA5 AA6
U1
TP115
10K/F_4
NC#AG3 NC#AG5
NC#V2 R521 10K_4
*G781-1P8
R237
DPA
GPU_THERMDA
3
GPU_THERMDC
DGPU_OVT#
DBG_DATA16 DBG_DATA15 DBG_DATA14 DBG_DATA13 DBG_DATA12 DBG_DATA11 DBG_DATA10 DBG_DATA9 DBG_DATA8 DBG_DATA7 DBG_DATA6 DBG_DATA5 DBG_DATA4 DBG_DATA3 DBG_DATA2 DBG_DATA1 DBG_DATA0
NC#AK8 NC#AL7
9/2: modify to +3V_VGA
SCLK
N9 L9 AE9 Y11 AE8 AD9 AC10 AD7 AC8 AC7 AB9 AB8 AB7 AB4 AB2 Y8 Y7
*0.01U/50V_4
U9
8
DGPUT_CLK
NC#AF2 NC#AF4
2
DGPU_PWR_EN
20
10/1 : Gen 3 support or not
[13]
DVO
Q12 DRC5144E0L
1
[12,44,46]
2
+1.8V_VGA
U19B
PCIE_CLKREQ_VGA#
D15 RB500V-40
3 R156
PCIE_CLKREQ_VGA#
9/11: Add for SR Tool review result *0_4
Reserved. Do not connect on the PCB
EVGA-XTALI
2 1
AC16
NC_DBG_VREFG
Y3
TESTEN
4 3
R454 1M_4 R245 1K/F_4
C586
DDC/AUX
27MHZ +-10PPM
PLL/CLOCK EVGA-XTALO
NC_AUX1P NC_AUX1N
12P/50V_4 EVGA-XTALI EVGA-XTALO
9/2: follow Ref SCH by FAE R474 R469
EC_WRST
[35]
HCB1608KF-121T30(120+-25%,3A)
GPU_THERMDA GPU_THERMDC
AC22 AB22
T4 T2
1U/10V_4
+1.8V_TSVDD
R5 AD17 AC17
AD2 AD4
XTALIN XTALOUT NC_AUX2P NC_AUX2N
XO_IN XO_IN2
DPLUS DMINUS
Vendor
Type
Vendor P/N
PU
PD
000
Hynix
256Mx16 *4, 900Mhz
H5TC4G63CFR-N0C
NC
001
Samsung
256Mx16 *4, 900Mhz
K4W4G1646E-BC1A
8.45K
4.75K 2K
010
Micron
256Mx16 *4, 900Mhz
MT41J256M16HA-093G:E
4.53K
2K
011
THERMAL
NC#AE16 NC#AD16 NC_DDCVGACLK NC_DDCVGADATA
C263 Q19 *2N7002K
2
10K/F_4 10K/F_4
AM28 AK28
PS_3[3:1]
AE6 AE5
GPIO28_FDO TSVDD TSVSS
AD13 AD11
100 101
AE16 AD16 AC1 AC3
TP29 TP28
For AMD tuning timing purpose
1
TEMP_FAIL
1.8V(13mA TSVDD)
L13
3
+1.8V_VGA
NC_DDC1CLK NC_DDC1DATA
PROJECT : X1A Quanta Computer Inc.
Meso_S3 [32]
CLK_27M_XTAL_IN
R453
*0_4 EVGA-XTALI +1.8V_VGA +1.0V_VGA
[19,22,32,44,46] [19,22,46]
Size
Document Number
Rev 1A
MESO_S3_Main
NB5 Date:
Wednesday, May 13, 2015
Sheet
20of
49
21
U19E U19F
AA27 AB24 AB32 AC24 AC26 AC27 AD25 AD32 AE27 AF32 AG27 AH32 K28 K32 L27 M32 N25 N27 P25 P32 R27 T25 T32 U25 U27 V32 W25 W26 W27 Y25 Y32
M6 N11 N13 N16 N18 N21 P6 P9 R12 R15 R17 R20 T13 T16 T18 T21 T6 U15 U17 U20 U9 V13 V16 V18 Y10 Y15 Y17 Y20 AA11 M12 V11
PCIE_VSS#1 PCIE_VSS#2 PCIE_VSS#3 PCIE_VSS#4 PCIE_VSS#5 PCIE_VSS#6 PCIE_VSS#7 PCIE_VSS#8 PCIE_VSS#9 PCIE_VSS#10 PCIE_VSS#11 PCIE_VSS#12 PCIE_VSS#13 PCIE_VSS#14 PCIE_VSS#15 PCIE_VSS#16 PCIE_VSS#17 PCIE_VSS#18 PCIE_VSS#19 PCIE_VSS#20 PCIE_VSS#21 PCIE_VSS#22 PCIE_VSS#23 PCIE_VSS#24 PCIE_VSS#25 PCIE_VSS#26 PCIE_VSS#27 PCIE_VSS#28 PCIE_VSS#29 PCIE_VSS#30 PCIE_VSS#31
GND#56 GND#57 GND#58 GND#59 GND#60 GND#61 GND#62 GND#63 GND#64 GND#65 GND#66 GND#67 GND#68 GND#69 GND#70 GND#71 GND#72 GND#73 GND#74 GND#75 GND#76 GND#77 GND#78 GND#79 GND#80 GND#81 GND#82 GND#83 GND#86 GND#87 GND#88
GND
GND#1 GND#2 GND#3 GND#4 GND#5 GND#6 GND#7 GND#8 GND#9 GND#10 GND#11 GND#12 GND#13 GND#14 GND#15 GND#16 GND#17 GND#18 GND#19 GND#20 GND#21 GND#22 GND#23 GND#24 GND#25 GND#26 GND#27 GND#28 GND#29 GND#30 GND#31 GND#32 GND#33 GND#34 GND#35 GND#36 GND#37 GND#38 GND#39 GND#40 GND#41 GND#42 GND#43 GND#44 GND#45 GND#46 GND#47 GND#48 GND#49 GND#50 GND#51 GND#52 GND#53 GND#54 GND#55 GND#84 GND#85
VSS_MECH#1 VSS_MECH#2 VSS_MECH#3
A3 A30 AA13 AA16 AB10 AB15 AB6 AC9 AD6 AD8 AE7 AG12 AH10 AH28 B10 B12 B14 B16 B18 B20 B22 B24 B26 B6 B8 C1 C32 E28 F10 F12 F14 F16 F18 F2 F20 F22 F24 F26 F6 F8 G10 G27 G31 G8 H14 H17 H2 H20 H6 J27 J31 K11 K2 K22 K6 T11 R11
LVDS CONTROL
CONFIGURATION STRAPS-- SEE EACH DATABOOK FOR STRAP DETAILS NC_UPHYAB_TMDPA_TX0N NC_UPHYAB_TMDPA_TX0P NC_UPHYAB_TMDPA_TX1N NC_UPHYAB_TMDPA_TX1P NC_UPHYAB_TMDPA_TX2N NC_UPHYAB_TMDPA_TX2P NC_UPHYAB_TMDPA_TX3N NC_UPHYAB_TMDPA_TX3P NC_TXOUT_L3P NC_TXOUT_L3N
AL15 AK14 AH16 AJ15 AL17 AK16
ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED, THEY MUST NOT CONFLICT DURING RESET STRAPS
PIN
RECOMMENDED SETTINGS 0= DO NOT INSTALL RESISTOR 1 = INSTALL 3K RESISTOR X = DESIGN DEPENDANT NA = NOT APPLICABLE
DESCRIPTION OF DEFAULT SETTINGS
TX_PW RS_ENB
GPIO0
PCIE FULL TX OUTPUT SW ING
TX_DEEMPH_EN
GPIO1
PCIE TRANSMITTER DE-EMPHASIS ENABLED
RSVD RSVD
GPIO2 GPIO8
RESERVED RESERVED
0 0
BIF_VGA DIS
GPIO9
VGA ENABLED
0
RESERVED
0
0
AH18 AJ17 AL19 AK18
X
TMDP
NC_UPHYAB_TMDPB_TX0N NC_UPHYAB_TMDPB_TX0P NC_UPHYAB_TMDPB_TX1N NC_UPHYAB_TMDPB_TX1P NC_UPHYAB_TMDPB_TX2N NC_UPHYAB_TMDPB_TX2P NC_UPHYAB_TMDPB_TX3N NC_UPHYAB_TMDPB_TX3P NC_TXOUT_U3P NC_TXOUT_U3N
AH20 AJ19
RSVD
AL21 AK20
BIOS_ROM_EN
AH22 AJ21
ROMIDCFG(2:0)
AL23 AK22
VIP_DEVICE_STRAP_ENA
AK24 AJ23
GPIO21 GPIO_22_ROMCSB GPIO[13:11] V2SYNC
ENABLE EXTERNAL BIOS ROM
0
SERIAL ROM TYPE OR MEMORY APERTURE SIZE SELECT
0 0 1
IGNORE VIP DEVICE STRAPS (Removed on Seymour/W histler)
0
RSVD
H2SYNC
RESERVED
0
AUD[1] AUD[0]
HSYNC VSYNC
SEE DATABOOK FOR DETAIL SEE DATABOOK FOR DETAIL
0 0
RSVD
GENERICC
RESERVED
0
Meso_S3
NOTE1: AMD RESERVED CONFIGURATION STRAPS ALLOW FOR PULLUP PADS FOR THESE STRAPS BUT DO NOT INSTALL RESISTOR. IF THESE GPIOS ARE USED, THEY MUST KEEP "LOW" AND NOT CONFLICT DURING RESET. GPIO21
H2SYNC
GENERICC
GPIO8
GPIO2
A32 AM1 AM32
Meso_S3
PROJECT : X1A Quanta Computer Inc. Size
Document Number
MESO_S3_GND/LVDS/Strap
NB5 Date:
Wednesday, May 13, 2015
Sheet
21 of
Rev 1A 49
22
U19D
+1.35V_VGA C226 C256 10U/6.3VS_6 2.2U/6.3V_4
C284 2.2U/6.3V_4
C245 2.2U/6.3V_4
C251 2.2U/6.3V_4
C266 2.2U/6.3V_4
C277 C233 0.1U/16V_4 0.01U/50V_4
LEVEL TRANSLATION
+1.8V_VGA
AA20 AA21 AB20 AB21
VDD_GPIO18 @13mA C248 1U/10V_4
L16
V12 Y12 U12
*BLM18PG181SN1D(180,1.5A)_S0_6/S
MPV18
C341 10U/6.3VS_6
C342 10U/6.3VS_6
PLL
Engine Phase Lock Loop Power : analog power pin for engine PLL 1.8V @ 75mA L18
NC_VDDR4#1 NC_VDDR4#2 NC_VDDR4#3
Memory Phase Lock Loop Power : 1.8V @ 90mA
C306 1U/10V_4
+1.8V_VGA
I/O VDDR3#1 VDDR3#2 VDDR3#3 VDDR3#4
HCB1608KF-121T30(120+-25%,3A) SPV18 C383 1U/10V_4
MPV18
L8
SPV18
H7
Engine Phase Lock Loop Power : digital power pin for engine PLL 0.95V @ 100mA +1.0V_VGA
L15
MPLL_PVDD
C370 10U/6.3VS_6
PCIE_VDDC#1 PCIE_VDDC#2 PCIE_VDDC#3 PCIE_VDDC#4 PCIE_VDDC#5 PCIE_VDDC#6 PCIE_VDDC#7 PCIE_VDDC#8 PCIE_VDDC#9 PCIE_VDDC#10 PCIE_VDDC#11 PCIE_VDDC#12 VDDC#1 VDDC#2 VDDC#3 VDDC#4 VDDC#5 VDDC#6 VDDC#7 VDDC#8 VDDC#9 VDDC#10 VDDC#11 VDDC#12 VDDC#13 VDDC#14 VDDC#15 VDDC#16 VDDC#17 VDDC#18 VDDC#20 VDDC#21 VDDC#22 VDDC#23 VDDC#24 VDDC#25 VDDC#26 VDDC/VARY_BL VDDC/DIGON VDDC/GENERICA VDDC/GENERICC VDDC/DDC2CLK VDDC/DDC2DATA VDDC/HPD1 VDDC/GPIO_1 VDDC/GPIO_2 VDDC/GPIO_18 VDDC/GPIO_14_HPD2 CORE
BIF_VDDC_1 BIF_VDDC_2 ISOLATED CORE I/O
HCB1608KF-121T30(120+-25%,3A) +1.0V_VGA_SPV10 C339
SPLL_PVDD
NC#AB23 NC#AC23 NC#AD24 NC#AE24 NC#AE25 NC#AE26 NC#AF25 NC#AG26
POWER
AA17 AA18 AB17 AB18
C259 1U/10V_4
+1.8V_VGA
VDD_CT#1 VDD_CT#2 VDD_CT#3 VDD_CT#4
+3V_VGA
VDD_GPIO33@25mA
0423 change to shortpad
VDDR1#1 VDDR1#2 VDDR1#3 VDDR1#4 VDDR1#5 VDDR1#6 VDDR1#7 VDDR1#8 VDDR1#9 VDDR1#10 VDDR1#11 VDDR1#12 VDDR1#13 VDDR1#14 VDDR1#15 VDDR1#16 VDDR1#17
PCIE_PVDD PCIE
C345 1U/10V_4
H8 J7
SPLL_VDDC SPLL_PVSS
0.1U/16V_4
VDDCI#1 VDDCI#2 VDDCI#3 VDDCI#4 VDDCI#5 VDDCI#6 VDDCI#7 VDDCI#8
NC#W1/FB_VDDCI NC#W3/FB_VSS NC#FB_VDDC NC#FB_VSS Meso_S3
PCIE_VDDR : 1.8V @ 100mA
AM30
+1.8V_VGA
AB23 AC23 AD24 AE24 AE25 AE26 AF25 AG26
C241 1U/10V_4
L23 L24 L25 L26 M22 N22 N23 N24 R22 T22 U22 V22
+1.0V_VGA
PCIE_VDDC : 0.95V @ 2.5A (GEN3.0)
C199 1U/10V_4
C225 1U/10V_4
C234 1U/10V_4
C220 1U/10V_4
C232 1U/10V_4
C244 1U/10V_4
C246 10U/6.3VS_6
TDP=25W/TDC=36A/EDC=TDCx1.5=54A(1ms)/EDP=35W(sustained)/Peak=53W(1ms) +VGA_CORE VDDC+VDDCI 0.85~1.1V(36A peak )( Ripple < 87.2mV)
AA15 N15 N17 R13 R16 R18 Y21 T12 T15 T17 T20 U13 U16 U18 V21 V15 V17 V20 Y13 Y16 Y18 AA12 M11 N12 U11 AB11 AB12 AB13 W9 AC11 AC13 AC14 U10 T10 W10 Y9 R21 U21
C223 10U/6.3VS_6
C252 C331 C298 C292 C318 C332 C283 C330 2.2U/6.3V_4 2.2U/6.3V_4 2.2U/6.3V_4 2.2U/6.3V_4 2.2U/6.3V_4 2.2U/6.3V_4 2.2U/6.3V_4 2.2U/6.3V_4
C280 C250 C288 C294 C308 C296 C299 C311 2.2U/6.3V_4 2.2U/6.3V_4 2.2U/6.3V_4 2.2U/6.3V_4 2.2U/6.3V_4 2.2U/6.3V_4 2.2U/6.3V_4 2.2U/6.3V_4
1
H13 H16 H19 J10 J23 J24 J9 K10 K23 K24 K9 L11 L12 L13 L20 L21 L22
+ C302 C290 C324 C326 C360 C327 10U/6.3VS_6 10U/6.3VS_6 10U/6.3VS_6 10U/6.3VS_6 10U/6.3VS_6 10U/6.3VS_6
2
MEM I/O
1.35V ( DDR3, MVDDQ = 1.35V@2A)
C265 330U_2.5V_3528
0.95V~1.1V(0.8A) +1.0V_VGA
M13 M15 M16 M17 M18 M20 M21 N20
0.95V~1.1V(5A VDDCI) +VGA_CORE C282 C301 C369 0.1U/16V_4 0.1U/16V_4 1U/10V_4
W1 W3
R519 R518
*0_4 *0_4
AC20 AD20
R184 R177
*0_4/S *0_4/S
C307 1U/10V_4
C242 C325 C323 1U/10V_4 10U/6.3VS_610U/6.3VS_6
+VGA_CORE
VGPU_CORE_SENSE [44] VSS_GPU_SENSE [44]
0423 change to shortpad
+1.35V_VGA [23,24,44] +1.8V_VGA [19,20,32,44,46] +1.0V_VGA [19,46] +VGA_CORE [44,45]
PROJECT : X1A Quanta Computer Inc. Size
Document Number
Rev 1A
MESO_S3 Power
NB5 Date:
Wednesday, May 13, 2015
Sheet
22 of
49
23
U19C
[24] [24]
VMA_RAS0# VMA_RAS1#
VMA_RAS0# VMA_RAS1#
[24] [24]
VMA_CAS0# VMA_CAS1#
VMA_CAS0# VMA_CAS1#
VMA_W E0# VMA_W E1#
VMA_W E0# VMA_W E1#
[24] [24] [24]
VMA_CSA0#_0
VMA_CSA0#_0
[24]
VMA_CSA1#_0
VMA_CSA1#_0
VMA_CKE0 VMA_CKE1
VMA_CKE0 VMA_CKE1
[24] [24]
VMA_CLK0 VMA_CLK0#
VMA_CLK0 VMA_CLK0#
[24] [24]
VMA_CLK1 VMA_CLK1#
[24] [24]
[24]
VMA_CLK1 VMA_CLK1# VMA_W DQS[7..0]
VMA_W DQS[7..0]
[24]
VMA_RDQS[7..0]
VMA_RDQS[7..0]
[24]
VMA_DM[7..0]
VMA_DM[7..0]
[24]
VMA_DQ[63..0]
[24]
VMA_MA[15..0] [24] [24] [24]
VMA_DQ0 VMA_DQ1 VMA_DQ2 VMA_DQ3 VMA_DQ4 VMA_DQ5 VMA_DQ6 VMA_DQ7 VMA_DQ8 VMA_DQ9 VMA_DQ10 VMA_DQ11 VMA_DQ12 VMA_DQ13 VMA_DQ14 VMA_DQ15 VMA_DQ16 VMA_DQ17 VMA_DQ18 VMA_DQ19 VMA_DQ20 VMA_DQ21 VMA_DQ22 VMA_DQ23 VMA_DQ24 VMA_DQ25 VMA_DQ26 VMA_DQ27 VMA_DQ28 VMA_DQ29 VMA_DQ30 VMA_DQ31 VMA_DQ32 VMA_DQ33 VMA_DQ34 VMA_DQ35 VMA_DQ36 VMA_DQ37 VMA_DQ38 VMA_DQ39 VMA_DQ40 VMA_DQ41 VMA_DQ42 VMA_DQ43 VMA_DQ44 VMA_DQ45 VMA_DQ46 VMA_DQ47 VMA_DQ48 VMA_DQ49 VMA_DQ50 VMA_DQ51 VMA_DQ52 VMA_DQ53 VMA_DQ54 VMA_DQ55 VMA_DQ56 VMA_DQ57 VMA_DQ58 VMA_DQ59 VMA_DQ60 VMA_DQ61 VMA_DQ62 VMA_DQ63
VMA_DQ[63..0] VMA_MA[15..0]
VMA_BA0 VMA_BA1 VMA_BA2
VMA_BA0 VMA_BA1 VMA_BA2
support 1Gbit VRAM ( 64M X 16 )
+1.35V_VGA
R119 40.2/F_4
K27 J29 H30 H32 G29 F28 F32 F30 C30 F27 A28 C28 E27 G26 D26 F25 A25 C25 E25 D24 E23 F23 D22 F21 E21 D20 F19 A19 D18 F17 A17 C17 E17 D16 F15 A15 D14 F13 A13 C13 E11 A11 C11 F11 A9 C9 F9 D8 E7 A7 C7 F7 A5 E5 C3 E1 G7 G6 G1 G3 J6 J1 J3 J5 K26 J26
MVREFD +1.35V_VGA C177
R125
1U/10V_4
100/F_4
Rd
R133
J25 K25
120/F_4
DQA0_0 DQA0_1 DQA0_2 DQA0_3 DQA0_4 DQA0_5 DQA0_6 DQA0_7 DQA0_8 DQA0_9 DQA0_10 DQA0_11 DQA0_12 DQA0_13 DQA0_14 DQA0_15 DQA0_16 DQA0_17 DQA0_18 DQA0_19 DQA0_20 DQA0_21 DQA0_22 DQA0_23 DQA0_24 DQA0_25 DQA0_26 DQA0_27 DQA0_28 DQA0_29 DQA0_30 DQA0_31 DQA1_0 DQA1_1 DQA1_2 DQA1_3 DQA1_4 DQA1_5 DQA1_6 DQA1_7 DQA1_8 DQA1_9 DQA1_10 DQA1_11 DQA1_12 DQA1_13 DQA1_14 DQA1_15 DQA1_16 DQA1_17 DQA1_18 DQA1_19 DQA1_20 DQA1_21 DQA1_22 DQA1_23 DQA1_24 DQA1_25 DQA1_26 DQA1_27 DQA1_28 DQA1_29 DQA1_30 DQA1_31 MVREFDA MVREFSA NC MEM_CALRP0
MAA1_0 MAA1_1 MAA1_2 MAA1_3 MAA1_4 MAA1_5 MAA1_6 MAA1_7 MMA1_8 MAA1_9 WCKA0_0 WCKA0B_0 WCKA0_1 WCKA0B_1 WCKA1_0 WCKA1B_0 WCKA1_1 WCKA1B_1 EDCA0_0 EDCA0_1 EDCA0_2 EDCA0_3 EDCA1_0 EDCA1_1 EDCA1_2 EDCA1_3 DDBIA0_0 DDBIA0_1 DDBIA0_2 DDBIA0_3 DDBIA1_0 DDBIA1_1 DDBIA1_2 DDBIA1_3 ADBIAO ADBIA1 CLKA0 CLKA0B CLKA1 CLKA1B RASA0B RASA1B CASA0B CASA1B CSA0B_0 CSA0B_1 CSA1B_0 CSA1B_1 CKEA0 CKEA1
R124 40.2/F_4 DRAM_RST_C L10 MVREFS CLKTESTA CLKTESTB
C187
MAA0_0 MAA0_1 MAA0_2 MAA0_3 MAA0_4 MAA0_5 MAA0_6 MAA0_7 MAA0_8 MAA0_9
K8 L7
DRAM_RST
WEA0B WEA1B
K17 J20 H23 G23 G24 H24 J19 K19 G20 L17
VMA_MA0 VMA_MA1 VMA_MA2 VMA_MA3 VMA_MA4 VMA_MA5 VMA_MA6 VMA_MA7 VMA_MA13 VMA_MA15
J14 K14 J11 J13 H11 G11 J16 L15 G14 L16
VMA_MA8 VMA_MA9 VMA_MA10 VMA_MA11 VMA_MA12 VMA_BA2 VMA_BA0 VMA_BA1 VMA_MA14
E32 E30 A21 C21 E13 D12 E3 F4
VMA_DM0 VMA_DM1 VMA_DM2 VMA_DM3 VMA_DM4 VMA_DM5 VMA_DM6 VMA_DM7
H28 C27 A23 E19 E15 D10 D6 G5
VMA_RDQS0 VMA_RDQS1 VMA_RDQS2 VMA_RDQS3 VMA_RDQS4 VMA_RDQS5 VMA_RDQS6 VMA_RDQS7
H27 A27 C23 C19 C15 E9 C5 H4
VMA_W DQS0 VMA_W DQS1 VMA_W DQS2 VMA_W DQS3 VMA_W DQS4 VMA_W DQS5 VMA_W DQS6 VMA_W DQS7
L18 K16
VMA_ODT0 VMA_ODT1
H26 H25
VMA_CLK0 VMA_CLK0#
G9 H9
VMA_CLK1 VMA_CLK1#
G22 G17
VMA_RAS0# VMA_RAS1#
G19 G16
VMA_CAS0# VMA_CAS1#
H22 J22
VMA_CSA0#_0
G13 K13
VMA_CSA1#_0
K20 J17
VMA_CKE0 VMA_CKE1
G25 H10
VMA_W E0# VMA_W E1#
From GPU
VMA_ODT0 VMA_ODT1
VMA_ODT0 VMA_ODT1
MEMORY INTERFACE
[24] [24]
25mm (max) DRAM_RST_C
5mm (max) R250
25mm (max)
10/F_4 R247
51_4
R246
C352
4.99K/F_4
120P/50V_4
DRAM_RST_M
[24]
Place all these components very close to GPU (Within 25mm) and keep all component close to each Other (within 5mm) except Rser2 This basic topology should be used for DRAM_RST for DDR3/GDDR5.These Capacitors and Resistor values are an example only. The Series R and || Cap values will depend on the DRAM load and will have to be calculated for different Memory ,DRAM Load and board to pass Reset Signal Spec.
CLKTESTA CLKTESTB
R129 Meso_S3
1U/10V_4
100/F_4 C340 *0.1U/16V_4
R234 *51.1/F_4
+1.35V_VGA
[22,24,44]
C349 *0.1U/16V_4
R239 *51.1/F_4
route 50ohms single-ended/100ohms diff and keep short
PROJECT : X1A Quanta Computer Inc. Size
Document Number
Rev 1A
MESO_S3_MEM_Interface
NB5 Date:
Wednesday, May 13, 2015
Sheet
23 of
49
5
4
VMA_MA[15..0]
[23] VMA_MA[15..0] [23] VMA_DM[7..0]
D
[23] [23] [23]
M8 H1
VMA_MA0 VMA_MA1 VMA_MA2 VMA_MA3 VMA_MA4 VMA_MA5 VMA_MA6 VMA_MA7 VMA_MA8 VMA_MA9 VMA_MA10 VMA_MA11 VMA_MA12 VMA_MA13 VMA_MA14 VMA_MA15
N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 T7 M7 M2 N8 M3
VMA_BA0 VMA_BA1 VMA_BA2
J7 K7 K9
[23] VMA_CLK0 [23] VMA_CLK0# [23] VMA_CKE0
K1 L2 J3 K3 L3
[23] VMA_ODT0 [23] VMA_CSA0#_0 [23] VMA_RAS0# [23] VMA_CAS0# [23] VMA_WE0# VMA_RDQS2 VMA_WDQS2
F3 G3
VMA_DM2 VMA_DM1
E7 D3
VMA_RDQS1 VMA_WDQS1
C7 B7
C
[23]
T2
DRAM_RST_M VMA_ZQ1
L8
U20
VREFCA VREFDQ
DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 A14 A15
DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7
D7 C3 C8 C2 A7 A2 B8 A3
VMA_DQ19 VMA_DQ18 VMA_DQ23 VMA_DQ17 VMA_DQ22 VMA_DQ20 VMA_DQ21 VMA_DQ16 VMA_DQ11 VMA_DQ14 VMA_DQ9 VMA_DQ13 VMA_DQ10 VMA_DQ15 VMA_DQ8 VMA_DQ12
VREFC_VMA2 VREFD_VMA2
M8 H1
VMA_MA0 VMA_MA1 VMA_MA2 VMA_MA3 VMA_MA4 VMA_MA5 VMA_MA6 VMA_MA7 VMA_MA8 VMA_MA9 VMA_MA10 VMA_MA11 VMA_MA12 VMA_MA13 VMA_MA14 VMA_MA15
N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 T7 M7
VMA_BA0 VMA_BA1 VMA_BA2
M2 N8 M3
VMA_CLK0 VMA_CLK0# VMA_CKE0
J7 K7 K9
+1.35V_VGA
BA0 BA1 BA2
VDD#B2 VDD#D9 VDD#G7 VDD#K2 VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9
CK CK CKE ODT CS RAS CAS WE
VDDQ#A1 VDDQ#A8 VDDQ#C1 VDDQ#C9 VDDQ#D2 VDDQ#E9 VDDQ#F1 VDDQ#H2 VDDQ#H9
DQSL DQSL DML DMU
VSS#A9 VSS#B3 VSS#E1 VSS#G8 VSS#J2 VSS#J8 VSS#M1 VSS#M9 VSS#P1 VSS#P9 VSS#T1 VSS#T9
DQSU DQSU
RESET ZQ
Should be 240 Ohms +-1%
VSSQ#B1 VSSQ#B9 VSSQ#D1 VSSQ#D8 VSSQ#E2 VSSQ#E8 VSSQ#F9 VSSQ#G1 VSSQ#G9
R173 243/F_4 J1 L1 J9 L9
E3 F7 F2 F8 H3 H8 G2 H7
NC#J1 NC#L1 NC#J9 NC#L9
B2 D9 G7 K2 K8 N1 N9 R1 R9 +1.35V_VGA A1 A8 C1 C9 D2 E9 F1 H2 H9
VMA_ODT0 VMA_CSA0#_0 VMA_RAS0# VMA_CAS0# VMA_WE0#
K1 L2 J3 K3 L3
VMA_RDQS0 VMA_WDQS0
F3 G3
A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9
VMA_DM0 VMA_DM3
E7 D3
VMA_RDQS3 VMA_WDQS3
C7 B7
DRAM_RST_M
T2
VMA_ZQ2
L8
J1 L1 J9 L9
DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 A14 A15
DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7
VDD#B2 VDD#D9 VDD#G7 VDD#K2 VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9
CK CK CKE ODT CS RAS CAS WE
VDDQ#A1 VDDQ#A8 VDDQ#C1 VDDQ#C9 VDDQ#D2 VDDQ#E9 VDDQ#F1 VDDQ#H2 VDDQ#H9
DQSL DQSL DML DMU
VSS#A9 VSS#B3 VSS#E1 VSS#G8 VSS#J2 VSS#J8 VSS#M1 VSS#M9 VSS#P1 VSS#P9 VSS#T1 VSS#T9
DQSU DQSU
RESET ZQ
NC#J1 NC#L1 NC#J9 NC#L9
E3 F7 F2 F8 H3 H8 G2 H7
VMA_DQ7 VMA_DQ5 VMA_DQ3 VMA_DQ2 VMA_DQ6 VMA_DQ0 VMA_DQ4 VMA_DQ1
D7 C3 C8 C2 A7 A2 B8 A3
VMA_DQ28 VMA_DQ29 VMA_DQ30 VMA_DQ24 VMA_DQ27 VMA_DQ26 VMA_DQ31 VMA_DQ25
VREFC_VMA3 VREFD_VMA3
M8 H1
1
24
VMA_MA0 VMA_MA1 VMA_MA2 VMA_MA3 VMA_MA4 VMA_MA5 VMA_MA6 VMA_MA7 VMA_MA8 VMA_MA9 VMA_MA10 VMA_MA11 VMA_MA12 VMA_MA13 VMA_MA14 VMA_MA15
N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 T7 M7
VSSQ#B1 VSSQ#B9 VSSQ#D1 VSSQ#D8 VSSQ#E2 VSSQ#E8 VSSQ#F9 VSSQ#G1 VSSQ#G9
B2 D9 G7 K2 K8 N1 N9 R1 R9
VMA_BA0 VMA_BA1 VMA_BA2
M2 N8 M3
+1.35V_VGA A1 A8 C1 C9 D2 E9 F1 H2 H9 A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9
VMA_RDQS7 VMA_WDQS7
F3 G3
VMA_DM7 VMA_DM5
E7 D3
VMA_RDQS5 VMA_WDQS5
C7 B7
DRAM_RST_M
T2
VMA_ZQ3
L8
+1.35V_VGA
VDDQ#A1 VDDQ#A8 VDDQ#C1 VDDQ#C9 VDDQ#D2 VDDQ#E9 VDDQ#F1 VDDQ#H2 VDDQ#H9
DQSL DQSL DML DMU
VSS#A9 VSS#B3 VSS#E1 VSS#G8 VSS#J2 VSS#J8 VSS#M1 VSS#M9 VSS#P1 VSS#P9 VSS#T1 VSS#T9
DQSU DQSU
RESET ZQ
R225 243/F_4 J1 L1 J9 L9
96-BALL SDRAM DDR3 INT H5TC4G63CFR-N0C +1.35V_VGA
CK CK CKE ODT CS RAS CAS WE
NC#J1 NC#L1 NC#J9 NC#L9
E3 F7 F2 F8 H3 H8 G2 H7
VMA_DQ60 VMA_DQ58 VMA_DQ62 VMA_DQ57 VMA_DQ61 VMA_DQ56 VMA_DQ63 VMA_DQ59
VREFC_VMA4 VREFD_VMA4
M8 H1
VMA_MA0 VMA_MA1 VMA_MA2 VMA_MA3 VMA_MA4 VMA_MA5 VMA_MA6 VMA_MA7 VMA_MA8 VMA_MA9 VMA_MA10 VMA_MA11 VMA_MA12 VMA_MA13 VMA_MA14 VMA_MA15
N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 T7 M7
D7 C3 C8 C2 A7 A2 B8 A3
VMA_DQ43 VMA_DQ46 VMA_DQ40 VMA_DQ47 VMA_DQ41 VMA_DQ45 VMA_DQ42 VMA_DQ44
VMA_BA0 VMA_BA1 VMA_BA2
M2 N8 M3
VMA_CLK1 VMA_CLK1# VMA_CKE1
J7 K7 K9
A1 A8 C1 C9 D2 E9 F1 H2 H9
VMA_ODT1 VMA_CSA1#_0 VMA_RAS1# VMA_CAS1# VMA_WE1#
K1 L2 J3 K3 L3
VMA_RDQS6 VMA_WDQS6
F3 G3
A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9
VMA_DM6 VMA_DM4
E7 D3
VMA_RDQS4 VMA_WDQS4
C7 B7
DRAM_RST_M
T2
VMA_ZQ4
L8
+1.35V_VGA VDD#B2 VDD#D9 VDD#G7 VDD#K2 VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9
Should be 240 Ohms +-1%
B1 B9 D1 D8 E2 E8 F9 G1 G9
DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7
BA0 BA1 BA2
K1 L2 J3 K3 L3
[23] VMA_ODT1 [23] VMA_CSA1#_0 [23] VMA_RAS1# [23] VMA_CAS1# [23] VMA_WE1#
DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 A14 A15
J7 K7 K9
[23] VMA_CLK1 [23] VMA_CLK1# [23] VMA_CKE1
U22
VREFCA VREFDQ
+1.35V_VGA
BA0 BA1 BA2
R506 243/F_4
96-BALL SDRAM DDR3 H5TC4G63CFR-N0C +1.35V_VGA
U8
VREFCA VREFDQ
Should be 240 Ohms +-1%
B1 B9 D1 D8 E2 E8 F9 G1 G9
2
1G/2G DDR3L
U6 VREFC_VMA1 VREFD_VMA1
3
[23] VMA_DQ[63..0] [23] VMA_WDQS[7..0] [23] VMA_RDQS[7..0]
VSSQ#B1 VSSQ#B9 VSSQ#D1 VSSQ#D8 VSSQ#E2 VSSQ#E8 VSSQ#F9 VSSQ#G1 VSSQ#G9
B2 D9 G7 K2 K8 N1 N9 R1 R9 +1.35V_VGA
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 A14 A15 BA0 BA1 BA2
B1 B9 D1 D8 E2 E8 F9 G1 G9
CK CK CKE ODT CS RAS CAS WE DQSL DQSL DML DMU DQSU DQSU
RESET ZQ
NC#J1 NC#L1 NC#J9 NC#L9
E3 F7 F2 F8 H3 H8 G2 H7
VMA_DQ53 VMA_DQ54 VMA_DQ49 VMA_DQ55 VMA_DQ50 VMA_DQ51 VMA_DQ48 VMA_DQ52
D7 C3 C8 C2 A7 A2 B8 A3
VMA_DQ37 VMA_DQ32 VMA_DQ38 VMA_DQ33 VMA_DQ36 VMA_DQ34 VMA_DQ39 VMA_DQ35
D
DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7
+1.35V_VGA
VDDQ#A1 VDDQ#A8 VDDQ#C1 VDDQ#C9 VDDQ#D2 VDDQ#E9 VDDQ#F1 VDDQ#H2 VDDQ#H9
R533 243/F_4 J1 L1 J9 L9
DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7
VDD#B2 VDD#D9 VDD#G7 VDD#K2 VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9
Should be 240 Ohms +-1%
96-BALL SDRAM DDR3 H5TC4G63CFR-N0C
+1.35V_VGA
VREFCA VREFDQ
VSS#A9 VSS#B3 VSS#E1 VSS#G8 VSS#J2 VSS#J8 VSS#M1 VSS#M9 VSS#P1 VSS#P9 VSS#T1 VSS#T9 VSSQ#B1 VSSQ#B9 VSSQ#D1 VSSQ#D8 VSSQ#E2 VSSQ#E8 VSSQ#F9 VSSQ#G1 VSSQ#G9
B2 D9 G7 K2 K8 N1 N9 R1 R9 +1.35V_VGA A1 A8 C1 C9 D2 E9 F1 H2 H9 C
A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9 B1 B9 D1 D8 E2 E8 F9 G1 G9
96-BALL SDRAM DDR3 H5TC4G63CFR-N0C
+1.35V_VGA
+1.35V_VGA
+1.35V_VGA
+1.35V_VGA
B
B
R185 4.99K/F_4
R207 4.99K/F_4
R495 4.99K/F_4
VREFC_VMA1 R179 4.99K/F_4
C267 0.1U/16V_4
VREFD_VMA1 R211 4.99K/F_4
C313 0.1U/16V_4
R471 4.99K/F_4
R229 4.99K/F_4
VREFC_VMA2 R499 4.99K/F_4
C605 0.1U/16V_4
R260 4.99K/F_4
VREFD_VMA2 R472 4.99K/F_4
VREFC_VMA3 R226 4.99K/F_4
C593 0.1U/16V_4 +1.35V_VGA
C335 0.1U/16V_4
VREFD_VMA3 R259 4.99K/F_4
C361 0.1U/16V_4
R515 4.99K/F_4 VREFC_VMA4
R523 4.99K/F_4
C627 0.1U/16V_4
VREFD_VMA4 R514 4.99K/F_4
C618 0.1U/16V_4
[22,23,44]
+1.35V_VGA
VMA_CLK0
R516 4.99K/F_4
+1.35V_VGA
R153 40.2/F_4
C214
C642 1U/6.3V_4
C334 1U/6.3V_4
C643 1U/6.3V_4
C623 1U/6.3V_4
C329 1U/6.3V_4
C333 1U/6.3V_4
C644 1U/6.3V_4
C317 1U/6.3V_4
C621 1U/6.3V_4
C641 1U/6.3V_4
C328 1U/6.3V_4
C363 1U/6.3V_4
C619 1U/6.3V_4
C617 1U/6.3V_4
C315 1U/6.3V_4
C362 1U/6.3V_4
QBCON PN
TOP BSQ
VMA_CLK0_COMM 0.01U/50V_4
R154
+1.35V_VGA
VMA_CLK0# VMA_CLK1
9/4: Dual Rank : 80.6 ohm Single Rank : 40.2 ohm
C295 1U/6.3V_4
C316 1U/6.3V_4
AKD5PZDTW02
AKD5PZDTW01
Micron 2G
AKD5PZSTL01
AKD5PZSTL00
SAMSUNG 2G
AKD5PGDT501
AKD5PGDT500
+1.35V_VGA
40.2/F_4 A
Hynix 2G
C314 1U/6.3V_4
C364 1U/6.3V_4
C272 1U/6.3V_4
C616 1U/6.3V_4
C236 1U/6.3V_4
C609 1U/6.3V_4
C594 1U/6.3V_4
C606 1U/6.3V_4
C596 1U/6.3V_4
C608 1U/6.3V_4
C610 1U/6.3V_4
C595 1U/6.3V_4
C613 1U/6.3V_4
C612 1U/6.3V_4
A
R257 40.2/F_4
+1.35V_VGA
C368
+1.35V_VGA
PROJECT : X1A Quanta Computer Inc.
VMA_CLK1_COMM R258
0.01U/50V_4
C365 10U/6.3VS_6
C217 10U/6.3VS_6
C336 10U/6.3VS_6
C645 10U/6.3VS_6
C607 10U/6.3VS_6
C614 10U/6.3VS_6
C600 10U/6.3VS_6
C615 10U/6.3VS_6
C221 10U/6.3VS_6
C611 10U/6.3VS_6
C366 10U/6.3VS_6
C322 10U/6.3VS_6
40.2/F_4
Size
NB5
VMA_CLK1# 5
4
3
2
Custom
Document Number
Rev 1A
MESO S3 VRAM(DDR3 BGA96P)
Date: Wednesday, May 13, 2015 1
Sheet
24
of
49
5
4
3
2
1
25 D
D
C
C
B
B
A
A
PROJECT : X1A Quanta Computer Inc. Size
NB5
Custom
Document Number
5
4
3
2
Rev 1A
DDR3L - RANK1
Date: Wednesday, May 13, 2015 1
Sheet
25
of
49
5
4
3
2
1
26 D
D
C
C
B
B
A
A
PROJECT : X1A Quanta Computer Inc. Size
NB5
Custom
Document Number
5
4
3
2
Rev 1A
DDR3L - RANK1
Date: Wednesday, May 13, 2015 1
Sheet
26
of
49
5
4
3
2
1
RTD2136 Dual Channel only
27
RTD2136S Power Up Sequence +3.3V_2136_A
Reserve for co layout EDP CON, EDP only please stuff
Pin 18: keep 80mil Trace
+1.2V_2136
+3.3V_2136_D
INT_eDP_AUXN_R [28] INT_eDP_AUXP_R [28] INT_eDP_TXP0_R [28] INT_eDP_TXN0_R [28] INT_eDP_TXP1_R [28] INT_eDP_TXN1_R [28]
C72 C73 C74 C75
*0.1U/16V_4 *0.1U/16V_4 *0.1U/16V_4 *0.1U/16V_4
INT_eDP_TXP0_2136 INT_eDP_TXN0_2136 INT_eDP_TXP1_2136 INT_eDP_TXN1_2136
7 8 9 10 13 14
SCL1_2136 SDA1_2136
[10,16,17,18,31] [10,16,17,18,31]
SMB_RUN_CLK SMB_RUN_DAT
C
R58
*0_4
R59
*0_4
[28] [28]
EDIDDATA_2136 EDIDCLK_2136
SDAT_2136 SCLK_2136
45 46 47 48 49
18 22
5
11 15 43
LANE0P LANE0N LANE1P LANE1N
RTD2136R CIICSCL1 CIICSDA1 MIICSDA1 MIICSCL1 MIICSDA0 MIICSCL0 NC
6
Reserve
DP_V33
INT_eDP_TXP0 INT_eDP_TXN0 INT_eDP_TXP1 INT_eDP_TXN1
DP_HPD TESTMODE AUX-CH_N AUX-CH_P
SWR_VDD PVCC
1 2 3 4
IC底底底底GND
PWMOUT PANEL_VCC PWMIN
INT_eDP_AUXN_2136 INT_eDP_AUXP_2136
HPD TXO0TXO0+ TXO1TXO1+ TXO2TXO2+ TXOCTXOC+ TXO3TXO3+ TXE0TXE0+ TXE1TXE1+ TXE2TXE2+ TXECTXEC+ TXE3TXE3+ BL_EN
42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 44
TXLOUT0-_2136 [28] TXLOUT0+_2136 [28] TXLOUT1-_2136 [28] TXLOUT1+_2136 [28] TXLOUT2- [28] TXLOUT2+ [28] TXLCLKOUT- [28] TXLCLKOUT+ [28]
<=100ms
TXUOUT0- [28] TXUOUT0+ [28] TXUOUT1- [28] TXUOUT1+ [28] TXUOUT2- [28] TXUOUT2+ [28] TXUCLKOUT- [28] TXUCLKOUT+ [28] +3V 2136_LVDS_BLON
C
2136_LVDS_BLON
[28] C102 *0.1U/16V_4
19 20 21
*0.1U/16V_4 *0.1U/16V_4
DP_REXT
INT_eDP_TXP0 INT_eDP_TXN0 INT_eDP_TXP1 INT_eDP_TXN1
C78 C79
12
[2] [2] [2] [2]
INT_eDP_AUXN INT_eDP_AUXP
DP_GND
INT_eDP_AUXN INT_eDP_AUXP
DP_V12 SWR_VCCK VCCK
17
U3
EDP_HPD_2136
[2] [2]
2136_DISP_ON 2136_DPST_PWM
R43
2136_DISP_ON [28] 2136_DPST_PWM [28]
*12K/F_4
For eDP, close to U3
PCH_DPST_PWM [10,18,35]
MBCLK2
[10,18,35]
MBDATA2
R50
*0_4
SCL1_2136
R51
*0_4
SDA1_2136
D
DP2LVDS VCC
*100K/F_4
SWR_LX
R60
EDDID EEPROM VCC
+SWR_LX
GND
INT_eDP_AUXN_R INT_eDP_AUXP_R INT_eDP_TXP0_R INT_eDP_TXN0_R INT_eDP_TXP1_R INT_eDP_TXN1_R
0_4 0_4 0_4 0_4 0_4 0_4
16
R61 R62 R63 R64 R65 R66
D
R29
*100K/F_4
[2]
R28
PCH_DPST_PWM
0_4
EDP_DPST_PWM
[28]
Use 1% Res on R32
Default(LVDS Only)
LVDS Only [2,28]
ULT_EDP_HPD
ULT_EDP_HPD +3V
R42
*1K/F_4
EDP_HPD_2136
R37
*4.7K_4
SCLK_2136 SDAT_2136
B
B
R36
*4.7K_4
[2,4,10,11,12,13,14,15,16,17,18,28,29,30,31,32,33,34,35,41,43]
L10: need use CV-4709MN00
keep 80 mil +3V
+3.3V_2136_D
+3.3V_2136_D
CLOSE TO Pin22
L8
+3V
Close to Pin18
*PBY160808T-600Y-N
USING 60R 2A
+3.3V_2136_A L12
+SWR_LX
C43
*10U/6.3VS_6
*4.7UH_1A
USING 60R 1A
C44 *0.1U/16V_4
Close to Pin11 Close to Pin43
L9
*PBY160808T-600Y-N C45
for Vendor suggestion
+1.2V_2136
Close to Pin5
+3V
C53 *0.1U/16V_4
C49 *22U/6.3VS_6
C90 *10U/6.3V_6
C68 *0.1U/16V_4
C81 *0.1U/16V_4
R35
*0_8
C61 *22U/6.3VS_6
C57 *0.1U/16V_4
C54 *0.1U/16V_4
C56 *0.1U/16V_4
Close to Pin17
*0.1U/16V_4 A
A
SWR MODE
LDO MODE
Stuff L9
Stuff R35
PROJECT : X1A Quanta Computer Inc.
NB5
Size
Document Number
Custom
27 -- RTD2136
Date: Wednesday, May 13, 2015 5
4
3
2
1
Rev 2A Sheet
27
of
49
R48
EMU_LID
PN_BLON D1
OUT_LVDS_BLON R41
1K/F_4
OUT_LVDS_BLON R49
100K/F_4
OUT_DPST_PWM R46
A
0_4
C71
BLON_CON RB500V-40
22P/50V_4
R40
100K/F_4
+3V
28 +3VLCD_CON
For LVDS Only: R32 R31
CN8 EDIDCLK EDIDDATA
*4.7K_4 *4.7K_4
RF
C50 *10P/50V_4
1K/F_4
8
LVDS Conn.
EDIDDATA EDIDCLK
[27] EDIDDATA_2136 [27] EDIDCLK_2136
7
C51 *10P/50V_4
VADJ1
33P/50V_4
0423 change to shortpad R363
+3V
40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
*0_6/S EDIDCLK_R EDIDDATA_R TXLOUT0TXLOUT0+
C512 1000P/50V_4
TXLOUT1TXLOUT1+
+3V_CAM
+3V
42
C66 [35]
[27] TXUCLKOUT[27] TXUCLKOUT+ [27] TXUOUT0+ [27] TXUOUT0[27] TXUOUT1+ [27] TXUOUT1[27] TXUOUT2+ [27] TXUOUT2-
6
2 0.047U/25V_4
LID Switch
5
TXLOUT2TXLOUT2+
For LVDS
Power Switch Reserve
80 mil trace
Close to LVDS connector [27]
R10
2136_DISP_ON R15 *100K/F_4
For LVDS Only close CN2
+3VLCD_CON
*0_8
R55 [27] [27]
2136_DPST_PWM
Rb
2136_LVDS_BLON
R52
*0_4 OUT_DPST_PWM
R38
*0_4 OUT_LVDS_BLON
TXLCLKOUTTXLCLKOUT+
C526 *4.7U/6.3V_6
*100K/F_4
Ra
C28 *4.7U/6.3V_4
C527 *0.01U/50V_4
TXUOUT0TXUOUT0+
For LVDS Only: Stuff Rc
For eDP
+3V
+3VLCD_CON
Close to LVDS connector
For EDP Only: stuff Cap
U1 C18
R11 100K/F_4
R31 close to U2 for eDP,stuff
GND
2
ON/OFF
C21 0.01U/50V_4
C23 0.1U/16V_4
C17 10U/6.3V_6
G5243AT11U for eDP,stuff U2 & L8
For EDP Only: Reserved
B
[2]
PCH_LVDS_BLON
R54
0_4
OUT_LVDS_BLON
[27]
EDP_DPST_PWM
R45
10_4
OUT_DPST_PWM
[27] INT_eDP_TXP1_R [27] TXLOUT0+_2136 [27] TXLOUT0-_2136 [27] INT_eDP_TXN1_R
+3V
R370 R372
*100K_4 *100K_4
EDIDDATA_R EDIDCLK_R
+3V
R47 R68
*1K_4 *1K_4
OUT_DPST_PWM OUT_LVDS_BLON
[27] [27] [27] [27]
INT_eDP_AUXN_R EDIDDATA EDIDCLK INT_eDP_AUXP_R
C34 R24 R27
[12] [12]
R17 R19
0.1U/16V_4
C29
0.1U/16V_4
C31
0.1U/16V_4
C42
0.1U/16V_4
C46
0.1U/16V_4
*0_4 *0_4
R371 R373
C548
0.1U/25V_4
C550
0.01U/50V_4
+VIN_BLIGHT
+VIN_BLIGHT
GS12401-1011-9H LVDS-51519-04001-001-40P-L DFFC40FR063
+VIN
B
+VIN
C545 *4.7U/25V_8
[4,30,32,33,37,38,39,40,41,42,43,44,46] +5VS5 [2,4,10,11,12,13,14,15,16,17,18,27,29,30,31,32,33,34,35,41,43] +3V [29,30,31,32,33,34,43] +5V [31,33,34,36,37,38,39,41,42,43,44,45] +VIN [4,10,11,12,14,15,16,18] +3V_DEEP_SUS
C88 *10P/50V_4
C541 0.1U/25V_4
0507 change footprint
C546 *4.7U/25V_8
C540 0.1U/25V_4
C549 0.1U/25V_4
C533 0.1U/25V_4
C539 0.1U/25V_4
HDMI CONN C243 C249
0.1U/16V_4 0.1U/16V_4
IN_D1 IN_D1#
C227 C235
0.1U/16V_4 0.1U/16V_4
C_TX1_HDMI+ C_TX1_HDMI-
[2] IN_D2 [2] IN_D2#
IN_D2 IN_D2#
C215 C218
0.1U/16V_4 0.1U/16V_4
C_TX2_HDMI+ C_TX2_HDMI-
IN_CLK C254 IN_CLK# C264
0.1U/16V_4 0.1U/16V_4
C_IN_CLK C_IN_CLK#
Close to HDMI connector
HDMI SMBus Isolation
C_TX0_HDMI+ C_TX0_HDMI-
+3V +3V
5
DGPU_CL_HDMIP
Q35 2N7002K
Q37
R479 2.2K_4
+3V
3
IN_D0 IN_D0#
[2] IN_D1 [2] IN_D1#
[2] IN_CLK [2] IN_CLK#
DIGITAL_CLK_L VADJ1 BLON_CON
+VIN_BLIGHT
EDIDDATA_R EDIDCLK_R
+3V_CAM USBP3-_C USBP3+_C
120/300MA 120/300MA C89 *10P/50V_4
+VIN
HDMI Re-driver
2 [2]
4
SDVO_CLK
3
1
SDVO_DATA R503 2.2K_4
+3V
6
470/F_4 470/F_4
C_TX2_HDMI+ C_TX2_HDMI-
R468 R473
470/F_4 470/F_4
C_TX1_HDMI+ C_TX1_HDMI-
R475 R478
470/F_4 470/F_4
C_TX0_HDMI+ C_TX0_HDMI-
R485 R489
470/F_4 470/F_4
C_IN_CLK C_IN_CLK#
HDMI_SCLK
2 [2]
R463 R466
1
[2] IN_D0 [2] IN_D0#
L10 L11
100mA TXLOUT1+ TXLOUT1-
*0_4 *0_4
USBP3USBP3+
[29] DIGITAL_CLK [29] DIGITAL_D1
TXLOUT0+ TXLOUT0C36
TXUOUT2TXUOUT2+
ULT_EDP_HPD_R
TXUCLKOUTTXUCLKOUT+
0.1U/16V_4
*0_4 *0_4
*0_4
L26 MCM2012B900GBE 1 2 4 3
0505 EMI request
TXLOUT2+ TXLOUT2-
TXLOUT2+ TXLOUT2-
[27] INT_eDP_TXP0_R [27] TXLOUT1+_2136 [27] TXLOUT1-_2136 [27] INT_eDP_TXN0_R
for LVDS,stuff C29 & R23
For eDP, close to CN2
[27] [27]
1
OUT
IN
Rd0_4
R34
ULT_EDP_HPD
0505 cancel co-layout
TXLCLKOUT+ TXLCLKOUT-
[27] TXLCLKOUT+ [27] TXLCLKOUT-
HCB1608KF-181T15_S0_6
2
3
PCH_DISP_ON
IN
L6
2
4
1U/6.3V_4
1
1
5
[2]
[2,27]
For LVDS only stuff Resistor
TXUOUT1TXUOUT1+
RcR33
For EDP Only: Stuff Rd
A
41
4
TXUCLKOUTTXUCLKOUT+ TXUOUT0+ TXUOUT0TXUOUT1+ TXUOUT1TXUOUT2+ TXUOUT2-
1 C511
3
0.047U/25V_4 2
2
C510 1
1
R461 1
HDMI_SDATA
2 100K/F_4
C589 2N7002KDW
0.1U/16V_4
Close to Q40
C
C
40 mils +5V
F1 2
H=1.4mm(Max) FUSE1A6V_POLY 1
C286
0.1U/16V_4
VC2 SSM14 spec *TVM0G5R5M220R
+5V_HDMIC CN10 +5V_HDMIC
C_TX2_HDMI+
C285 *0.01U/50V_4
C_TX2_HDMIC_TX1_HDMI+
is 40V 1A
for EMI request
C_TX1_HDMIC_TX0_HDMI+ C_TX0_HDMIC_TXC_HDMI+ C_TXC_HDMI-
+5V_HDMIC
D3
2 2
RB500V-40 1 5V_HSMBCK R178 1 5V_HSMBDT R176
2.2K_4 2.2K_4
HDMI_SCLK HDMI_SDATA
D2 RB500V-40
C261 C275
*10P/50V_4 *10P/50V_4
+3V
+5V_HDMIC HDMI_HPD
1
HDMI_HPD_CON
HDMI_DET_C
20
23
22
21
HDMI CONN C310
2
R197 1M_4
[2]
SHELL1 D2+ D2 Shield D2D1+ D1 Shield D1D0+ SHELL2 D0 Shield D0CK+ CK Shield CK- SHELL2 CE Remote NC DDC CLK DDC DATA GND +5V HP DET SHELL2
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
VC1 *TVM0G5R5M220R 3
HDMI_HPD
R216
20K/F_4
220P/50V_4
Q18 2N7002K
D
D
EMI Solution C_TX2_HDMI+
R147
220/F_4
C_TX2_HDMI-
C_TX1_HDMI+
R155
220/F_4
C_TX1_HDMI-
C_TX0_HDMI+
R160
220/F_4
C_TX0_HDMI-
C_TXC_HDMI+
R169
220/F_4
C_TXC_HDMI-
C_IN_CLK
R167
*0_4/S
C_TXC_HDMI+
R172
*0_4/S
C_TXC_HDMI-
C_IN_CLK#
PROJECT : X1A Quanta Computer Inc.
NB5
0423 change to shortpad 1
2
3
4
5
6
Size
Document Number
C
LCD CONN/LID/CAM/D-MIC
Date: Wednesday, May 13, 2015 7
Sheet 8
28
Rev 1A of
49
A
B
C
D
E
29
Audio Codec +5V_AVDD
+5V U23
+5V_AVDD
L17
HCB1005KF-181T15
5
+5V
4
1
>40mils trace
C638 1U/6.3V_4
C640 10U/6.3VS_6
Close to PIN27
+3V_DVDD-IO
L29 HCB1005KF-181T15
+3V
C639 0.1U/16V_4
C367 0.1U/16V_4
2
C646 10U/6.3VS_6
1023 Del L1001
Close to PIN9
+3V_DVDD L30 HCB1005KF-181T15
+3V
C337 *AZ2015-01H
C647 *2.2U/6.3V_4
AGND C637 10U/6.3VS_6
2 C628 *1U/6.3V_4
Vout
1
Vin
BYP GND
R235
Vset=1.242V
*10K_4 +5V
BLM15AG601SN1D
DMIC0
*0_4
DIGITAL_CLK_R
R252
BLM15AG601SN1D
DMIC_CLK_R
C353
R261
0423 change to shortpad [14]
ACZ_SDOUT_AUDIO [14]
7
*0_4/S
5
ACZ_SDOUT_AUDIO
6
BIT_CLK_AUDIO
[14]
R262
ACZ_SDIN0
8
HD_SDIN0
33_4
DVSS SDATA-OUT BIT-CLK
LDO-CAP
VREF
SDATA-IN
26 33
AGND
21
25
C651
C374
L_SPK+
40
L_SPK-
41 42
0423 change to shortpad PD# [30]
R242
*0_4/S
R_SPK-
43
R_SPK+
44
COMBO-DET
46 47
PD#_R
48
HP_EAPD
24 18 17 16 15
+5V_DVDD
PCBEEP SPK-L+ SPK-L-
LINE1-L LINE1-R
C649
HPOUT_R
23
VREFOUT_C
28 29
MIC_L1 MIC_R1
C648 0.1U/16V_4
R534 AMP_BEEP_L
AMP_BEEP_R2 47K/F_4
Q39
Close to PIN25 AGND
C652 0.1U/16V_4
HPOUT_L
[30]
AGND SHIELD
HPOUT_R
[30]
AGND SHIELD TO Headphone jack
2
R536 4.7K_4
ACZ_SPKR
[11,14]
2N7002K
MIC1-R MIC1-L
AGND SHIELD
C357 C356
4.7U/6.3V_4 *4.7U/6.3V_4
R269
1K/F_4
EXT_MIC_L
AGND
Check layout mount location
TO Audio Jack MIC
AGND
20 19
0423 change to shortpad
SPK-RMIC1-VREFO
30
MUTE_LED_CNTL_L
R249
*0_4/S
Speaker 4 ohm: 40mils MUTE_LED_CNTL
CN4
[31]
L_SPK+ L_SPKR_SPKR_SPK+
SPK-R+ DMIC1/GPIO2 MONO-OUT
37
L4 L3 L2 L1
L_SPK+_R L_SPK-_R R_SPK-_R R_SPK+_R
PBY160808T-600Y-N PBY160808T-600Y-N PBY160808T-600Y-N PBY160808T-600Y-N
EAPD/PD
INT SPEAKER CONN
GLOBE INPUT MUTE I2S_DIN I2S_LRCK I2S-DOUT I2S-SCLK I2S-MCLK
4 3 2 1
CPVEE CBN CBP
34 35
C354
2.2U/6.3V_4
Close to CN4
AGND
C5
C4
C3
C2
680P/50V_4
680P/50V_4 680P/50V_4
CAP680P/50V_4
36
C636 2.2U/6.3V_4
CAP+
Close to Pin 35
1
ALC3241 x QFN48
Close to Pin 22 0.1U/16V_4 10U/6.3VS_6
+5V_DVDD
32
PVSS
+5V_DVDD
L28 *HCB1608KF-181T15_S0_6/S
Close to PIN21
1 LINE1-VREFO RESET#
39
1
AGND
0.1U/16V_4
2.2U/6.3V_4
HPOUT_L
R539 10K_4
check value
10U/6.3VS_6
0.1U/16V_4
31
JDREF
12
AMP_BEEP
*0.1U/16V_4
SYNC
Digital
C386
HPOUT-R
SenseB
11
ACZ_RST#_AUDIO
DVDD-IO
22
10
ACZ_SYNC_AUDIO
+5V_AVDD
AGND
AMP_BEEP
SENSEA
[14]
+5V
AVSS1 AVSS2
HPOUT-L 3
+3V_DVDD-IO
+5V
AGND
C373
Layout Note: Ra, Rb, Rc,Rd need to close OPTION: To Digital MIC: Only install Ra, Rd To 3D Camera: Only install Rb, Rc
GPIO0/ DMIC-CLK
10P/50V_4
0_4
3D CAMERA MIC
2
AVDD1 AVDD2
GPIO1/ DMIC-DATA
14
Rd
DVDD
C633 10U/6.3VS_6
27 38
3
R255
Analog
DIGITAL_D1_R
13
R562
4
*0_4
DREG-OUT GND
R561
DIGITAL_CLK
Rc
PVDD2
DIGITAL_CLK_3D
Rb
9
10P/50V_4
1 49
R560
C635 0.1U/16V_4
0_4 C355
DIGITAL_D1_3D
[28]
U10
Ra
PVDD1
C346
Close to Pin 39
C624
C351 10U/6.3VS_6 SENSE_A_1
R535
20K/F_4
R538
39.2K/F_4
AGND SENSE_A
L27 *HCB1608KF-181T15_S0_6/S
0.1U/16V_4
C344
10U/6.3VS_6
C629
Close to codec
Close to Pin 45
BLM15AG601SN1D L31 R268
VREFOUT_C EC86
EXT_MIC_L
2.2K_4
EXT_MIC_L
EXT_MIC_L2
0.1U/16V_4
EC84
0.1U/16V_4
EC85
0.1U/16V_4
+3V_DVDD
C656 *1U/6.3V_4
EC35
0.1U/16V_4
EC82
0.1U/16V_4
R241 10K_4
AGND
[14]
Close to CODEC place to near U10 or under U10 R532
ACZ_RST#_AUDIO
1
2 PD#
1
*RB500V-40 2
D6 [30,35]
VOLMUTE# D5
R554 *22K/F_4
R270 2.2K_4
AGND
AGND COMBO-DET R531
*0_4/S
0423 change to shortpad
C661 100P/50V_4
AGND
COMBO-DET_R
R537 10K_4
VC10 *AVLC5S_4
AGND
0423 change to shortpad AGND C650 10U/6.3VS_6
R240 *10K_4
C653
100P/50V_4
AGND
R553
[30]
LINEOUT_L_C
LINEOUT_L_C R540
47/F_4
LINEOUT_L_C1
L32
FCM1005KF-301T03
LINEOUT_L_C2
[30]
LINEOUT_R_C
LINEOUT_R_C R541
47/F_4
LINEOUT_R_C1
L33
FCM1005KF-301T03
LINEOUT_R_C2
C657
100P/50V_4
RB500V-40
AGND
*0_8/S
CN12 COMBOJACK_6P
*0_4/S
3 4 1 2 5 6
AGND SENSE_A
7
[33]
R559
45
[33]
C630 1U/6.3V_4
Close to PIN38
TO Digital MIC DIGITAL_D1
C631 0.047U/25V_4
AGND
C634 0.1U/16V_4 +5V_AVDD
[28]
C632 0.1U/16V_4
3
EN
*TPS793475DBVR HPA01091DBVR
AGND EC83 *100P/50V_4
AGND AGND
VC3 *AVLC5S_4 R555 0_4
AGND
AGND ACZ_SDIN0
EC32
*33P/50V_4
ACZ_SDOUT_AUDIO EC29
*10P/50V_4
ACZ_SYNC_AUDIO
EC31
*10P/50V_4
BIT_CLK_AUDIO
EC30
*33P/50V_4
PROJECT : X1A Quanta Computer Inc. [2,4,10,11,12,13,14,15,16,17,18,27,28,30,31,32,33,34,35,41,43] [28,30,31,32,33,34,43]
+3V +5V
NB5
Size
Document Number
Custom
29 -- Audio Codec
Date: Wednesday, May 13, 2015 A
B
C
D
E
Rev 2A Sheet
29
of
49
5
4
3
2
1
30
Head Phone out Add 1uF caps for the AC coupling. (IDT recommend)
+5V_AMP
+5V_AMP
+5V L19
C392
1U/10V_4
AGND C654
D
HCB1005KF-181T15
1U/10V_4
D
HPOUT_L1
C389
2.2U/6.3V_4
R276
0_4
C394
HPOUT_L2
1
2.2U/6.3V_4
2 3
AGND R277 HPOUT_R
AGND
0_4
R280
*0_4
HPOUT_R1
C399
C397
2.2U/6.3V_4
2.2U/6.3V_4
4
HPOUT_R2
5
LEFTINP+ GND
1U/10V_4
AGND
16
18
19
17 CPM
CPP
GND
GND VDD
TPA6133A2
HPRIGHT RIGHTINP+ RIGHTINM-
6 7 8 9 10
Placement close the CODEC (U11)
CPVSS
HPLEFT
LEFTINML-
SD# TEST2 TEST1 GND GND
[29]
R279
0_4
CPVSS
0_4
AGND AGND AGND AGND AGND
R274
HPOUT_L
21 22 23 24 25
[29]
VDD
1218 Del C1043, C1050
U11
*0_4
20
C655 R275
AGND
1126 Del for realtek review
AGND AGND AGND AGND AGND
15 14
LINEOUT_L_C
+5V_AMP
13 12 11
LINEOUT_R_C
C385
30 29 28 27 26
1U/10V_4
AGND
HPA022642RTJR If Don't Use AMP need install +5V_AMP
HPOUT_L
R273
*0_4
LINEOUT_L_C
HPOUT_R
R278
*0_4
LINEOUT_R_C
LINEOUT_L_C
[29]
LINEOUT_R_C
[29]
AGND AGND R544
+3V
[29,35]
C
VOLMUTE#
100K/F_4
TPA6133A2 HPA022642RTJR
2
VOLMUTE#
[29]
AMP_PD#_R
2K/F_4
AMP_CLK D16 BAT54AW-L
AMP_DAT
HOLE H1 *O-Y16X-4
R542
2K/F_4
1
HP_EAPD
HP_EAPD
R543
C
3
USB/CR/LAN board CONN H2 *H-TC236BC315D110P2
H3 *H-C98D98N
H4 *H-C315D157I197P2
H5 *H-TC236BC276D118P2
H6 *INTEL-BKT-SHARK-ULT DEEP_PWRLED#
1 2 3 4
1
1
1
1
1
LID_EC# NBSWON1# C6 *220P/50V_4
B
C13 *220P/50V_4
+5VS5
+3VPCU
[12] [12]
USB30_RX3+ USB30_RX3MCM2012B900GBE 4 3 1 2
USBP6+ USBP6[13] PCIE_CLKREQ_CR# [13] PCIE_CLKREQ_LAN# [4,16,19,32,34,35] PLTRST# [4,34,35] PCIE_WAKE# [33,35] USBPW_ON# [35] NBSWON1# [35] LID_EC# [34] DEEP_PWRLED# +3VPCU +3VLANVCC
+3V
55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
USBP2+_C USBP2-_C
L5
USB30_TX3+ USB30_TX3-
[12] USB30_TX3+ [12] USB30_TX3[12] USB30_RX3+ [12] USB30_RX3-
C12 *220P/50V_4
+3VLANVCC
MCM2012B900GBE 4 3 1 2
USBP2+ USBP2-
H12 *H-C236D110P2
1
H11 *H-TC236BC315D118P2
1
H10 *H-TC236BC315D118P2
1
H9 *H-TC276BC197D146P2
1
H8 *H-TC315BC276D157P2
1
1
H7 *H-TC276BC197D146P2
CN1
[12] [12]
L7
USBP6+_C USBP6-_C
PCIE_CLKREQ_CR# PLTRST# PCIE_WAKE#
+3V
H13 H-TC197BC102D102P2
PAD1 *SPAD-RE315X157NP
PAD2 *O-Y16X-3
PAD3 *spad-y11x-1np
PAD4 *spad-re197x394np
C48
C33
C35
C40
*0.1U/16V_4
*0.1U/16V_4
*0.1U/16V_4
*0.1U/16V_4
+5VS5
PAD8 *SPAD-X1AD-2NP
1
1
1
1
1
+3VPCU
R151 *64.9K/F_6 2
2
EC20 *Clamp-Diode
PAD5 *SPAD-C157NP
PAD6 *SPAD-C157NP
PAD7 *SPAD-X1AD-1NP
R1 10K_4 DEEP_PWRLED#
1
1
1
3
A
1
2 PWR_LED# Q1 DRC5144E0L
PWR_LED#
LAN_XTAL25_IN PCIE_TXP9_LAN PCIE_TXN9_LAN
[13] [13]
CLK_PCIE_LANP CLK_PCIE_LANN
[12] [12]
PCIE_RXP9_LAN PCIE_RXN9_LAN
1
1
1
[32] [12] [12]
[12] [12]
PCIE_TXP5_CARD PCIE_TXN5_CARD
[13] [13]
CLK_PCIE_CRP CLK_PCIE_CRN
[12] [12]
PCIE_RXP5_CARD PCIE_RXN5_CARD
Card LAN 55P
55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
B
A
[35]
C1 0.1U/16V_4
PROJECT : X1A Quanta Computer Inc. Size
NB5
C
Document Number
5
4
3
2
Rev 1A
Card Reader
Date: Wednesday, May 13, 2015 1
Sheet
30
of
49
A
B
3
MY[0..17]
MY[0..17]
[35]
MX[0..7]
MX[0..7]
MUTE_LED_CNTL_R1
4
[29]
2
MUTE_LED_CNTL
Q26 2N7002K
[35]
CAPSLED#
1
R355 10K_4
KB1 KB CONN
KB 14" & 15" 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
MX1 MX7 MX6 MY9 MX4 MX5 MY0 MX2 MX3 MY5 MY1 MX0 MY2 MY4 MY7 MY8 MY6 MY3 MY12 MY13 MY14 MY11 MY10 MY15 MY16 MY17
1 200/F_6 CAPSLED#_R R348 2 1 MUTE_LED_CNTL_R MUTE_LED_CNTL_R1 R349 2 WIRELESS_ON_R 200/F_6 WIRELESS_OFF_R LED_PW +3V
KB2 *KB CONN
KB 17" 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
MX1 MX7 MX6 MY9 MX4 MX5 MY0 MX2 MX3 MY5 MY1 MX0 MY2 MY4 MY7 MY8 MY6 MY3 MY12 MY13 MY14 MY11 MY10 MY15 MY16 MY17
32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
CAPSLED#_R MUTE_LED_CNTL_R WIRELESS_ON_R WIRELESS_OFF_R LED_PW
+3V
51586-03241-001-32p-l DFFC32FR043
E
31
Touch Pad Connector
32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
Q25A 2N7002KDW [10,16,17,18,27]
4
SMB_RUN_CLK
3
Dual
TP_SMB_CLK R338
4.7K_4
R337
4.7K_4
4
5
[35]
D
+3V
+3VSUS
2
KEYBOARD Con.
C
[10,16,17,18,27]
1
SMB_RUN_DAT
6
TP_SMB_DATA
Q25B 2N7002KDW
R320 R316
+3VSUS
4.7K_4 4.7K_4
51586-03241-001-32p-l DFFC32FR043
0.1U/16V_4
CN13
C455
10P/50V_4
C458
BLM15BA330SN1D BLM15BA330SN1D 10P/50V_4
L21 L22
[35] TPDATA [35] TPCLK
C472
+3VSUS
TPCLK TPDATA
1 2 3 4 5 6
TPDATA-1 TPCLK-1 TP_SMB_CLK TP_SMB_DATA
3
3
25 mils
+5V
MY13 MY12 MY3 MY6
RP1
10 9 8 7 6
RP2
10 9 8 7 6
1 2 3 4 5
MY8 MY9 MY10 MY11
C491 C479 C498 C497
220P/50V_4 220P/50V_4 220P/50V_4 220P/50V_4
MY2 MY4 MY7 MY8
C486 C488 C489 C482
220P/50V_4 220P/50V_4 220P/50V_4 220P/50V_4
MX4 MX6 MX3 MX2
C480 C478 C484 C483
220P/50V_4 220P/50V_4 220P/50V_4 220P/50V_4
*10P/50V_4
R351 *1K/F_4
R352 2
1 *200/F_6 WIRELESS_OFF_R
Q28 *DRC5144E0L MY1 MY2 MY4 MY0
C468
FAN CONN
2
WIRELESS_OFF
+5V +5V
WIRELESS_OFF EC56
*220P/50V_4
C525
10U/6.3VS_6
C528
0.1U/16V_4
*10P8R-8.2K
+3VPCU
R346 R347
2
MY14 MY11 MY10 MY15
*10P8R-8.2K
+3VPCU
MY1 MY5 MY0 MY9
1 2 3 4 5
220P/50V_4 220P/50V_4 220P/50V_4 220P/50V_4
1
+3VPCU
C485 C492 C493 C490
*10P/50V_4 DFFC06FR162
3
KEYBOARD PULL-UP
MY5 MY6 MY3 MY7
C467
*8.2K_4 MY16 *8.2K_4 MY17
MX7 MX0 MX5 MX1
C477 C487 C481 C476
WIRELESS_ON
220P/50V_4 220P/50V_4 220P/50V_4 220P/50V_4
EC55
R350 *1K/F_4
*220P/50V_4
[35] R353 2
220P/50V_4 220P/50V_4 220P/50V_4 220P/50V_4 220P/50V_4 220P/50V_4
[35] WIRELESS_ON_R
Q27 *DRC5144E0L WIRELESS_ON
+3V
FAN1SIG
R344
4.7K_4
FAN1_PWM C531
*220P/50V_4
FAN1SIG
*220P/50V_4
5
2
C537
6
FAN Connect
3
C494 C495 C496 C499 C500 C501
1 *200/F_6
15 2 3 46
FAN1_PWM
靠靠EC
2
1
MY12 MY13 MY14 MY15 MY16 MY17
FAN1
KB LIGHT CONN
+VIN
+5V
Q30 AO3404
3
R354 1M_4
2
1
3
1
Q29 2N7002K
14" & 15"
1
R356 2M_4
2
KB_LED_EN
+5V_LED_KBLIGHT C502 0.1U/16V_4
C503 0.1U/16V_4
1
[35]
4 3 2 1
17" +5V_LED_KBLIGHT C504 *0.1U/16V_4
CN14 KB_LIGHT_CONN_14_15
PROJECT : X1A Quanta Computer Inc.
4 3 2 1 CN15 *KB_LIGHT_CONN_17
NB5
Size
Document Number
Custom
PB/TP/KB/FAN/EMI Cap
Date: Wednesday, May 13, 2015 A
B
C
D
E
Sheet
Rev 1A 31
of
49
5
TPM (2.0)
4
3
1
32
Accelerometer Sensor
Address BADD 4EH/4F
HIGH
2
(default) +3V
G-Sensor Power need check
FOR EMI 0423 change to shortpad D
R188
*0_6/S
+3V_WLAN_P
+3V
C461 *0.1U/16V_4
D
+G_SEN_PW
U7 HP3DC2TR
U14 [10,34,35] [10,34,35] [10,34,35] [10,34,35]
LAD0 LAD1 LAD2 LAD3
LAD0 LAD1 LAD2 LAD3
[10] [10,34,35] [4,16,19,30,34,35]
R323 R327 R336 R339
LAD0_T LAD1_T LAD2_T LAD3_T CLK_PCI_TPM
26 23 20 17 21
*0_4
LFRAME#_T
22 16 28 27
CLK_PCI_TPM
LFRAME# PLTRST#
LFRAME# PLTRST#
*0_4 *0_4 *0_4 *0_4
[10,35]
R330
SERIRQ
SERIRQ
+3V
9 15 R333 *4.7K_4
1 3 12
CLK_PCI_TPM
LAD0 LAD1 LAD2 LAD3 LCLK
VDD VDD VDD VSB GND GND GND GND
LFRAME# LRESET# LPCPD# SERIRQ TEST/BADD CLKRUN# NC NC NC
GPIO GPIO2 PP TESTI
XTALI/32K IN XTALO
10 19 24 5
C291 0.1U/16V_4 C470 *0.1U/16V_4
4 11 18 25
C462 *0.1U/16V_4
ACCEL_INTA#
ACCEL_INTA#
2 D4
1 ACCEL_INTA#_R RB500V-40 TP25
0423 change to shortpad R328
7 8
*4.7K_4
Vdd_IO VDD
NC NC
2 3
C471 *0.1U/16V_4
[14]
6 2
1 14
C303 0.1U/16V_4
R201
+3V
7 6 4
*0_4/S MBDATA3 MBCLK3
[35] MBDATA3 [35] MBCLK3
TPM_PP
11 9
8
+G_SEN_PW
+G_SEN_PW
RESERVED RESERVED RESERVED RESERVED
INT1 INT2 SDO SDA SCL
GND GND
10 13 15 16 5 12
CS
13 14 AL003DC2A00
*SLB9665TT2.0 FW 5.00 TPM_PP
R334 *33_4 ACCEL_INTA#
for EMI R335 *0_4
C465 *10P/50V_4
C
LFRAME# EC53
*220P/50V_4
PLTRST# EC54
*220P/50V_4
MBDATA3 MBCLK3
+G_SEN_PW
R206 R205
4.7K_4 4.7K_4
MBDATA3
C309
*33P/50V_4
MBCLK3
C312
*33P/50V_4
C
C304 *22P/50V_4
Touch screen
Green CLK Circuitry 0423 change to shortpad
+3VS5
+3VS5
+3V_TS +3V_TS
R18
*0_6/S C516 *22U/6.3V_6
1
R22 *10K_4
+3V
20mils width(min)
Q8 *AO3409 R25
C514
+3V_TS
*0.022U/25V_4
CN7
2
L25 *MCM2012B900GBE 2 1 3 4
*0.1U/16V_4 Q7 *DMG1012T-7(SOT523)
1
[12] [12] [35]
USBP8USBP8+ R369
TS_ON
+5VS5
+5V
USBP8-_C USBP8+_C TS_INTB#
*0_4/S
0423 change to shortpad +5VS5
[30] LAN_XTAL25_IN [13] PCH_XTAL24_IN [13] CLKGEN_RTC_X1 [20] CLK_27M_XTAL_IN
0.1U/16V_4
C515 TS_ON
+5V_TS +5V_TS
EC70 100P/50V_4
+5V_TS
R5 R6
*33_4 *0_4
R13
*10_4
C16
1 2 3 4 5 6 7 8
+3VLANVCC +1.0V +1.8V_VGA
6 5 9 CLK_27M_XTAL_IN_R12 LAN_XTAL25_IN_R PCH_XTAL24_IN_R
*0.1U/16V_4
C15
*0.1U/16V_4
C26
*0.1U/16V_4
8 3 11 GEN_XTAL25_OUT 16 1 GEN_XTAL25_IN
C19 R366
USBP8USBP8+
*0_6/S
USBP8-_C USBP8+_C
R368 R367
0_4 0_4
Q32 *AO3409
VC11
*EGA1_4
USBP8-_C
*EGA1_4
USBP8+_C
*360_4
14 7 13 4 17
+3VLANVCC +3V_RTC_0 +3V_RTC
C27 *2.2U/6.3V_4
3454 For 25M + 24M + 27M 3455 For 25M + 24M
C11
*10P/50V_4 PCH_XTAL24_IN
C20
*0.1U/16V_4
C30
*10P/50V_4 CLK_27M_XTAL_IN
C10
*10P/50V_4
+3VLANVCC LAN_XTAL25_IN A
GEN_XTAL25_OUT
3
3
*0.1U/16V_4
*25MHZ +-10PPM
A
C505
C24
+3V_RTC_R R12 C25 *22U/6.3VS_6
Y1
4 3
VC12
VDD_RTC_OUT VDDIO_25M VDDIO_24M GND VDDIO_27/NC GND GND XTAL_OUT GND XTAL_IN
15 2 10
GEN_XTAL25_IN
2
*220K_4
+V3.3A VDD VBAT
*12P/50V_4
2 1
C507 *22U/6.3V_6
1
R360 *10K_4
U2
25M 24M 32Khz 27Mhz/NC
*SLG3NB3454 DIS:AL003454000 UMA:AL003455002
TS CONN
R358
B
+3VPCU
C37
3
+3V_RTC_0,+3V_RTC_R,+3V_RTC..
2
*220K_4
3
B
C22
*15P/50V_4
*0.022U/25V_4
2
C513 0.1U/16V_4
PROJECT : X1A Quanta Computer Inc.
Q33 *DMG1012T-7(SOT523)
1
TS_ON
Size
NB5
Custom
Document Number
TPM/G-Sensor/G-CLK/TS/FP
Date: Wednesday, May 13, 2015 5
4
3
2
1
Sheet
32of
Rev 1A 49
5
4
3
UART for DEBUG
[14]
+3V GPP_A16 +3V
R569 R568
*0_4
6 7 8 9 10
1
33
USB 2.0/3.0 Combo
U26 USBP1USBP1+
2
HSD2HSD2+ OE VCC SEL
D+ DGND HSDHSD+
1 2 3 4 5
USBP1+_C USBP1-_C UART2_RXD UART2_TXD
UART2_RXD [14] UART2_TXD [14]
*10K_4 *FSUSB42UMX
D
C710 *0.1U/16V_4
[12] [12]
USBP1USBP1+
[12] [12]
USB30_RX1USB30_RX1+
[12] [12]
0.1U/16V_4 470P/50V_4
VC9 C622
*AVLC5S_4 1000P/50V_4 +5V_USBP1 USBP1-_C USBP1+_C
MCM2012B900GBE 4 3 1 2
USB 3.0 1A 1
L14
C343 0.1U/16V_4 USB30_TX1-_C C348 0.1U/16V_4 USB30_TX1+_C
USB30_TX1USB30_TX1+
CN11 USB3.0 CONN
1 2 3 4 5 6 7 8 9
2 3 4 5 6 7 8 9
3D CAMERA
VBUS DD+ GND SSRXSSRX+ GND SSTXSSTX+
40mil +5V +5V_CAM
[2] L40 L41
10 12 9 8 7 6 5 4 3 2 1 11
3D_FW_GPIO
3D_FW_GPIO
USB3_SSTX+ USB3_SSTX-
*0_8 *0_8 C690 *0.01U/50V_4
D
CN30 +5V_CAM_C
+5V_CAM_C
13 12 11 10
0129 Add UART for debug
3D Camera Conn.
0114 Add 3D CAMERA circuit
13 12 11 10
Place on BOT side under L14
USBP1USBP1+
C626 C625
USB3_SSRX+ USB3_SSRX-
C694 *4.7U/6.3V_4
*50450-01071-001
[30,35]
U21
2 3 4 1
USBPW_ON# VC8
C604 1U/6.3V_4
VIN1 VIN2 EN GND
OUT3 OUT2 OUT1 OC
8 7 6 5
+5V_USBP1 C620 1 +5V_USBP1
220U/6.3V_6X4.5 2 C692
+
100 mils (Iout=2.5A)
+5VS5
[29] [29]
AP2820GMMTR-G1
+3V DIGITAL_D1_3D DIGITAL_CLK_3D
L42 L43
*0.1U/16V_4
CN31
4 3 2 1
DIGITAL_D1_3D_L DIGITAL_CLK_3D_L
*120/300MA *120/300MA
Active Low
*AVLC5S_4
*INT SPEAKER CONN C696 *10P/50V_4
C695 *10P/50V_4
0116 Change CN31 footprint C
C
EMI CAP
B
A
USB3.0 re-driver for 3D CAMERA
+VIN
EC57
*0.1U/25V_4
+VIN
EC9
*0.1U/25V_4
+VIN
EC64
1U/25V_4
+VIN
EC88
*0.1U/25V_4
+VIN
EC72
*0.1U/25V_4
+VIN
EC87
+VIN
EC27
*0.1U/25V_4
+VIN
EC33
*0.1U/25V_4
+VIN
EC67
*0.1U/25V_4
+VIN
EC28
*0.1U/25V_4
+VIN
EC34
*0.1U/25V_4
+VIN
EC10
*0.1U/25V_4
+VIN
EC11
*0.1U/25V_4
+VIN
EC73
*0.1U/25V_4
+VIN
EC18
*0.1U/25V_4
+VIN
EC80
+5V
EC75
*0.1U/16V_4
EC78
*0.1U/16V_4
EC76
*0.1U/16V_4
Need close
Need close
non-USB 3.0 re-driver : stuff Ra +3V
USB30_TX2- R580 USB30_TX2+ R563
*0.1U/25V_4 EC81
Ra
+3VSUS
EC52
*0.1U/16V_4
EC77
*0.1U/16V_4
EC89
USB30_TX2-_L USB30_TX2+_L
C708 C709
*0_4 USB30_RX2-_L *0_4 USB30_RX2+_L
USB30_RX2-_L USB30_RX2+_L
R566 R567
From HOST For Re-driver : stuff Ca
*0.1U/16V_4
[12] [12]
USB30_TX2USB30_TX2+
[12] [12]
USB30_RX2USB30_RX2+
*0.1U/16V_4 *0.1U/16V_4
USB30_TX2-_DC USB30_TX2+_DC
20 19
C702 C703
*0.1U/16V_4 *0.1U/16V_4
USB30_RX2-_DC USB30_RX2+_DC
23 22
C706
*0.1U/16V_4
C707
*0.1U/16V_4
R570 R571
*4.7K_4 *4.7K_4
B2_EQ0 B2_EQ1
2 4
R572 R573
*4.7K_4 *4.7K_4
B2_DE0 B2_DE1
3 6
R574 R575
*4.7K_4 *4.7K_4
A2_EQ0 A2_EQ1
17 15
R576 R577
*4.7K_4 *4.7K_4
A2_DE0 A2_DE1
16 18
USB30_TX2USB30_TX2+
C700 C701
USB30_RX2USB30_RX2+
+3V
USB3.0 Re-driver
+3V
+VIN
EC65
1U/25V_4
+VIN
EC3
*0.1U/25V_4
AEQ 9.5db / ADE 3.5db
+VIN
EC74
*0.1U/25V_4
BEQ 13db / BDE 5db / REXT 5.36K
+VIN
EC2
*0.1U/25V_4
A_EQ1 A_EQ0 EC15
*0.1U/25V_4
+VIN
EC12
*0.1U/25V_4
+VIN
EC14
*0.1U/25V_4
+VIN
EC66
*0.1U/25V_4
+VIN
EC13
*0.1U/25V_4
+VIN
EC1
*0.1U/25V_4
+VIN
EC71
*0.1U/25V_4
+VIN
EC62
1U/25V_4
+VIN
EC63
1U/25V_4
+VIN
EC79
*0.1U/25V_4
*0.1U/16V_4 *0.1U/16V_4
USB3_SSTXUSB3_SSTX+
1 13
A_DE1 A_DE0
B_EQ1 B_EQ0
B_DE1 B_DE0
0
0
9.5dB
0
0
0
1
13dB
0
1
1
0
4.5dB
1
0
2.7dB
1
1
7.5dB
1
1
5dB
A_INA_IN+
A_OUTA_OUT+
B_OUTB_OUT+
B_INB_IN+
VCC VCC TST B_EQ0 B_EQ1
REXT
B
Cb
11 12
USB3_SSTX-_DC USB3_SSTX+_DC
C704 C705
8 9
USB3_SSRX-_DC USB3_SSRX+_DC
R581 R582
*0_4 *0_4
*0.1U/16V_4 *0.1U/16V_4
USB3_SSTXUSB3_SSTX+ USB3_SSRXUSB3_SSRX+
14
TST2
R578
*4.7K_4
7
REXT
R579
*5.36K_4
+3V
B_DE0 B_DE1 A_EQ0 A_EQ1
PD# I2C_EN
A_DE0 A_DE1
GND GND GND GND GND GND GND GND GND GND GND GND
3.5dB no de-emphasis
TST : Low = Normal LFPS swing / Hight =Turn down LFPS swing
USB3_SSRXUSB3_SSRX+
*0_4 *0_4
For Re-driver : stuff Cb
U25
Ca
*0.1U/25V_4
+VIN
Rb
*0.1U/16V_4 USB30_RX2- R564 USB30_RX2+ R565
+3VPCU
non-USB 3.0 re-driver : stuff Rb
*0_4 USB30_TX2-_L *0_4 USB30_TX2+_L
5 24 10 21 25 26 27 28 29 30 31 32 33 34
A
PROJECT : X1A Quanta Computer Inc.
*PS8713BTQFN24GTR2-A1
Size
NB5
Custom
Document Number
Date: Wednesday, May 13, 2015 5
4
3
2
Rev 1A
USB 3.0 1
Sheet
33
of
49
A
B
+3VPCU
Mini Card WLAN/BT(Option)
C
+3VS5
D
+3V_WLAN_P
CN6 C39 0.1U/16V_4
C7 0.1U/16V_4
C38 10U/6.3VS_6
2
3
4
24mil 3
Q3 C14
+3V_AOCS
2 C8
0.022U/25V_4
*0.1U/16V_4
1
2N7002K
+3V_WLAN_P
[12] [12]
Support Wake Function(Reserve) 2
[12] [12] [13] [13]
3
PCIE_WAKE#
Q10
PCIE_TXP6_WLAN PCIE_TXN6_WLAN
1 MINICAR_PME# *DRC5144E0L
[13]
PCIE_RXP6_WLAN PCIE_RXN6_WLAN CLK_PCIE_WLANP CLK_PCIE_WLANN R374
PCIE_CLKREQ_WLAN#
*0_4/S REQ_WLAN# MINICAR_PME#
0423 change to shortpad
+3V_WLAN_P
For EMI Suggestion R39
CLK_24M_DEBUG R20
10K_4
EC16 *0_4
*33P/50V_4
3
2
PCIE_WAKE#
EC19
*220P/50V_4
EC_PCIE_WAKE# EC17
3 Q9
EC_PCIE_WAKE#
LFRAME#
*220P/50V_4
1 MINICAR_PME# DRC5144E0L
76 77
[35]
[10] CLK_24M_DEBUG [10,32,35] LFRAME#
14'' SATA ODD Bypass CAP close conn 16
2
S7 P1
17
17
15
15
RXN RXP DP +5V +5V MD GND1 GND2 GND3 GND GND
5 6 8 9 10 11 1 4 7 12 13
SATA_RXN1_14 C209 SATA_RXP1_14 C212 ZERO_ODD_DP#
*0.01U/50V_4 *0.01U/50V_4 1 R222
ZERO_ODD_DA#
2 1K_4
+5V_ODD
[12] [12]
5
R217 10K_4
4
1
C247 10U/6.3VS_6
C253 0.1U/16V_4
19 20
5 4
BT_OFF
2 1
6
C319 0.1U/16V_4
RF_OFF_PCH
[4]
INT_RF_OFF#
2N7002KDW
INT_BT_OFF# INT_RF_OFF#
LAD0 LAD1 LAD2 LAD3
PLTRST#
LAD0 LAD1 LAD2 LAD3
[4,16,19,30,32,35] R7 R4
10K_4 10K_4
+3V_WLAN_P
[10,32,35] [10,32,35] [10,32,35] [10,32,35]
3
SATA_TXP0_C
ZERO_PWR_ODD
C320 0.1U/16V_4
ACIN
C262 0.1U/16V_4
C727/C728/C732/C732
7
EC24
*220P/50V_4
ZERO_PWR_ODD EC23
*220P/50V_4
O
X
ODD 15"/17"
X
O
2
SATA_RXP0_C
5 4
C222 0.022U/25V_4
3 2
R182 22_8
ZERO_PWR_ODD
1 HD1
Q14 2N7002K
+5V
2
C729/C730/C731/C733
ODD 14"
SATA_RXN0_C
6 +5V_ODD
[35]
6
SATA_TXN0_C
8
1
ODD CAP Setting
SATA_TXP0_C C381 SATA_TXN0_C C384
0.01U/50V_4 0.01U/50V_4
SATA_RXN0_C C387 SATA_RXP0_C C390
0.01U/50V_4 0.01U/50V_4
SATA_TXP0 [12] SATA_TXN0 [12] SATA_RXN0 SATA_RXP0
[12] [12]
+5V
Default
C400
*10U/6.3VS_6
C398
10U/6.3VS_6
C393
0.1U/16V_4
+5V_ODD
ZERO_ODD_DP# SATA_RXP1_15 SATA_RXN1_15
C592 C590
0.01U/50V_4 0.01U/50V_4
SATA_RXP1 SATA_RXN1
SATA_TXN1_15 SATA_TXP1_15
C588 C585
0.01U/50V_4 0.01U/50V_4
SATA_TXN1 SATA_TXP1 [12]
15 SATA ODD
[12]
VC5 SATA_LED#
SATA_LED#
ACC_LED#
ACC_LED#
R291 200/F_6
[2,4,10,11,12,13,14,15,16,17,18,27,28,29,30,31,32,33,35,41,43] +3V [28,29,30,31,32,33,43] +5V [6,13,30,31,32,33,35,36,37] +3VPCU A
[14]
INT_BT_OFF#
R164
High : ODD power down Low : ODD power on
ZERO_ODD_DA#
3
C321 0.1U/16V_4
2N7002KDW 11/14
Q4
2 2M_4
2
120 mils
ODD1
19 20
Q15 AO3404
3
[35]
15" SATA ODD
1
[35,36]
+5V_ODD
sata-202403-1-13p-r
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
ACIN
[12] ODD_EJECT#
P6 *14 SATA ODD
4
9 R152 1M_4
Q13
ZERO_ODD_DP#
[35]
10 +3V
SATA_TXP1 [12] SATA_TXN1 [12] SATA_RXN1 SATA_RXP1
RF_LINK#
0423 change to shortpad
2
*0.01U/50V_4 *0.01U/50V_4
3 2
16
SATA_TXP1_14 C202 SATA_TXN1_14 C204
+3V_WLAN_P
*0_4/S
SATA HDD
1
14
2 3
4.7K_4
R2
+5V
2
14
TXP TXN
R3 WLAN_LED#
HDD +VIN
1
ODD2 S1
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74
WLAN_NGFF CONN (E-Key)
3
EC_AOCS
NGFF GND 3.3Vaux USB_D+ 3.3Vaux USB_DLED#1 GND PCM_CLK SDIO CLK(O) PCM_SYNC SDIO CMDIO) PCM_IN SDIO DAT0(IO) PCM_OUT SDIO DAT1(IO) LED#2 SDIO DAT2(IO) GND SDIO DAT3(IO) UART W ake SDIO W ake(I) UART Rx SDIO Reset Key 5 KEY1 Key 6 KEY2 Key 7 KEY3 Key 8 KEY4 UART Tx GND UART CTS PETp0 UART RTS PETn0 Clink RESET GND CLink DATA PERp0 CLink CLK PERn0 COEX3 GND COEX2 REFCLKP0 COEX1 REFCLKN0 SUSCLK(32KHz) GND PERST0# CLKREQ0# W _DISABLE2# PEW ake0# W _DISABLE1# GND NFC I2C SM DATA PETp1 NFC I2C SM CLK PETn1 ALERT# GND RESERVED PERp1 UIM_SW P/PERST1# PERn1 UIM_POW ER_SNK GND UIM_POW ER_SRC Reserved1 3.3Vaux Reserved2 3.3Vaux GND
1
200K_4
1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75
USBP7+ USBP7-
1
R8
[12] [12]
GND GND
1
C9 0.1U/16V_4 Q2 AO3409
[4,30,35]
34
+3V_WLAN_P +3V_WLAN_P
R9 10K_4
[35]
E
SATA LED B
1
*AVLC5S_4
2 3 1
R289 1 SATA_R_LED1 LED1 LED 3P WHITE/AMBER
39_6 2
[30]
DEEP_PWRLED#
DEEP_PWRLED#
1
2
+3VPCU R284
3P WHITE LED
(Amber) VC6
PROJECT : X1A Quanta Computer Inc.
LED2 +3V
PWR LED
*AVLC5S_4
VC4
360_4
NB5
*AVLC5S_4
Size
Document Number
Custom
WLAN/NGFF/MSATA
Date: Wednesday, May 13, 2015 C
D
E
Rev 1A Sheet
34of
49
PCH_SLP_S0_N [10,32] SERIRQ [10] SIO_EXT_SMI# [14] SIO_EXT_SCI# [10] EC_RCIN# [20] GPUT_CLK
0421 Modify PCH_SLP_S0_N for Modern Stand By [36] [30]
For
BATSHIP LID_EC#
R312 *0_4 SERIRQ SIO_EXT_SMI# SIO_EXT_SCI# EC_WRST EC_RCIN# GPUT_CLK
126 5 15 23 14 4 16
BATSHIP LID_EC#
113 123
TPDATA TPCLK SUSB# DSWROK_EC SLP_SUS#_EC
[31] TPDATA [31] TPCLK [4,16] SUSB# [4] DSWROK_EC [4] SLP_SUS#_EC Touch-Pad[15,39,40] SLP_SUS_ON
86 85 88 87 90 89
CRX0/GPC0 TMA0/GPB2
EGCLK/W UI27/GPE3 EGCS#/W UI26/GPE2
KSO16/SMOSI/GPC3 KSO17/SMISO/GPC5 L80HLAT/BAO/W UI24/GPE0 L80LLAT/W UI7/GPE7
GA20/GPB5 SERIRQ ECSMI#/GPD4 ECSCI#/GPD3 W RST# KBRST#/GPB6 PW UREQ#/BBO/GPC7
GPIO DTR1/SBUSY/GPG1/ID7 HMOSIGPH6/ID6 HMISO/GPH5/ID5 HSCK/GPH4/ID4 HSCE#/W UI19/GPH3/ID3 CTX1/W UI18/GPH2/SMDAT3/ID2 CRX1/W UI17/GPH1/SMCLK3/ID1 CLKRUN#/W UI16/GPH0/ID0
IT8987
PS2DAT0/TMB1/GPF1 PS2CLK0/TMB0/GPF0 PS2DAT1/RTS0#/GPF3 PS2CLK1/DTR0#/GPF2 PS2DAT2/W UI21/GPF5 PS2CLK2/W UI20/GPF4
GPH7
SMCLK2/W UI22/GPF6/PECI SMDAT2/W UI23/GPF7 SMCLK0/GPB3 SMDAT0/GPB4 SM_BUS SMCLK1/GPC1 SMDAT1/GPC2
PS/2
0.1U/16V_4 0.1U/16V_4 0.1U/16V_4 0.1U/16V_4 0.1U/16V_4 0.1U/16V_4
84 83 82
ACIN
MY16 MY17 CRY1 R326 EC_PWROK
SUSACK#_EC MY16 MY17 *0_4/S
122 99 98 97 96 95 94 93
PCI_SERR# HWPG ACIN GPU_AC_BATT MBDATA3 MBCLK3 CLKRUN#
3
SUSWARN#_EC
117 118 110 111 115 116
[31] [31]
+3V
+3VPCU
1 EC_PWROK RB500V-40
10K_4
+3VPCU
THRM_ALERT_HW#1 [4]
R322 100K_4
Open Drain need pu high
AC_PRESENT_EC EC_PWROK [4,16]
3
[4,20] 0_4
GPU_AC_BATT MBDATA3 [32] MBCLK3 [32] CLKRUN# [10]
[20]
SUSWARN#_EC
[4]
D
EC_WRST
0423 change to shortpad
ODD_EJECT#
1
Q22 *2N7002K
[34]
PCI_SERR# [10] HWPG [4,16,37,38,39]
DGPU_OVT#
[20] C459
DGPU_PWROK R319
For Gsensor H_PECI (50ohm) Route on microstrip only Spacing >18 mils Trace Length: 0.4~6.125 iches 43_4 EC_PECI [2] For GPU thermal GPUT_DATA [20]
R302
4.7K_4
2 D8
1
*AVLC5S_4
R317
R318
R299
EC_PECI_R GPUT_DATA
[34,36]
EC_AOCS [34] VRON [41]
SUSACK#_EC
19 20
Q23 METR3904-G 2 OVT_DETC
3 ACIN
EC_AOCS VRON
56 57
Q24
4.7K_4
C454
3
[12,20,44,46]
1U/10V_4
+1.0V
220P/50V_4
1
PM_THRMTRIP#
[2] H_PROCHOT#
METR3904-G
MBCLK [36] MBDATA [36] MBCLK2 [10,18,27] MBDATA2 [10,18,27]
for Battery charge/charge for DDR Thermal IC
DSR0#/GPG6 GINT/CTS0#/GPD5
[34]
[37] 5VS5_ON ZERO_PWR_ODD
ZERO_PWR_ODD
128 2
AJ089870F01 L23
WAKE UP KBMX
W UI5/GPE5 RING#/PW RFAIL#/CK32KOUT/LPCRST#/GPB7
A/D D/A
CLOCK
ADC0/GPI0 ADC1/GPI1 ADC2/GPI2 ADC3/GPI3 ADC4/W UI28/GPI4 ADC5/W UI29/GPI5 ADC6/W UI30/GPI6 ADC7/W UI31/GPI7
DAC5/RIG0#/GPJ5 DAC4/DCD0#/GPJ4 DAC3/GPJ3 DAC2/GPJ2
120 124
Adapter select for EC +3VPCU
0423 change to shortpad
FAN1SIG [31] R345
DGPU_PROCHOT#
*0_4/S EC_RTC_RST
DGPU_PROCHOT# [20] PCH_SLP_S0_EC R590 *0_4
TEMP_MBAT H_PROCHOT#_EC
Hi EC_RTC_RST
[13]
NBSWON1# SUSC# DNBSWON#
35 112
SUSON LAN_POWER
66 67 68 69 70 71 72 73
BAT_I AD_TYPE SYS_I AD_AIR THRM_MOINTOR2 THRM_MOINTOR3 THRM_MOINTOR1 ADAPTER_SEL_EC
81 80 79 78
EMU_LID THRM_ALERT_HW#1 EC_PCIE_WAKE# 3D_CAM_EN_EC
+3VPCU
==> (45W)
[40]
Change to 1SS355 as Current loss D9 *1SS355
1231 power request
TEMP_MBAT [36]
0421 Add R590 for Modern Stand By 107 18 21
1
==> (90W)
Middle ==> (65W) Low
PCH_SLP_S0_EC
adapter Type check
10K_4
1
FAN1SIG
10K_4 ADAPTER_SEL_EC R331
R332
Adapter
Voltage
NBSWON1# [30] SUSC# [4,16] DNBSWON# [4]
90W
SUSON [38,40,43] LAN_POWER [43]
BAT_I
R332
R331
High
V
X
65W
Middle
V
V
45W
Low
X
V
+3V
R296 R325 R301
*10K_4 4.7K_4 4.7K_4
GPIO33_EC GPUT_CLK GPUT_DATA
R304 R303
4.7K_4 4.7K_4
MBCLK2 MBDATA2
100K_4 100K_4 100K_4
MAINON SUSON VRON
AD_TYPE R342
2
77 76
C
2K/F_4
R341
100/F_4
AD_ID
[36]
1
PW RSW /GPE4 RI1#/W UI0/GPD0 RI2#/W UI1/GPD1
47 48
PWR_LED# [30] MBATLED0# [36] AC_LED_ON# [36] TS_ON [32] FAN1_PWM [31] KB_LED_EN [31] VOLMUTE# [29,30] CAPSLED# [31]
D10
2
TMR0/W UI2/GPC4 TMR1/W UI3/GPC6
1
0423 change to shortpad
TACH0/GPD6 TACH1/TMA1/GPD7 DAC1/GPJ1 DAC0/GPJ0
KSO0/PD0 KSO1/PD1 KSO2/PD2 KSO3/PD3 KSO4/PD4 KSO5/PD5 KSO6/PD6 KSO7/PD7 KSO8/ACK# KSO9/BUSY KSO10/PE KSO11/ERR# KSO12/SLCT KSO13 KSO14 KSO15 KSI0/STB# KSI1/AFD# KSI2/INIT# KSI3/SLIN# KSI4 KSI5 KSI6 KSI7 GPJ6 GPJ7
PWM
PWR_LED# MBATLED0# AC_LED_ON# TS_ON FAN1_PWM KB_LED_EN VOLMUTE# CAPSLED#
PDZ5.6B
36 37 38 39 40 41 42 43 44 45 46 51 52 53 54 55 58 59 60 61 62 63 64 65
FLASH
FMISO/GPG5 FMOSI/GPG4 FSCE#/GPG3 SSCE0#/GPG2
VCORE
B
MY0 MY1 MY2 MY3 MY4 MY5 MY6 MY7 MY8 MY9 MY10 MY11 MY12 MY13 MY14 MY15 MX0 MX1 MX2 MX3 MX4 MX5 MX6 MX7
103 102 101 100
SSCE1#/GPG0 FSCK/GPG7
AVSS
[31] [31] [31] [31] [31] [31] [31] [31] [31] [31] [31] [31] [31] [31] [31] [31] [31] [31] [31] [31] [31] [31] [31] [31]
MY0 MY1 MY2 MY3 MY4 MY5 MY6 MY7 MY8 MY9 MY10 MY11 MY12 MY13 MY14 MY15 MX0 MX1 MX2 MX3 MX4 MX5 MX6 MX7
125 105
24 25 28 29 30 31 32 34
C473
R343 12.1K/F_4
C474 100P/50V_4
0.1U/25V_4
[36]
SYS_I [36] AD_AIR [36] THRM_MOINTOR2 THRM_MOINTOR3 THRM_MOINTOR1
EMU_LID
B
[6] [6] [6]
[28]
EC_PCIE_WAKE#
[34]
R583
*0_4
3D_CAM_EN
[14,43]
R585 R586 R587
+3VPCU
0506 Del R340 +3VS5
R307 R306 R305 R324 R300 R310
10K_4 4.7K_4 4.7K_4 10K_4 47K/F_4 10K_4
NBSWON1# MBCLK MBDATA EC_PCIE_WAKE# LID_EC# S5_ON
R329
10K_4
DNBSWON#
12
R297 R309 R298
[10] PCH_SPI1_SO_R [10] PCH_SPI1_SI_R [10] PCH_SPI_CS0#_R [37] S5_ON
USBPW_ON# 15/F_4 BIOS_SPI_CLK Close to BIOS BIOS_RD# 15/F_4 BIOS_WR# 15/F_4 BIOS_CS# 15/F_4 S5_ON
RXD/SIN0/GPB0 TXD/SOUT0/GPB1
75
[30,33] USBPW_ON# R308 PCH_SPI1_CLK_R
RB500V-40 108 RF_LINK# 109
VSS VSS VSS VSS
[10]
D7
VSS
[11] GPIO33_EC [34] RF_LINK#
PW M0/GPA0 PW M1/GPA1 PW M2/GPA2 PW M3/GPA3 PW M4/GPA4 PW M5/GPA5 PW M6/SSCK/GPA6 PW M7/GPA7
[2,36,41]
C445 *47P/50V_4
Q20 2N7002K
*10K_4
UART
C
27 49 91 104
[4] RSMRST# [38,40,43] MAINON
119 33
H_PROCHOT#
2
H_PROCHOT#_EC R315
RSMRST# MAINON
35
[20]
+3VPCU
VC7
EGAD/W UI25/GPE1
LPC
LPCPD#/W UI6/GPE6
C451 C450 C449 C466 C453 C475
127
74 AVCC
17
1
EC_WRST
3
PCIE_WAKE#
[4,16]
PCIE_WAKE#
LAD0 LAD1 LAD2 LAD3 LPCRST#/W UI4/GPD2 LPCCLK LFRAME#
2
EC_WRST
2
[4,30,34]
10 9 8 7 22 13 6
3
2
D
LAD0 LAD1 LAD2 LAD3 PLTRST# CLK_24M_KBC LFRAME#
VSTBY_FSPI
[10,32,34] LAD0 [10,32,34] LAD1 [10,32,34] LAD2 [10,32,34] LAD3 [4,16,19,30,32,34] PLTRST# [10] CLK_24M_KBC [10,32,34] LFRAME#
VCC VSTBY VSTBY VSTBY VSTBY VSTBY
U13
106
0.1U/16V_4
11 26 50 92 114 121
C457
VSTBY
+3V +3VPCU
+3V_VSTBY
4
+3V_ECACC
5
*HCB1608KF-181T15_S0_6/S CLK_24M_KBC
IT8987E/BX
R321
*10_4
C460
*10P/50V_4
C456 0.1U/16V_4
0423 change to shortpad
IT8502_AGND +3V_ECACC
IT8502_AGND
L24 C463 1U/6.3V_4
*HCB1608KF-181T15_S0_6/S +3VPCU
C464 1000P/50V_4
Close U13
0423 change to shortpad +3V_VSTBY
L20
A
1226 Add THRM_MONITOR2 to EC Pin70 Add THRM_MONITOR3 to EC Pin71 Change GPU_AC_BATT to EC Pin120 Change TEMP_MBAT to EC Pin126 Delete IMVP_PWRGD connection on EC Pin 96 Change DGPU_PROCHOT_EC# to EC Pin 96
HWPG
C447
THRM_MOINTOR1
C469 2
1 0.1U/16V_4
THRM_MOINTOR2
C662 2
1 0.1U/16V_4
THRM_MOINTOR3
C663 2
1 *0.1U/16V_4
0.1U/16V_4
*HCB1608KF-181T15_S0_6/S +3VPCU
A
[2,4,10,11,12,13,14,15,16,17,18,27,28,29,30,31,32,33,34,41,43] [6,13,30,31,32,33,34,36,37]
C446 0.1U/16V_4
+3V +3VPCU
PROJECT : X1A Quanta Computer Inc.
NB5
Size
Document Number
Custom
WLAN/G-Sensor/G-CLK/TS
Date: Wednesday, May 13, 2015 5
4
3
2
1
Sheet
Rev 1A 35of
49
5
4
DC_JACK 90W
14"
6
S 4
BQACN_N
ACDET
1
1
2
2
PR73 [2,35,41] 12.4K/F_4
MBCLK PR80
+3VPCU
PR76
*100K/F_4
SDA GND SCL PAD BATPRES
BATSRC
ACIN
BAT_I
VIDCHG = 8 or 16 × (VSRN – VSRP)
A
PC47 100P/50V_4
PAD PAD PAD
PMON
BATDRV PAD PAD PAD PAD PAD PAD
PR84 *0_2/S
29 17 BQBATSRCPR224
10U/25V_8
10U/25V_8
PR195 *0_2/S
PC164 2200P/50V_4
PC168
PC175
PC162
PD3
10/F_6 PC38
20 BQSRP
PR63
10/F_6
19 BQSRN
PR66
10/F_6
18 BQBATDRV 30 31 32 33 34 35
CSOP CSON
BATT+ SMD SMC
BAT3 *51483-00801-V01 1 2 1 3 2 SMD 4 3 SMC 4 5 6 5 B_TEMP_MBAT 7 6 10 8 7 10 9 8 9
BAT2 BBP28B3-B520A-7H 1 2 1 3 2 4 3 4
B_TEMP_MBAT [41]
5 6 7 8
5 6 7 10 8 9
BATT+
10 9
BATT+
PC204 *100P/50V_4
2014/11/11 updated
PR60 43.2K/F_4 EC90 0.1U/25V_4
Place this cap close to EC
17"
15"
PV change PR77 *0_4/S
+3VPCU
PV update
0.1U/25V_4
PMON
PR59 100K/F_4
PC122 0.01U/50V_4
PR200 *0_2/S
38 37 36
9
21 [35]
PR231 10/F_4
CMPOUT
IDCHG
BQILIM
Place this cap close to EC
SRN
IADP
2 PQ1 *2N7002K
+BATCHG
2
22
PC42 BQIADP 7 BQIBAT 8
PC46 100P/50V_4
PR198 RC1206-R010 1
PR192 2.2_6
4
PC39
ACOK
ILIM
3
PC121 0.01U/50V_4
23 BQLODRV
PR219 100K/F_4
SYS_I
+BAT_DIS PL9 3.3uH/6A(PCMC063T-3R3MN)
0.047U/25V_4
B
CMPIN
PR232 10/F_4 [35]
0_6
27 BQPHASE
0.1U/25V_4
14
PR22 *470_8
PC34 BQB_1
TB_STAT
13
[34,35]
PR53
PROCHOT
SRP 5
C
EC95
2
LODRV
PR218 ACIN
EC94
8 7 6 5 12
BQBATPRES 15 PR75 *0_4/S BQTB_STAT 16
PV change PR71
BQCLK
BQPROCHOT 10
PR78 *0_4/S *100K/F_4
H_PROCHOT# +3VPCU
*0_4/S
EC93
*10U/25V_8
EC5
*10U/25V_8
EC6
*10U/25V_8
EC7 10U/25V_8
PC187
EC8 10U/25V_8
PC186
RB500V-40
PV change
25 BQB_2
PQ17 EMB20N03V
BQDATA 11
MBDATA PC120 0.1U/16V_4
[6,13,30,31,32,33,34,35,37] [37]
PC188
0.1U/25V_4
AD_AIR
100K/F_4
1
4
PC202 *1000P/50V_4
PV change
3 1
1000P/50V_4
PQ19 EMB20N03V
2.2U/10V_6 26 BQHIDRV
PC154
PV update
REGN6V
+3VPCU +5VPCU
Place this cap close to EC
10U/25V_8
BQACDET
PC119 0.01U/50V_4
10U/25V_8
PR69 82K/F_4
+BATCHG
BATSHIP
24
BQ24780SRUYR VCC
PHASE
Place this cap close to EC
[35]
2
For ISN
PV change
PC32
HIDRV
PR79 *0_4/S
PQ11 DRC5144E0L
B
PC1 0.01U/50V_4
1
28
PC137
[35]
1
BTST
1
10/F_8
BQVCC 1U/25V_6
ACDET=14.985V PR70 430K/F_4 PR74 75K/F_4
AC_LED_ON#
PD5 PDZ8.2B
0.1U/25V_4
2
PR56
PR227 +VAD *430K/F_4
+VA_AIR
[35]
PD2 PDZ5.6B
PC33 PD6 1N4448WS-7-F
PR172 2.43K/F_6
+VIN REGN6V
REGN
ACDRV
PD1 PDZ5.6B
PV change
+VAD BQACDRV 4
+5VPCU
CMSRC
EC61 1U/25V_4
1000P/50V_4
BQCMSRC 3 +VA
EC60 1U/25V_4
0.1U/25V_4
PR61 *0_4/S
ACP
[35]
PU3
PQ12 DRC5144E0L
1
1000P/50V_4
MBATLED0#
PR11 1M_4
PR4 1K/F_4
TEMP_MBAT [35] EC59 1U/25V_4
2200P/50V_4
3
PV change
PC142
PC3 *100P/50V_4
PC37
0.1U/25V_4
PR64 *0_4/S
PV update +3VPCU
PC2 *100P/50V_4
PC41
1U/25V_6
+VA
1K_6
PR3 200K/J_4
+PRWSRC
4.7U/25V_8
MMDT2907A
PR29
[35] MBDATA [35] MBCLK
PV change
For EMI
PR2 330_4
A
EC91 0.1U/25V_4
PROJECT : X1A Quanta Computer Inc. Size
NB5
Custom
Document Number
4
3
2
Rev 1A
Charger (BQ24780)
Date: Friday, May 22, 2015 5
D
3 2 1
1
PR1 330_4
EC58 1U/25V_4
PR221 4.02K/F_4
PC150 0.1U/25V_4
PC28 0.01U/50V_4
PR68
3 2 1
2
PR20 220K_4
PC157 0.1U/25V_4
8 7 6 5
220K_4
PC44 PR223 4.02K/F_4
BAT1 *BBP28B3-B520A-7H 1 2 1 3 2 SMD 4 3 SMC 4 5 6 5 B_TEMP_MBAT 7 6 10 8 7 10 9 8 9 BATT+
PL4 *0_8/S
0.1U/25V_4
Q2
6 Q1
PR179 2.43K/F_6
3
5
BQBATDRV
Place this ZVS close to Far-Far away +VIN
PR30 1M_4
2014/11/11 updated
4.02K/F_4
1BQACN
PQ2
4 PR14
3 2 1
G
BATDIS_G
PR178 *0_2/S
2
PR176 *0_2/S
2BQACP
+5VPCU
2
D 1
S
D 4
PD9 *P4SMAJ20A
PC144
BQACP_N
IDEA_G
+VAD
2
5
ACN
PV update
PC152 2200P/50V_4
Place this ZVS close to Diode away +VIN
C
2
G
1 PD10 PC153
2
EC69
BATT+
PL3 *0_8/S
+VIN
PR177 RC1206-R010 1
0.1U/50V_6
DC-IN CONN
PC183
P4SMAFJ20A
3 4 9 10
W LED GND GND ALED GND GND
0.1U/25V_4
GND
*0_8/S
+PRWSRC
3 2 1
5
+BATCHG
PQ3 +BAT_DIS FDMS7698
+VAD
1 2 3
4
7
EC92 *10U/25V_8
LED1
5 6 7 8
*0_8/S PL7
0.1U/25V_4
8
PQ18 EMB20P03V
PL8
1 2
VDD VDD
0.1U/25V_4
6
LED2
36
PQ16 AP0203GMT-HF
+VA
CN5
AD_ID 5
1
[35]
+VA_AC
D
2
Do Not add test pad on BATDIS_G signal AD_ID
EC68 1000P/50V_4
3
Sheet 1
36
of
49
5
4
3
2
1
DC/DC +3VS5/+5VS5
37 Do Not add test pad on VCC & LDO pin +3VPCU
+VIN_3VS5
HWPG
SY8208BPG
2
HWPG
BST
6
PC208
PC226
SY8208BBST
PR236 150K/F_4
FB
SY8208BFB
PR240
2 PC216 0.01U/50V_4
1K/F_4
PC236
PC240
C
SY8208B
3
PR43 *4.99K/F_4
EN2
SY8208BVOUT
3
PC237
22U/6.3V_8
+VIN
4
PC242
22U/6.3V_8
7
PC235
22U/6.3V_8
SY8208CEN
1 *UDZVTE-173.6B
2
C
VOUT
PR235 499K/F_4 SY8208BLDOEN
2
PC64 *2200P/50V_4
PC239
*22U/6.3V_8
PC224 *0.1U/16V_4
PR245 *0_2/S
0.1U/16V_4
PR91 1M_4
+
PR97 *2.2_6
EN1
*150U/6.3V_5X3.8 ESR20
1
SY8208BEN
+3VPCU
PD4
PL17 2.2uH/8A(PCMC063T-2R2MN)
0.1U/25V_4
10 SY8208BSW
PR89 *0_4/S S5_ON
PV change
PJP4 *POWER_JP/S
+3.3VS5_S
SY8208BBST_S
1
SW
D
+3VS5
PC60
PR88 0_6
PGOOD
PR87 *0_4/S
EC4
[4,10,15,16,32,34,35,39,40,43,44,46] [4,30,32,33,38,39,40,41,42,43,44,46]
1
PV change
9
PC218
*1000P/50V_4
GND PR83 10K/F_4
PC219
0.1U/25V_4
*0_8/S PC209
2200P/50V_4
+3VS5
[4,16,35,38,39]
8
4.7U/25V_8
VIN
PC211 2.2U/6.3V_4
4.7U/25V_8
LDO
PL15
0.1U/25V_4
5 D
+3VS5 +5VS5
+3.3 Volt +/- 5% TDC:8A EDP:9A
+VIN
PU13
1
2 PQ4 *METR3904-G
PR44 *4.02K/F_4
Do Not add test pad on VCC & LDO pin PU11
+VIN_5VS5
PR39 *0_4/S HWPG
SY8208CPG
2
BST SW
PC165
PC149
PC30 SY8208CBST_S
0_6 SY8208CSW
PR50 *1K/F_4
PC27 *0.1U/16V_4
PC24 *2200P/50V_4
VOUT 5
USB Charge Support
Ra
Rb
4
SY8208CVOUT
3
SY8208CFB
VCC FB
PC176 2.2U/6.3V_4
PR207 1K/F_4
PC217
PC223
PC205
PC210
PC207 22U/6.3V_8
PR210 1M_4
PC227
22U/6.3V_8
PR36 1K/F_4
EN
22U/6.3V_8
S5_ON
1
*22U/6.3V_8
SY8208CEN
2
+ PR230 *0_2/S
PR34 *2.2_6
5VS5_ON
Ra
+5VS5_S PL11 2.2uH/8A(PCMC063T-2R2MN)
0.1U/25V_4
B
PJP3 *POWER_JP/S
1
10
+5VS5
0.1U/16V_4
[35]
PR35
PC160
*150U/6.3V_5X3.8 ESR20
Rb
SY8208CBST
PGOOD
PV change [35]
6
PC161
2
9
B
0.1U/25V_4
0.1U/25V_4
GND
+5 Volt +/- 5% TDC:8A EDP:9A
*0_8/S PC170
PC167 2.2U/6.3V_4
+VIN PL5
8
2200P/50V_4
VIN
4.7U/25V_8
LDO
4.7U/25V_8
7
1
+5VPCU
PC180 6800P/50V_4
SY8208C A
VINE (No support)
Stuff
ENVY (Support)
NA
NA Stuff
A
Do Not add test pad on VCC & LDO pin
PROJECT : X1A Quanta Computer Inc.
NB5
Size Custom
Document Number
Date:Friday, May 22, 2015 5
4
3
2
Rev 1A
3/5VPCU(RT8243A) Sheet 1
37
of
49
1
2
3
4
5
38 PR161 [4,16,35,37,39]
HWPG
PV change *0_4/S
PR165 A
A
SUSON *0_4/S PC130 *0.1U/16V_4 PR158 243K/F_4 PR162 499K/F_4
+VIN_DDR
LGATE
VLDOIN
VDD
4.7U/25V_8
4.7U/25V_8
2200P/50V_4
0.1U/25V_4
2
1
1P35V_VDD
PR160 *0_2/S
PAD
PC131 2200P/50V_4
PC127
PC123
PC124
PC126
PC294
21
VDDQ 5
FB
PGND 14
VID
LPMB 3
11
*10U/6.3V_6
6 1P35V_FB
PR159 +5VS5
PQ31 MDV1595SURH
PC128
Rds(on) 14m ohm 1P35V_VID
*0_2/S
PC125 1U/6.3V_4
B
+
PR163 2.2_6
+5VS5
4
PR171
PJP2 *POWER_JP/S
+1.35VSUS_S
1
1P35V_LGATE
12
PL26 1uH/11A(PCMC063T-1R0MN)
0.1U/25V_4
2
PHASE
VTTREF
PC132
+1.35VSUS
15
2.2_6
*220U/2.5V_5X3.8 ESR12
PC135 0.033U/10V_4
1P35V_PHASE
PR164
+1.35VSUS
*22U/6.3V_8
PC136 0.1U/16V_4
19
4
*22U/6.3V_8
4
16
PC289
22U/6.3V_8
PR170
1P35V_BOOT
PC292
22U/6.3V_8
PU10 RT8231BGQW
100/F_4
18
PC290
0.1U/16V_4
BOOT1 VTTGND
PC293
PC129
3 2 1
DDR_VTTREF
TON
UGATE
1P35V_UGATE
VTTSNS
( 3mA ) B
CS
8 7 6 5 1
PQ30 EMB20N03V
17
PC291
3 2 1
2 PC134 10U/6.3V_6
VTT
+1.35V +/- 5% Countinue current:6A Peak current:8A OCP minimum:12A
*0_8/S
8 7 6 5
20
PGOOD
+0.65V_DDR_VTT
S5
S3
+0.75V_DDR_VTT
+VIN PL25
1P35V_TON
0.1U/25V_4
1P35V_S5
PC133 *0.1U/16V_4
10
*0_4/S
7
PV change
1P35V_S3
PR166
MAINON
8
[35,40,43]
1P35V_PGOOD
DDR_VTT_PG_CTRL_R
1P35V_CS
PR168 *0_4 [18]
9
PV change
13
[35,40,43]
1P35V_VDDQ
*0_2/S PR167 10.2K/F_4 PR169 10K/F_4
C
C
D
D
+1.35VSUS
[3,6,17,18,40]
PROJECT : X1A Quanta Computer Inc. Size Document Number DDR3 (RT8231B)/1.8VS5
NB5 Friday, MayDate: 22, 2015 1
2
3
4
Rev 1A
Sheet 38 5
of
49
5
4
3
2
1
39 PV update PR48 84.5K/F_4 D
D
6
[15,35,39,40]
2
1237ENPCH
SLP_SUS_ON PR65 *0_4/S
PV change
2
+1.0V_DEEP_SUS
PC43 1237BSTPCH_S
PR62 0_6
PL13 1uH/11A (PCMC063T-1R0MN)
0.1U/25V_4
10 1237LX 11 16 17 18
EN
PC196 *0.1U/16V_4
C
PJP1 *POWER_JP/S
+1.0VS5_S2
PR67 *2.2_6 +
PFM PGND PGND PGND PGND PGND AGND
Peak current:9A
PR239 *0_2/S
12 13 14 15 19 4
PC45 *2200P/50V_4
PC220
PC221
PC228
PC54
PC59
PC229 *220U/2V_7343
1237PFMPCH 3
Countinue current:6A
PC148 0.1U/25V_4
*22U/6.3V_8
LX LX LX LX LX
PGOOD
PR213 *0_2/S
PC174
*22U/6.3V_8
1237PGPCH 1
HWPG
HWPG
PC181
22U/6.3V_8
[4,16,35,37,38]
20 1237BSTPCH
PC171
22U/6.3V_8
PV change
(V1.00A+V1.00_MODPHY+VccPRIM_CORE)
0.1U/16V_4
BST
+VIN
1
PC201 1U/6.3V_4
PR54 *0_4/S
PL6 *0_8/S
+1.0VS5 Volt +/- 5% PC179
2200P/50V_4
IN IN IN
VCC
4.7U/25V_8
21
4.7U/25V_8
NC
*0_4
+VIN_0.95V
8 9 22 0.1U/25V_4
+5VS5
7
TON
PU12
PR38
C
PR47 2.61K/F_4
23
1237SSPCH
PC40 0.1U/16V_4
SS
FB
5 1237FBPCH
1237FBPCH_S
PR208 10K/F_4
AOZ1267QI-02
PR95 *0_6/S +3VS5
+1.8V +/- 5% TDC:1A EDP:2A
PC70 4.7U/6.3V_6
LX
SY8002B EN
6
PC67 0.1U/16V_4
R2
+1.8V_DEEP_SUS
PR246
2
GND
*0_2/S
FB
1
SLP_SUS_ON
PL18 1uH/2.6A_2520
B
3
PR241 20K/F_4
R1
PC241
PC238 0.1U/16V_4
PG
PR101 *0_4/S [15,35,39,40]
VIN
PU14
5
10U/6.3V_6
PR96 *0_4/S HWPG
4
B
PR242 10K/F_4
VO=(0.6(R1+R2)/R2)
A
A
PROJECT : X1A Quanta Computer Inc.
+VIN [28,31,33,34,36,37,38,41,42,43,44,45] +3VS5 [4,10,15,16,32,34,35,37,40,43,44,46] +5VS5 [4,30,32,33,37,38,40,41,42,43,44,46]
NB5
Size
Document Number
Custom
+1.1VS5 (RT8228)/2.5V
Date: Friday, May 22, 2015 5
4
3
2
Sheet 1
Rev 1A 39
of
49
5
4
3
+1.0V_DEEP_SUS [9,13,15,16,39] +1.0V [2,4,6,16,32,35] +3VS5 [4,10,15,16,32,34,35,37,39,43,44,46] +VCCSTPLL [2,4,5,6,9,41] +VCCIO [2,6,16]
[15,35,39]
3
PR81 *47K/F_4
1
SUSON
4
2
+VCCSTG_ON
PR11161 *0_4/S
2
SLP_SUS_ON
3
PR90 *0_4
<= 65usec full load ready +1.0V_DEEP_SUS
PU4 *TC7SZ08FU
PQ6 *DMG3414U-7
PC48 *1000P/50V_4
1 2 PC65 1U/6.3V_4
PV Change
PC72 0.1U/16V_4
PV Update
VIN VIN
VOUT
PV Update
PR11174 0_4
PC56 0.1U/16V_4
VBIAS
PC57 10U/6.3V_6
4
MAINON PR82 0_4
PR72 *22_8
6
Rb PR11168 *0_6
TDC:3A +VCCIO
GND
35
5
ON
PC53 *0.1U/16V_4
PR11175 0_4
PV Update
D
PV Update +1.0V_MODERN
PR92 0_6
PR98 *0_6/S
PV Update
Rc
+1.0V
Ra
8
PC55 0.1U/16V_4
PC69 *10U/6.3V_6
+5VS5
PV Update
PCH_SLP_S0_EC
Rd
2 C
PQ5B *2N7002KDW
1
3
3
+3VS5
[35,38,40,43]
5
TDC:0.04A
VIN
+VCCSTPLL
+VCCSTPLL
PR102 *0_4
MODERNSTB_EN
PR86 *2M_4
Reserve for Modern StandBy
C
Support Modern standby mode 1. Remove Ra/Rc & stuff Rb/Rd 2. stuff block C & D
PV Update
4
PQ5A *2N7002KDW
9
TDC:0.16A
PR100 *0_6/S
PR85 *1M_4
PU5 AOZ1335DI
<= 65usec full load ready
1
[35,38,43]
40
20150106 updated PC68 0.1U/16V_4
5
D
1
+1.0V_DEEP_SUS
+3VS5
PR93 *0_4
2
PV Update
+3VS5
Block C
+1.35VSUS
PV Update
3
[35] PC351 0.1U/16V_4
<= 65usec full load ready
PR11169 *47K/F_4 [35,38,40,43]
2
MAINON
1
PR11170 *0_6/S
1
PCH_SLP_S0_EC
[35,38,40,43]
3
PC301 0.1U/16V_4
PR11166
4
<= 65usec full load ready
2
2
MAINON
0_4 PR103 *0_4/S
TDC:0.3A PQ59 *DMG3414U-7
PC349 *1000P/50V_4
PV Update
PR99 *0_4
PU6 *NL17SZ08DFT2G
PC295
PQ40 DMG3414U-7
*1000P/50V_4
PC347 0.1U/16V_4
+1.0V 2,4,6,16,32,35 +3VS5 4,10,15,16,32,34,35,37,39,43,46 +5VS5 4,30,32,33,37,38,39,41,42,43,44,45,46 +VCCIO 2,6,16 +1.35VSUS 3,6,17,18,38,46 +VCCSTPLL 2,4,5,6,9,41 +1.0V_DEEP_SUS 9,13,15,16,39 +1.35V_VCCPLL_OC 6
PR11173 *22_8
+1.35V_VCCPLL_OC +5VS5 PR11165 *22_8 PR11164 *1M_4
4
6
3
5 2 PQ61A *2N7002KDW
1
4
6
5
PR11171 *2M_4
1
B
PV Update
3
+5VS5
2
PC296 10U/6.3V_6
PV Update
PC350 *10U/6.3V_6
+1.0V_MODERN
PR11172 *1M_4
+1.35V_VCCPLL_OC
Reserve for debug
B
PC348 *0.1U/16V_4
PR11167 *0_6/S
PV Update
PV Change
+1.0V_MODERN
TDC:0.26A
1
+1.0V_DEEP_SUS
5
Block D
PC352 *0.1U/16V_4
3
Reserve for Modern StandBy
PQ41A *2N7002KDW
PR11163 *2M_4
PQ41B *2N7002KDW
PQ61B *2N7002KDW A
A
PROJECT : X1A Quanta Computer Inc.
NB5
Size
Document Number
Custom
+1.0V/+VCCSTPLL
Date: Friday, May 22, 2015 5
4
3
2
Rev 1A Sheet
1
40of
49
2
1K/F_4
PC23 0.033U/10V_4
PR31 14K/F_4 PR197
PV change
7.5K/F_4
PC173
PR199
2
5 1 2 3
1 2 3
2
100U/25V
2
PC225
VCCGT TDC:22A EDP:45A +VCCGT
For Acoustic
B
1
1 +
PR233 2.2_6
PR234 *0_2/S
PR238 *0_2/S
2
8
7
PQ22 FDMS3664S
1
1
DCR=0.48m ohm
+ PC234 *100U/25V
2200P/50V_4
+
PC189 0.1U/25V_4
PC194
0.1U/25V_4
*4.7U/25V_8
4.7U/25V_8
15
20 PR211
19
+ PC206 390U/2.5V_5X5.8ESR10
+ PC222 390U/2.5V_5X5.8ESR10
PC58 *220U/2V_7343
PC212 2200P/50V_4
PV change
CSN_GT1
LG_GT2 SWN_GT1
22.6K/F_4 CSP_GT1
8
CSREF_GT
9
CSP_GT2
7
CSSUM_GT
+VIN_VCCGT
HG_GT1_L
PC184 0.01U/50V_4
18
2
10
1
HG1
PC195
22
53 13
+5VS5
2.2U/6.3V_4
S2
+5VS5
C
PV change S2
1U/6.3V_4
9
SW_GT1
PQ23 *FDMS3664S
PC31
S2
PC29
7
2.2_6
G2
CSCOMP_GT
ILIM_GT
COMP_GT
PR214 0_4/P
PR212
8
EPAD VCC
4.7U/25V_8
LG_CORE
23 6
4.7U/25V_8
SW_CORE
24 SW3
LG3/ICCMAX_1b CSCOMP_2ph
PVCC
2
BST_CORE
ILIM_2ph
CSSUM_2ph
PC199
PL16 0.15uH/40A(PCMB104T-R15MS0R487)
5
HG_CORE
26
HG3 COMP_2ph
5
4
FB_2ph 3
DIFFOUT_2ph/IccMax_2ph
IOUT_2ph 1
2
VSN_2ph
VSP_2ph
52
CSP2_2ph
PR204 14K/F_4
PC200
SW_GT1
6
CSP_CORE
25
BST3
LG_GT1
21
PC197
5
CSN_CORE
33 CSP_1a
17
9
6
VSP_CORE
32 CSN_1a
1
VSN_CORE
VSP_1a
VSN_1a
COMP_1a
SW_GT1 0.22U/25V_6
S1/D2
51
PV change
2
0.1U/16V_4
30
27
TSENSE_2ph
CSREF_2ph
FB_GT
DIFFOUT_GT
PC13 1000P/50V_4 *0_4/S
IOUT_GT
PR8
VSN_GT
*0_4/S
CSP1_2ph
PC172 0.1U/16V_4
PV change PV change
PR9
VSP_GT
+VCCGT
TSENSE_GT
*100P/50V_4 PR247
*0_4/S *0_4/S *0_4/S
EN
VR_HOT# SDIO ALERT# SCLK VRMP
PSYS
PC7
TSENSE_1ph
IOUT_1a
DRON
VR_EN
30.9K/F_4
SW 2 LG2/ICCMAX_1a
PW M/ADDR_VBOOT
VR_RDY
PR12
BST2
PU1 NCP81206
IOUT_1b
PC177 0.01U/50V_4
IMVP_PWRGD [35] VRON [36] PMON
HG2
COMP_1b
10K/F_4 PR15 PR16 PR18
PV change
35 36 37 38 12
CSP_1b
41
39 VR_HOT# SDIO ALERT# SCLK VRMP
ILIM_1a
34 *390P/50V_4
PV change40
16
CSN_1b
ILIM_1b
+VIN
PL10 *0_8/S
D1
75/F_4 10/F_4 *0_4/S 49.9/F_4 1K/F_4
43
IOUT_SA
LG1/ROSC
BST_GT1
D1
PR32 PR28 PR26 PR21 PR46
PR7
+3V
46
SW 1
14
D1
PR185 PR180 PR183 PR181
PC159 470P/50V_4 100K/F_4 *0_4/S 51.1K/F_4 *0_4/S
PV change C
ILIM_SA
VSN_1b
PV change
PC191
BST1
PC49 *220U/2V_7343
CSN_CORE
PC143 2200P/50V_4
PC198
G1
+VIN_VCC_CORE
44
VR_RDY
PV change
[2,35,36] H_PROCHOT# [5] VR_SVID_DATA [5] VR_SVID_ALERT# [5] VR_SVID_CLK
45
CSP_SA
42
PWM_SA DRON
34K/F_4
48
CSN_SA
1000P/50V_4 COMP_SA 47
PC151
1K/F_4
[42]
PR182
PC15 0.01U/50V_4
A
+ PC203 390U/2.5V_5X5.8ESR10
1_6
S2
PC9 180P/50V_4
PR13
VSN_SA
VSP_1b
PR237 *0_2/S
HG_GT1_L
D1
7.5K/F_4
49
VSP_SA
+ PR228 *0_2/S
+VIN_VCCGT PR55
HG_GT1
S2
PV change
SWN_SA
+VCC_CORE
SWN_CORE
S2
PR5
PQ14 FDMS0308AS
G2
PR217 100K/F_4 NTC PC16 0.022U/25V_4
PR6 14K/F_4
[42]
2 PC11
Place close to VCCSA Inductor
CPU CORE TDC:21A EDP:40A
S
S1/D2
1
S
D1
PC8 1000P/50V_4
CSN_SA
PC4 0.1U/25V_4
DCR=0.48m ohm
PR175 2.2_6
D
D1
[42]
PC10 2200P/50V_4
PL14 0.15uH/40A(PCMB104T-R15MS0R487)
G
4
G1
PV change
[42]
69.8K/F_4
1K/F_4
B
D
PR205 11K/F_4
28
PV change
PR19
PSYS
PR112
1000P/50V_4
100/F_4
DEL PQ21 (20141216)
G
4
29
PR174 *0_4/S
PQ21 FDMS0308AS
ILIM_CORE PR194 TSENSE_CORE PC182 COMP_CORE
PR10
PC166
PC156 470P/50V_4
2.49K/F_4
PC5
VCCSA_SENSE VSSSA_SENSE
140K/F_4
PV change
PR187
[6] [6]
1000P/50V_4
PC14 1000P/50V_4
IOUT_CORE
PR109
PC141
0.22U/25V_6
PV change
+VCCSA 100/F_4
PC6
S
1_6
0.01U/50V_4 15P/50V_4
PC178
PR173 *0_4/S
G
PC139
5
1K/F_4
VR_SVID_DATA VR_SVID_ALERT# VR_SVID_CLK H_PROCHOT#
PV change
D
PC138
1
PC158 0.1U/16V_4
31
PR24 75/F_4
11
PR189 45.3/F_4
50
PR184 *110/F_4
PR52
PC192
PQ13 FDMS7698 4 HG_CORE_L
1 2 3
PC26 1000P/50V_4
A
PR186 100/F_4
SWN_CORE
PC140
0.1U/25V_4
100K/F_4 NTC *4.7U/25V_8
PR40
PR41 *0_4/S
41
+VIN
PL1 *0_8/S
4.7U/25V_8
PR111 100/F_4 +VCCSTPLL
4.7K/F_4 PC185 1000P/50V_4
+VIN_VCC_CORE
1
4.7U/25V_8
VCC_SENSE VSS_SENSE
PR220
2
5
PC22 0.018U/16V_4
100/F_4 [5] [5]
2K/F_4 PR49
PR216 *0_4/S
4
Place close to VCORE Inductor
4.7U/25V_8
PV change PR110 +VCC_CORE
3
PR51
PC193 1000P/50V_4
5
1
LG_GT1
100/F_4 PR17 1K/F_4
100/F_4
PV change TSENSE_GT
TSENSE_CORE
PC12 2200P/50V_4 PR188 27K/F_4
PR196 *0_4/S
PV change
PV change PR45
SWN_GT1
7.15K/F_4
PR203 39.2K/F_4
PC25 0.047U/25V_4
PR23 49.9/F_4 PR25 PR191
place close to VCORE MOSFET
PC18 330P/50V_4 1K/F_4 100K/F_4
D
PR33
PC17 15P/50V_4
165K/F_4
PR27 2K/F_4
PC20 1800P/50V_4
PC21 *390P/50V_4
PC19 2200P/50V_4
2
2
Place close to GT1 Inductor
PR209
PR193 75K/F_4
1
place close to GT MOSFET
1
PR202
100K/F_4 NTC
PR222
15K/F_4
1
15K/F_4
2
PR37 CSN_GT1 10/F_4 PR201
D
PR206 *0_4/S
100K/F_4 NTC
PV change
PR190 14.3K/F_4
program IccMax_2ph
PR226 100K/F_4 NTC
PR248
470P/50V_4
VCCGT_SENSE VSSGT_SENSE
PC163
[7] [7]
PROJECT : X1A Quanta Computer Inc.
NB5
Size
Document Number
Custom
CPU VR IC (NCP81206)
Date: Friday, May 22, 2015 1
2
3
4
Sheet 5
Rev 1A 41of
49
1
2
3
4
5
42 A
A
+VIN_VCCSA
+VIN PL2
8
EN
7
SW_SA 0.22U/25V_6
0.1U/25V_4
B
NCP81253
PR215 2.2_6
PC36 2.2U/6.3V_6
DRVL
5
LG_SA
4 PQ20 MDV1595SURH
3 2 1
VCC
9 6
4
PAD GND
PV change +5VS5
+VCCSA
PR225 *0_2/S
PR229 *0_2/S
PC51
PC213
PC214
PC215
PC50
PC52 *22U/6.3V_8
SW
DCR=4.2m ohm PL12 0.47uH/17.5A(PCMC063T-R47MN)
*22U/6.3V_8
PW M
PQ15 EMB20N03V
22U/6.3V_8
DRON
3
PC35 VGTA_BST1
22U/6.3V_8
PR58 *0_4/S
1
22U/6.3V_8
[41]
PWM_SA
BST
VCCSA TDC:8A EDP:12A
22U/6.3V_8
[41] B
2
PR57 *0_4/S
4
8 7 6 5
DRVH
PU2
PV change
HG_SA_L
PC147
2200P/50V_4
1_6
PC146
0.1U/25V_4
PR42
PC145
4.7U/25V_8
HG_SA
3 2 1
VCCSA
PC155
4.7U/25V_8
8 7 6 5
*0_8/S PC169
PC190 2200P/50V_4 CSN_SA
[41]
SWN_SA
[41]
C
C
D
D
PROJECT : X1A Quanta Computer Inc. Size
NB5
Custom
Date: 1
2
3
4
Document Number
Rev 2A
+VCCSA (NCP81253) Friday, May 22, 2015 5
Sheet
42
of
49
5
4
3
2
1
43 D
D
+5VS5
+5VS5
4 PC80
GND
PC75 0.1U/16V_4
11 15
CT2
ON2
PC62
PC81 220P/50V_4
7
6
VIN2
1
2 VIN1
VIN2
GND GND
LAN_POWER
[35]
PR243 *0_4/S
ON1
PC233 220P/50V_4
+VIN
C
11
PC71 0.1U/16V_4
PC66 *10U/6.3V_6
15
VBIAS
PC231 *0.1U/16V_4
PC79 1000P/50V_4
B
+3VSUS
PR244 *0_4/S 3
PC78 *0.1U/16V_4
PR94 *0_6/S
8 9
0.1U/16V_4 MAINON
5
10
CT1
ON1
PC83 *0.1U/16V_4
12
PR107 *0_4/S
4
+5VS5
PR106 *0_4/S 3
MAINON
PC74 0.1U/16V_4
0.04A +3VSUS_S2
OUT2 OUT2
PU7 APL3523A
VBIAS
0.1U/16V_4 [35,38,40]
PC73 *10U/6.3V_6
PC77 *10U/6.3V_6
VOUT1 VOUT1
CT2
GND
PU8 APL3523A
*0_6/S
PC61 0.1U/16V_4
ON2
5 SUSON
[35,38,40]
PC230 *0.1U/16V_4
10
PC84 0.1U/16V_4
13 14
PR105
8 9
VIN1
7
6
2
OUT2 OUT2
+3VLANVCC
+5V_S2
PR104 *0_8/S
CT1
PC82 *10U/6.3V_6
VOUT1 VOUT1
+5V +3VLANVCC_S2
PC63 0.1U/16V_4
5.1A
0.67A
12
13 14
PC76 0.1U/16V_4
VIN2
+3V_S2
VIN2
C
PR108 *0_8/S
VIN1
+3V
VIN1
PC85 0.1U/16V_4
5.2A
+3VS5
+3VS5
1
+3VS5
PC232 1000P/50V_4
B
+5VS5
+5V_CAM
20150212 updated PR301 *1M_4
PR300 *22_8
PQ55 *EMB32N03K
1 2 5 6
+VIN
PC345 *0.1U/16V_4
PQ57 *2N7002K
PR302 *5.1M_4
2
PC346 *2200P/50V_4
0.6A +5V_CAM
2 PQ54 *DRC5144E0L
PR304 *1M_4
1
3D_CAM_EN
1
[14,35]
1
3
2
4
PQ56 *2N7002K
3
PR303 *1M_4
3
3
PC344 *10U/6.3V_6
PC343 *0.1U/16V_4
+5V_CAM_ONG
[2,4,10,11,12,13,14,15,16,17,18,27,28,29,30,31,32,33,34,35,41] +3V [28,29,30,31,32,33,34] +5V [28,31,33,34,36,37,38,39,41,42,44,45] +VIN [4,10,15,16,32,34,35,37,39,40,44,46] +3VS5 [4,30,32,33,37,38,39,40,41,42,44,46] +5VS5 [30,32] +3VLANVCC A
A
PROJECT : X1A Quanta Computer Inc.
NB5
Size
Document Number
Custom
Dis-charge IC (SLG55448)
Date: Friday, May 22, 2015 5
4
3
2
Sheet 1
Rev 1A 43
of
49
5
4
+5VS5
8899VCC
+5VS5
2200P/50V_4
150K/F_4
1 2 3
PQ27 EMB20N03V
PR294 *0_2/S
BOOT1
8899BOOTA1 42
PR298 2.2_6
PHASEA1
LGATE1 UGATE2
BOOTA1
PU16
BOOT2
0.1U/25V_4
4 PR297 619/F_4
PC288 2200P/50V_4
8899LGATEA1 45
PQ28 MDV1595SURH
LGATE2 33
PV Change
1U/25V_4
PR144
8899VCC
PR295 150/F_4 C
34
10K/F_4
8899ISENA1N 35
PR291 845/F_4
ISEN2P ISENA2P ISEN2N ISENA2N ISEN1P
8899ISENA1P 36
ISENA1P
ISEN1N
ISENA1N
ISEN3P ISEN3N
PC279 0.1U/16V_4
PR286
8899VSENA
32
0_4 PC273
PR290 0_4
PR280
PR274 0_4
*82P/50V_4
8899COMPA30
8899TON
47 46
8899UGATE1 PC287 8899BOOT1
48
0.1U/25V_4 8899PHASE1
49
8899LGATE1
1 2
8899UGATE2 PC282 8899BOOT2
52
0.1U/25V_4 8899PHASE2
51
8899LGATE2
5
8899ISEN2P
6
8899ISEN2N
8
8899ISEN1P
7
8899ISEN1N
VSENA
VSEN
COMPA
COMP
PC270 0.1U/25V_4
8899UGATE1
8899PHASE1
[45]
8899UGATE2
[45]
8899LGATE2
11
10K/F_4 8899VSEN
PR265
31
FBA
FB
13
8899COMP PR264
PR124
19.1K/F_4 PR154
PV Change
8899SET2
26
130/F_4 PR153
SET2
SET1
1.65V
18K/F_4 PR276 8.87K/F_4
OFSA
OFS
8899EN
37
PC271
Vih=2V
EN
PW M3 IMON
VDDIO
IMONA
PR127
8899SET1
PR271
PR118 10/F_4
23
PC108
PC258 *0.1U/25V_4
PR259 *0_4/S
VGPU_CORE_SENSE
PR261
VSS_GPU_SENSE
[22]
[22]
*0_4/S
8899VCC
PR116 10/F_4
PV Change
13.7K/F_4 PR151 2.32K/F_4
PV Change PR141
8899OFS
8899VCC *20K/F_4
B
Vset1
109.5mV
53
Delta Vset1
309.9mV
41
Vset2
121.8mV
Delta Vset2
18.7mV
PR138 6.34K/F_4
3 PR260 13.7K/F_4
15
8899IMON
17
8899IMONA
PR142 18.7K/F_4
PC259 *100P/50V_4
PR149 18.7K/F_4
PR140 16.5K/F_4 PR139 10K/F_4
PR156 8.06K/F_4
8899PWROK
PR269 100K/F_4 NTC
PR263 100K/F_4 NTC
PR273
[20] [20] [12,20,35,46]
SVI2_CLK SVI2_DATA SVI2_SVT DGPU_PWROK
DGPU_PWROK
PR125
*0_2/S
8899SVC
PR262
*0_2/S
8899SVD
PR131
*0_2/S
8899SVT
PR285
*0_2/S
8899PGOODA
PR135 PC111 0.47U/6.3V_4
*10K/F_4
A
8899VCC
PUT COLSE TO MVDDQ HOT SPOT
PUT COLSE TO VDDC HOT SPOT
PR143 *10K/F_4
PROJECT : X1A Quanta Computer Inc.
8899PGOOD
+3VS5 PR134 *10K/F_4
PR292 *0_2/S Size
NB5
Custom
Date: 5
C
PC268 0.1U/16V_4
PR146
PR145 340K/F_4 PR150
100K/F_4
PR123 10K/F_4
PC267 1U/25V_4
PV Change
0_4
*0.1U/25V_4
+0.64VREF
DGPU_PWROK [20]
PR126 *10K/F_4
PR128
10K/F_4
PC260 *100P/50V_4
PR133 *0_2/S
A
25
V064
SVD
SVC
SVT 22
21
PWROK 19
PC104 0.1U/16V_4
20
PC106 1U/6.3V_4
8899SVC 8899SVD
PC276
+VGA_CORE
2
OCP_L
2.2_6
PR122 *10K/F_4
8899RGND
16
+1.8V_VGA
8899VDDIO 18
IBIAS
PR129
PGOOD
0_4/P
PGOODA
PR136 +1.8V_VGA
29
8899OCP_L 27
DGPU_OCP_L
PR282 845/F_4
PC101
0.47U/6.3V_4
*10K/F_4
PR121 10K/F_4
PW MA2
39
+3VS5 [20]
14
PC107 0.1U/16V_4
GND
PR152 10K/F_4
8899FB
PC272 0.1U/16V_4
PD8 RB500V-40 1 2
PR137
[45]
PR267 470/F_4
330P/50V_4
5.62K/F_4 8899OFSA 24
8899VCC
DGPU_PWR_EN
12
150/F_4
332/F_4 PR278
[12,20,46]
[45]
8899ISEN1N_S
0_4
1
1.1V 1.0V 0.9V 0.8V
PR147
8899VCC
38
B
Boot Voltage
0 1 0 1
8899ISEN1P_S
*100P/50V_4
RGND
SVD
[45]
0_4/P
10P/50V_4
PR148
0 0 1 1
8899ISEN1N_S
PR275 845/F_4
PR132 *10K/F_4
SVC
8899ISEN1P_S 1U/25V_4
8899VCC
150K/F_4
8899FBA
VID Override table (VDD)
8899ISEN2N_S
*1K/F_4
PR268
10
[45]
PC278
[45] [45]
8899ISEN2P_S
PR293 470/F_4
*1K/F_4 8899PHASE2
PC269
5.1K/F_4
[45]
8899LGATE1
8899ISEN2N_S
PR288
PC262
0_4
[45]
9
24.9K/F_4
PR281
PR287
D
8899ISEN2P_S
RT8899AGQW
LGATEA1
PHASE2
PC283
4
UGATEA1
PC284
PR272 *0_2/S
PR279 4.7_4 PR155 140K/F_4
TONSET
PHASE1 8899PHASEA144
1 2 3
2
PC277 390U/2.5V_5X5.8ESR10
2
*220U/2V_7343
0.1U/16V_4
PR277 *0_2/S
+ PC99
8899UGATEA143
1_6
5 6 7 8 1
1 +
TONSETA
UGATE1 PR266
48899UGATEA_S
DCR=9mohm
8899PHASEA1
PC105
8899TONA 40
PC286 2.2U/6.3V_6
PVCC
PR296
VCC
PC285 0.1U/25V_4
PL24 1uH/11A (PCMC063T-1R0MN)
PC266 2.2U/6.3V_6
28
PR289 4.7_4
+VIN_GPU
2.2_6
PR270 2.2_6
0.1U/16V_4
PC114
50
PC115
5 6 7 8
4.7U/25V_8
4.7U/25V_8
0.1U/25V_4
PC274
2
+1.35V_VGA
PC275
0.1U/25V_4
D
PR299
8899PVCC
*0_8/S PC98
1
44
+VIN_GFX PL22
+MVDDQ Volt +/- 5% Countinue current:6A OCP_TDC=12.6A OCP_SPIKE=18A(1ms) Vboot=0.9V LL=0 V/A external offset=0.45V
2
1
+VIN
3
4
3
2
Document Number
Rev 1A
Vcore( RT8899A) Friday, May 22, 2015 1
Sheet
44
of
49
5
4
3
2
1
45 D
D
+VIN_GPU
1 2 3
PL23 0.36uH/30A
2
2
+VGA_CORE
PC253 *100U/25V
DCR=1.1mohm
+ PC261 100U/25V
2200P/50V_4
PQ29 FDMS7698
+ PC252 0.1U/25V_4
PC116
0.1U/25V_4
4.7U/25V_8
PC117
S
PQ10 *FDMS7698
PV change
5
5
8899PHASE1
D 8899LGATE1
D
G
4
S
S 1 2 3
PQ26 FDMS0308AS
1 2 3
PQ9 *FDMS0308AS
C
PR130 2.2_6
G
4
PR283 *0_2/S
PR284 *0_2/S
C
PC102 2200P/50V_4 8899ISEN1N_S
8899ISEN1N_S
[44]
8899ISEN1P_S
8899ISEN1P_S
[44]
VGACORE ( Meso XT DDR3_ 35W/53W(1ms) ) Countinue current:36A OCP_TDC=45A OCP_SPIKE=75A(1ms) Vboot=0.9V LL=1m V/A
S
1_6
G
2200P/50V_4
4
PC112
S
PQ8 *FDMS7698
+VGA_CORE
PL20 0.36uH/30A
PC100 2200P/50V_4 8899ISEN2N_S 8899ISEN2P_S
8899ISEN2N_S
[44]
8899ISEN2P_S
[44]
1
1
1
+
2
2
PC97
2
PC254
2
PC256
*220U/2V_7343
PR257 *0_2/S
+
PC255
390U/2.5V_5X5.8ESR10
PQ24 FDMS0308AS
PR258 *0_2/S
+
PC257
390U/2.5V_5X5.8ESR10
S
+
PC109
390U/2.5V_5X5.8ESR10
1 2 3
PQ7 *FDMS0308AS
+
PR120 2.2_6
G
390U/2.5V_5X5.8ESR10
S
D 4
1 2 3
G
0.1U/16V_4
5
5 8899LGATE2
4
1
8899PHASE2
D [44]
B
DCR=1.1mohm
PQ25 FDMS7698
1
[44]
D 8899UGATE2_G
PC113 0.1U/25V_4
G
PC265 *4.7U/25V_8
4
1 2 3
8899UGATE2_G
1 2 3
8899UGATE2
PC263 4.7U/25V_8
D PR119 [44]
PC281 4.7U/25V_8
B
PC264 4.7U/25V_8
5
5
+VIN_GPU
2
[44]
4.7U/25V_8
G
4
8899UGATE1_G
PC280 *4.7U/25V_8
S
1_6
[44]
4.7U/25V_8
G
4
8899UGATE1_G
PC118
D
1 2 3
PR157 8899UGATE1
PC110
5
5
D [44]
PC103
1
For Acoustic
+VIN
1
PL21 *0_8/S
A
A
PROJECT : X1A Quanta Computer Inc.
NB5
Size
Document Number
Custom
CPU Core2
Rev 1A
Date: Friday, May 22, 2015 5
4
3
2
Sheet 1
45
of
49
1
2
3
4
5
6
7
8
46
+0.95V +/- 3% Countinue current:2A Peak current:3A OCP minimum:4A A
A
+1.0V_VGA PC243
PR249
+1.0V_VGA
*2200P/50V_4
*2.2_6
+3VS5
PJP5 *POWER_JP/S 2 1
4
554PG_1.0V
9
*0_4/S
10
554PVIN_1.0V
PC245 0.01U/50V_4
PC244 10U/6.3V_6
1
NC
RT8068A
PVIN
LX
PVIN
LX
PR250 10_6
8
554SVIN_1.0V
11
SVIN
FB
GND
EN
554LX_1.0V
2 3
NC
PC246 1U/6.3V_4
7
PC248 *68P/50V_4 554NC_1.0V
6
554FB_1.0V
PC251 *22P/50V_4
PR256 *0_2/S
PC247 0.1U/16V_4
PC249 10U/6.3V_6
554FB_1.0V_S
5
R2
Vih=1.6V
R1
PR254 6.65K/F_4
PR251 11.3K/F_4
PR252 4.7K/F_4 [12,20,44,46]
+1.0V_VGA_S2
PL19 1uH/11A (PCMC063T-1R0MN)
PG
PR255 *POWER_JP/S
1
PU15 PR253 DGPU_PWROK
[19,22,46]
2
PV Change [12,20,35,44]
+0.95V_VGA
V0=0.6*(R1+R2)/R2
DGPU_PWR_EN PC250 0.47U/6.3V_4
For Meso sequence control
B
B
+3V_VGA +VGA_CORE/+1.35_VGA +1.8V_VGA/+0.95V_VGA
+5VS5
4 PC93
7
6
OUT2 OUT2
PU9 APL3523A
GND
ON2
GND
8 9 11
VBIAS
CT2
5
PC89 1000P/50V_4
DGPU_PWR_EN
[12,20,44,46]
PC92 0.47U/6.3V_4
10
PC96 0.47U/6.3V_4
ON1
12
PR115 10K/F_4
PC86 *10U/6.3V_6
PR114 10K/F_4
3
DGPU_PWR_EN
PC87 0.1U/16V_4
15
0.1U/16V_4 [12,20,44,46]
C
+1.8V_VGA PR113 *0_6/S
VIN2
2
VOUT1 VOUT1
PC94 0.1U/16V_4
+1.8V_VGA +/- 5% Countinue current:0.5A Peak current:1A
PC90 0.1U/16V_4
CT1
PD7 RB500V-40 2 1
VIN2
13 14 PC91 *10U/6.3V_6
VIN1
PR117 *0_8/S
VIN1
PC95 0.1U/16V_4
C
+3V_VGA
+1.8V_DEEP_SUS
1
+3VS5
+3.3V_VGA +/- 5% Countinue current:0.1A Peak current:0.25A
+3V_VGA [19,20,22] +1.0V_VGA [19,22,46] +1.8V_VGA [19,20,22,32,44]
PC88 1000P/50V_4
D
D
PROJECT : X1A Quanta Computer Inc.
NB5
Size
Document Number
Custom
+VGA POWER
Date: Friday, May 22, 2015 1
2
3
4
5
6
7
Rev 1A 46
Sheet 8
of
49
5
4
3
2
+VIN +3VS5
+3V
+3VS5
+3VLANVCC
+3VPCU
16
S5 PWR MOS SW
LAN_POWER
S5 PWR MOS SW
15
3 MAINON
PWR BTN
18
47
+VIN
1
+3VS5 +5VS5
3V/5V VR
+5VPUC
CHARGER
D
Battery
HWPG
PG
D
+3VSUS
+3VS5
3
14
S5 PWR MOS SW
LATCH (NBSWON1#)
SUSON
+5VS5
13 SUSON
13
4
S5_ON
MAINON
18
9
RSMRST#
9
DNBSWON#
RSMRST#
+5V LAN_POWER
19
S5 PWR MOS SW
MAINON
15
SUSB#
17
18
VRON
SLP_SUS_ON +VIN
SUSC#
12 31 EC_PWROK
PLTRST#
30
7
PCH C
PCH_PWROK
19
1.35V VR
PLTRST# SYS_PWROK
+0.65V_DDR_VTT
GPIO55
MAINON
PWRBTN# SLP_S4# SLP_S3#
23
EC C
+PWR_SRC
5
2
19
1
18
27
IMVP_PWRGD
IMVP_PWROK
GPH5
9
DSWROK_EC
6
SLP_SUS#_EC
11
SUSWARN#_EC
10
SUSACK#_EC
DSW_PWROK SLP_SUS#
27
+1.35VSUS
14 SUSON
PG
22
HWPG
+VIN
SUSWARN#
13
+1.0V_DEEP_SUS
HWPG
SUSACK#
+VIN
8
+VCC_CORE
26
+VIN
28
B
B
+VCCSA SLP_SUS_ON
IMVP VR
HWPG
CPU
24 EN
PG
IMVP_PWRGD
IMVP VR
7
+3V
+1.0V
PG +VCCGT
21
EN
+1.0V_DEEP_SUS VR
PG DRON
25
18
25
DRON
MAINON
+1.0V_EN
PCH_SLP_S0_N
DS3 PWR MOS SW
+3VS5 VRON
8
23
+1.8V_DEEP_SUS
20 14 +3V
13 SUSON
VCCSTPLL_EN
PW8824
+VCCSTPLL
DS3 PWR MOS SW
A
PROJECT : X1A Quanta Computer Inc.
HWPG EN
A
SLP_SUS_ON
PG SLP_SUS_ON
7
Size
7
NB5 5
4
3
2
Document Number
Rev 1A
POWER UP SEQUENCE
Intel Wednesday, May 13, 2015 Date: 1
Sheet
47
of
49
5
4
3
2
1
48 PU1 (+VAD)
Adapter
+PRWSRC (+VIN)
Battery
VRON
SUSON
MAINON
DRON
+3V_MAIN_EN
DGPU_FB_EN
SLP_SUS_ON
D
D
PU10
ON PU2
+3VPCU
Richtek RT7238B
Richtek
NCP81206
+5VPCU
PU4
RT8231BGQW
ON
PU11
PU1005
Richtek
PU1012
ANPEC
NCP81253
RT8813CGQW
APW8713QBI-TRG
+VCCSA
+VGACORE
+1.35V_GFX
AOS
PU5
AOZ1267QI-02
Richtek RT7238C +VCC_CORE
S5_ON
+VCCGT
+1.35VSUS
+0.65V_DDR_VTT
+1.0V_DEEP_SUS
S5_ON +3V_MAIN_EN
+1.0V_EN
PU18
GMT G9336 +3VS5
VCCSTPLL_EN
PQ52
PQ48
EMB20N03V
EMB20N03V
+5VS5 +1.05V_GFX
+1.0V
+VCCSTPLL
C
C
PU12
Power switch IC APL3523A
LAN_POWER
MAINON
PU13
PU13
Power switch IC APL3523A
SUSON
Power switch IC APL3523A
MAINON
+3V_MAIN_EN
DGPU_PWR_EN
SLP_SUS_ON
ANPEC B
(+3VS5)
+3VLANVCC
(+3VS5)
+3V
(+3VS5)
+3VSUS
(+5VS5)
+5V
PU7
SLP_SUS_ON
GMT
U26
+1.5V_EN
U31
USBPW_ON#
GMT
Power SW
U27
(+3VS5)
(+3VS5)
APW8824
G5243AT11U-Lay
G9661
AP2820GMMTR-G1
+3V_GFX
+3V_AON
+1.8V_DEEP_SUS
+3V_DEEP_SUS
+1.5V
+5V_USBP1
B
A
A
PROJECT : X1A Quanta Computer Inc. Size Date: 5
4
3
2
Document Number
Rev 1A
Power Block Diagram
NB5
Wednesday, May 13, 2015 1
Sheet
48
of
49
5
4
3
G3 to S0
2
S0
S0 to S3
1
49
S4/S5
+3V_RTC SRTC_RST# D
D
RTC_RST# T1
9 ms
S5_ON +5VS5 +3VS5 PWR_BTN SLP_SUS_ON +3V_DEEP_SUS C
C
+1.8V_DEEP_SUS +1.0V_DEEP_SUS
tPCH03 10 us
RSMRST# SUS_ON +1.35VSUS +3VSUS +VCCSTPLL
B
MAINON
B
tPCH28
30 us
+3V +5V +1V +0.65V_DDR_VTT +VCORE +VCCGT IMVP_PWRGD EC_PWROK A
A
PLTRST# tPCH33
PROJECT : X1A Quanta Computer Inc.
99 ms
Size
NB5 5
4
3
2
Document Number
Rev 1A
POWER UP SEQUENCE
Intel Wednesday, May 13, 2015 Date: 1
Sheet
49
of
49