ENT 162 – Analog Electronics
Laboratory Module
LABORATORY MODULE
ENT 162 Analog Electronics Semester 2 (2012201!"
E#$ER%MENT 1 & Dio'e )aracteristics an' Recti*ier irc+it
Name
& ____________________________________________________ ____________________________________________________
Matri, No-
& ______________________ ______________________
Sc)ool O* Mec)atronic Engineering Uni.ersiti Mala/sia $erlis Page 1 of 12
ENT 162 – Analog Electronics
Laboratory Module
E#$ER%MENT 1 Dio'e )aracteristics an' Recti*ier irc+it $art A& Dio'e % )aracteristics
1- OBET%E& 1.1 To exaine t!e "oltage#current $%#&' c!aracteristics of diode.
2- $ARTS AND E3U%$MENT& 2.1
1 () resistor
# 1 Pc
2.2
1N*1*+ silicone diode
# 1 Pc
2.,
Multieter
# 1 Pc
2.*
- #1 %/0 oer suly
# 1 Pc
2.
3readboard and ire
!- %NTRODUT%ON& A diode is said to be in forward bias !en t!e diode4s anode is at a !ig!er otential t!an its cat!ode. 0urrent ill flo t!roug! t!e diode fro anode to cat!ode. A diode is a nonlinear de"ice in t!e sense t!at t!e current is not roortional to "oltage difference across it. 5!en t!e diode is in forard bias condition a sall "oltage dro called t!e barrier potential, occurs across t!e diode. Tyical "alue is aroxiately at -.7 % for silicon and -., % for geraniu $easured at roo teerature'. A sybol and in configuration for diode is s!on belo.
+
-
/iode forard resistance 8 f T!e deterination of 89, t!e diode forard resistance is s!on gra!ically in 9igure 1.1. R f
=
V d I d
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ENT 162 – Analog Electronics
9igure 1.1
Laboratory Module
:ra!ic deterination of diode forard resistance.
4- $ROEDURE& *.1
;sing your /MM select a lo#resistance eter range. T!en connect t!e positive lead of t!e /MM to t!e diode4s anode terinal !ile t!e negative lead is connected to t!e diode4s cathode terinal as s!on in 9igure 1.2$A'. T!e /MM4s internal battery t!en forward biases t!e diode. Note t!e resistance reading. 8ecord your result in Table 1.1.
&f a /MM it! a
L.= 8ecord your results in Table 1.1
*.2 No re"erse t!e eter4s leads so t!at its ositi"e terinal is connected to t!e cat!ode terinal of t!e diode !ic! is no biased. Noted t!e reading. 8ecord your result in Table 1.1. 5!en easuring resistances soe /MMs !a"e t!e olarity of t!eir leads re"ersed fro t!e noral sense? t!at is t!e ositi"e lead is actually ired to t!e internal battery4s negative terinal. &n t!is case t!e forard and re"erse resistance readings ill be t!e oosite of t!ose indicated in t!ese to stes.
*., 5ire t!e circuit s!on in 9igure 1.2$3'. Ad@ust t!e dc oer suly to gi"e t!e "oltages across t!e 1 () resistor s!on in Table 1.2. 9or eac! "oltage use t!e ultieter to easure and record t!e dc "oltage dro $%/' across t!e diode. T!e diode current is also t!e current floing t!roug! t!e 1 () resistor. /eterine t!e diode current by using >!4s la in eac! case.
Page , of 12
ENT 162 – Analog Electronics
Laboratory Module
*.* Plot t!e resulting static diode cur"e $diode current "ersus "oltage' on t!e gra! age in t!is exerient. :ra!ically deterine t!e diode4s barrier otential $%3' and forard resistance $89' recording your results in Table 1.2.
9igure 1.2$A' 0onnection beteen diode and /MM
9igure 1.2$3' Exerient setu
Page * of 12
ENT 162 – Analog Electronics
Laboratory Module
Name
______________________________
Matri, No
______________________________
Date ______________
5- RESULTS OR E#$ER%MENT 1(A"&
Table 1.1
/iode testing it! ultieter
Meter Lea's Ste7
8
1
Anode
0at!ode
2
0at!ode
Anode
Table 1.2
oltage across 1 9: Resistor -.1 % -.2 % -., % -.* % -. % -.6 % -.7 % -.+ % -.B % 1.- % ,.- % .-% 7.- % B.- %
%nstr+ctor A77ro.al
Res+lt
9orard biased diode c!aracteristic cur"e
Dio'e oltage
____________________
Page of 12
Dio'e or;ar' +rrent
Date
_____________
ENT 162 – Analog Electronics
Laboratory Module
Name
______________________________
Matri, No
______________________________
Date ______________
6- ALULAT%ON OR D%ODE OR
%nstr+ctor A77ro.al
____________________
Page 6 of 12
Date
_____________
ENT 162 – Analog Electronics
Laboratory Module
$art B& Dio'e Recti*ier irc+it 1- OBET%E& 1.2
To deonstrate t!e c!aracteristics of to different diode rectifier circuits !alf#a"e rectifier and center#taed full#a"e rectifier.
2- $ARTS AND E3U%$MENT& 2.1
1 () resistor
# 1 Pc
2.2
1N*--1 silicon rectifier diodes
# 2 Pcs
2.,
12 %rs secondary center#taed transforer
# 1 Pc
2.*
1-u9 caacitor
# 1 Pc
2.*
/ual trace oscilloscoe
# 1 Pc
2.
Multieter
# 1 Pc
2.6
3readboard and ire
# 1 Pc
!- ALULAT%ON =U%DE >al*;a.e recti*ier /0 "oltage outut
C
>utut freDuency
C
V S ( peak )
V B
$sine a"e inut'
inut freDuency
$,.1' $,.2'
enterta77e' *+ll;a.e recti*ier /c "oltage outut
C
>utut freDuency
C
2 V S ( peak )
V B
2 x inut freDuency
Page 7 of 12
$sine a"e inut'
$,.,' $,.*'
ENT 162 – Analog Electronics
Laboratory Module
4- $ROEDURE& *.1
5ire t!e !alf a"e rectifier circuit s!on in 9igure 1.,$A'. 3e "ery careful to a(e sure t!at connections to t!e 2*-% riary of t!e transforer are roerly rotected. Note t!at neit!er of t!e transforer4s riary leads is grounded !ile t!e center#taed secondary lead is not used in t!is section.
*.2
et your oscilloscoe to t!e folloing aroxiate settings 0!annels 1 F 2
%Gdi"ision dc couling
Tie base
sGdi"ision
Aly 2*- %A0 $rs' to t!e transforer4s riary leads. 0onnect one scoe robe to t!e anode terinal of t!e 1N*--1 diode $oint A' and t!e ot!er robe to t!e diode cat!ode terinal $oint 3'.Hou s!ould obtain t!e a"efors s!on in 9igure 1.*. *.,
9ro t!e oscilloscoe easure t!e transforer4s ea( secondary "oltage I%$ea('J as ell as t!e ea( "oltage I% -$ea('J across t!e 1() resistor recording your results in Table 1.,.
*.*
5it! your ultieter easure t!e dc "oltage $%/0' across t!e 1 () resistor and record your result in Table 1.,. 0oare t!is result it! t!at obtained fro t!e eDuation for t!e a"erage or dc "oltage of a !alf#a"e rectifier $EDuation 1'. >bser"e bot! a"efors.
*.
Turn off oer to transforer. Add one 1-u9 caacitor in arallel it! t!e load resistor. Negati"e side of t!e caacitor s!ould be grounded.
*.6
Turn on oer to transforerMeasure rile "oltage ea(#to#ea( at t!e outut using oscilloscoe.
*.7
Turn off t!e oer to t!e transforer and ire t!e center#taed full#a"e rectifier circuit s!on in 9igure 1.,$3'. Pay careful attention to t!e olarity of bot! diodes and t!e connections to t!e 2*-% riary of t!e transforer. T!e center#taed lead is grounded for t!is section.
*.+
No set your oscilloscoe to t!e folloing aroxiate settings 0!annels 1 F 2
%Gdi"ision dc couling
Tie base
sGdi"ision
Aly 2*- %A0 $rs' to t!e transforer4s riary leads. 0onnect one robe to t!e anode terinal of t!e 1N*--1 diode $oint A' and t!e ot!er robe to one of t!e diode4s cat!ode terinals $oint 3'.Hou s!ould obtain t!e a"efors as s!on in 9igure 1..
Page + of 12
ENT 162 – Analog Electronics
*.B
Laboratory Module
5it! your oscilloscoe easure t!e transforer4s ea( secondary "oltage $% ' it! resect to t!e grounded center ta as ell as t!e ea( "oltage % -$ea(' across t!e 1 () resistor recording your results in Table 1.,.
*.1- 5it! your ultieter easure t!e dc "oltage $%/0' across t!e 1() resistor and record your result in Table 1.,. 0oare t!is result it! t!at obtained fro t!e eDuation for t!e a"erage or dc "oltage of a center#taed full#a"e rectifier $EDuation ,.,'. >bser"e bot! a"efors. *.11 Turn off oer to transforer. Add one 1-u9 caacitor in arallel it! t!e load resistor. Negati"e side of t!e caacitor s!ould be grounded. *.12 Turn on oer to transforer. Measure rile "oltage ea(#to#ea( at t!e outut using oscilloscoe.
9igure 1.,$A' Kalf a"e rectifier circuit
9igure 1.,$3' 9ull#a"e rectifier circuit
Page B of 12
ENT 162 – Analog Electronics
Laboratory Module
9igure 1.* Tie base sGdi"ision
9igure 1. Tie base sGdi"ision
Page 1- of 12
ENT 162 – Analog Electronics
Laboratory Module
Name
______________________________
Matri, No
______________________________
Date ______________
5- RESULTS OR E#$ER%MENT 1(B"&
Table 1., 8ectifier data
Recti*ier
Meas+re'
T/7e
E,7ect e' D
S (7ea9"
0 (7ea9"
D
Kalf#a"e 9ull#a"e $center ta'
6- ALULAT%ONS
Page 11 of 12
Ri77le (7ea9 to 7ea9"
? Error
ENT 162 – Analog Electronics
%nstr+ctor A77ro.al
Laboratory Module
____________________
Name
______________________________
Matri, No
______________________________
Date _____________ Date ______________
@- D%SUSS%ON&
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- ONLUS%ON&
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