Course No. EEE 304
Experiment No. 04
Name of the Experiment: Design of Decoder/ Encoder/ Multiplexer Circuit
Sumitted !" #ashrif $illah % &00'0(( Section" )& *roup No. 04 +ther *roup Memers: &00'0&,- &- (0- and (3 Date of erformance: eruar! 1- (0&3 Date of Sumission: eruar! ('- (0&3
Objectives :
2i mplementation of simple decoding techni5ue 2ii ntroduction of priorit! concept in encoding/decoding 2iii Stud! different aspects of M672Data Selector
Apparatus:
2i +8 gate 2C 943(- & piece 2ii )ND gate 2C 940,- ( piece 2iii N+# gate 2C 9404- & piece 2i C 94&10 2&'7& M672& piece 2 C 94&13 2dual 47& M672& piece 2i C 94&14 24 line to &' line decoder2& piece 2ii ;ires- trainer oard etc. Introduction to decoder logic:
#he asic function of a decoder circuit is to detect the presence of a specific comination of its2code on its inputs and to indicate the presence of that code ! a specified output leel. n its general form- a decoder has n input lines to handle n its and (
Suppose =e need to construct a decoder s!stem =hich has ) and $ 2i.e ( its as its input and =e hae to determine the presence of each comination of these inputs 2(<(>4 comination! osering the output lines2one for each comination. #he presence of )$>&& can e determined ! osering the output of an )ND gate =hose output is )$. Similarl! logic e5uation for other 3 cominations can e found. #hen - if =e find out =hich output line is actie -=e can determine input. #he complete circuit diagram is sho=n elo=:
Prelab 1: Deelop the logic re5uired to detect the inar! code &00&0 and produce an actie ?+; output.
Exercise 1: Construct a decoder circuit =hich can detect the presence of , and &1 at the input.
#he numer 2, or &1 that is present at the input in inar!- is high at the output.
Exercise 2: Construct a 1 it2i.e 1 line to 3( linedecoder circuit ! cascading t=o 4 line to &' line decoder2C 94&14.
@ere- each decoder has t=o control inputs. or actie operation oth of them should e lo=. #he upper decoder is for lines 0"&1- and the lo=er decoder is for lines &'"3(. #he lo=er d ecoder is chosen ! the state of MS$ 2&0000 " &&&&&. ) N+# gate performs this function. ;hen MS$ is e5ual to &- the lo=er decoder is actiated =hile the upper one is inactie. or example- =hen the input is &0&&0 2decimal ((- the decoder output is ((nd pin =hich is lo= and the rest are high.
The priority encoder circuit: )n encoder essentiall! performs a AreerseB decoder function. t accepts an actie leel on one of its inputs representing a digit- such as a dec imal or octal digit- and conerts it to a coded output- such as $CD or inar!. Example: The decimal to binary encoder #his t!pe of encoder has ten inputs"one for each decimal digit"and four outputs corresponding to the $CD code. #he $CD code is listed in the follo=ing tale:
Note that )0 output should e high =hen an! of &-3-1-9- input lines is present at the input. @ence the expression for )0 =ill e: A ! 1"#"$"%"& Similarl!' A1!2"#"("% A2!)"$"("% A#! *"&
#he input lines do not al=a!s exhiits same priorit!. #here ma! e cases =here some inputs hae higher priorities than others. n such cases- =he n t=o input lines are actie simultaneousl!the output choose to respond to the input line =ith highest priorit!. #he encoder descried aoe can e modified to function as a priorit! encoder. n that case- the encoder =ill produce $CD output corresponding to the highest order decimal digit input that is actie and =ill ignore an! other actie inputs. or example- if the ' and 3 inputs are oth actie- the $CD output is 0&&0 2=hich represents decimal '. No= lets loo at the re5uirements for the priorit! detection logic. #his logic circuitr! preents a lo=er order digit input from disrupting the encoding of a higher order digit. ;e =ant to examine the output )0. Note that )0 is @*@ =hen &-3-1-9 or is high. Note that Digit & should actiate the )0 output onl! if no higher order digits other than those that also actiate )0 are @*@. #he re5uirements can e stated as follo=s:
1+A is ,I-, i. 1 is ,I-, and 2')'( and * are /O0 2+A is ,I-, i. # is ,I-, and )'( and * are /O0 #+A is ,I-, i. $ is ,I-, and ( and * are /O0 )+A is ,I-, i. % is ,I-, and * are /O0 $+A is ,I-, i. & is ,I-,
)0 output is @*@ if an! of the aoe 1 conditions occur. @ence-
Similarl!- )&> 2(3 4 1 , )(> 21'9 , )3> , Exercise #: Construct a priorit! encoder =hich implement the encoding of 0-3-&-( =ith descending priorit! 20 has the highest priorit! and ( has the lo=est.
0 & 0 0 0
& x x & 0
( x x x &
3 x & 0 0
igure: #ruth #ale for the riorit! Encoder
)& 0 & 0 &
)0 0 & & 0
ultiplexer or ata 3elector:
Multiplexers are also no=n as data selector. #he asic multiplexer has seeral data input lines and a single output line. t also has data selector inputs- =hich permit digital data on an! one of the inputs to e routed to the output line.
Note from the tale that =hen C is &- output is connected to the input $ and in that case the state of input at ) does not hae an! effect on the output . Similarl! =hen C is 0- output is connected to the input ).
Exercise ): mplementation of the Multiplexing function using C 94?S&13
IC 74153: Dual 4-to-1 Multiplexer
This multiplexer has two enable pins for each of con!urations" Those pins 1# an$ %# ha&e to be low for acti&e operation" It has two control inputs '( an$ ) which are represente$ respecti&el* b* +,( an$ +1 in the truth table" The output is foun$ accor$in! to the truth table in pins 1( an$ %"
4ombinational logic implementation using 56: ) useful application of the data selector is in the generation of cominational logic functions in sum of products form. ;hen used in this =a!- the deice can replace discrete gates- c an often greatl! reduce the numer of Cs and can mae the design changes much easier. ) good example is gien elo=.
Exercise $: mplementation of the follo=ing logic using C 94&10 2)-$-C-D>.2&-3-1-9--&&-&3-&1
/ere the $ata inputs 1(3(5(0(11(13( an$ 15 are ept low while the rest are ept hi!h" 'ccor$in! to the control inputs '()(C( an$ D the appropriate input is chosen an$ shown in the output" In this $esi!n output is hi!h for o$$ number of input lines"
4ascading o. 56 to increase the number o. input line: ;e can cascade seeral M67Fs to construct a single M67 =ith higher numer of input lines. n the follo=ing example =e hae constructed a 4 line to & line M67 using three ( line to & line M67.
Exercise (: mplement a , line to & line M67 using t=o 4 line to & line M67 2found in C 94&13 and an +8 gate.
